SN65HVD1050QDRQ1

SN65HVD1050-Q1 www.ti.com SLLS696C – MAY 2006 – REVISED DECEMBER 2010 EMC-OPTIMIZED CAN TRANSCEIVER Check for Samples: SN65HVD1050-Q1 FEATURES APPLICATIONS • • • • 1 2 • • • • • • • • • • Qualified for Automotive Applications Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval Improved Drop-In Replacement for TJA1050 Meets or Exceeds the Requirements of ISO 11898-2 GIFT/ICT Compliant ESD Protection up to ±8 kV (Human-Body Model) on Bus Pins High Electromagnetic Immunity (EMI) Low Electromagnetic Emissions (EME) Bus-Fault Protection of –27 V to 40 V Dominant Time-Out Function Thermal Shutdown Protection Power-Up/Down Glitch-Free Bus Inputs and Outputs – High Input Impedance With Low VCC – Monotonic Outputs During Power Cycling • • • • GMW3122 Dual-Wire CAN Physical Layer SAE J2284 High-Speed CAN for Automotive Applications SAE J1939 Standard Data Bus Interface ISO 11783 Standard Data Bus Interface NMEA 2000 Standard Data Bus Interface Industrial Automation – DeviceNet™ Data Buses (Vendor ID #806) DESCRIPTION The SN65HVD1050 meets or exceeds the specifications of the ISO 11898 standard for use in applications employing a Controller Area Network (CAN). The device is qualified for use in automotive applications. As a CAN transceiver, this device provides differential transmit capability to the bus and differential receive capability to a CAN controller at signaling rates up to 1 megabit per second (Mbps) (1). (1) The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second). FUNCTION BLOCK DIAGRAM 8 Silent Mode VCC VCC VCC/2 30 µA 3 Dominant Time Out 5 S Vref Over-Temperature Sensor 30 µA TXD 1 7 Driver 6 CANH CANL 2 RXD 4 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DeviceNet is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2010, Texas Instruments Incorporated SN65HVD1050-Q1 SLLS696C – MAY 2006 – REVISED DECEMBER 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. DESCRIPTION (CONTINUED) Designed for operation is especially harsh environments, the SN65HVD1050 features cross-wire, over-voltage, and loss of ground protection from –27 V to 40 V, over-temperature protection, a –12-V to 12-V common-mode range, and withstands voltage transients from –200 V to 200 V according to ISO 7637. Pin 8 provides for two different modes of operation: high-speed or silent mode. The high-speed mode of operation is selected by connecting S (pin 8) to ground. If a high logic level is applied to the S pin of the SN65HVD1050, the device enters a listen-only silent mode during which the driver is switched off while the receiver remains fully functional. In silent mode, all bus activity is passed by the receiver output to the local protocol controller. When data transmission is required, the local protocol controller reverses this low-current silent mode by placing a logic low on the S pin to resume full operation. A dominant time-out circuit in the SN65HVD1050 prevents the driver from blocking network communication with a hardware or software failure. The time-out circuit is triggered by a falling edge on TXD (pin 1). If no rising edge is seen before the time-out constant of the circuit expires, the driver is disabled. The circuit is then reset by the next rising edge on TXD. Vref (pin 5) is available as a VCC/2 voltage reference. The SN65HVD1050 is characterized for operation from –40°C to 125°C. SN65HVD1050 TXD GND VCC RXD 1 8 2 7 3 6 4 5 S CANH CANL Vref ORDERING INFORMATION (1) (1) (2) PART NUMBER PACKAGE (2) MARKED AS ORDERING NUMBER SN65HVD1050-Q1 SOIC-8 H1050Q SN65HVD1050QDRQ1 (reel) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. Application Hint: CAN Nodes Using Common-Mode Chokes The SN65HVD1050 has been EMC optimized to allow use in CAN systems without a common-mode choke. However, sometimes the CAN network and termination architecture may require their use. If a common-mode choke is used in a CAN node where bus-line shorts to dc voltages may be possible, care should be taken in the choice of common-mode choke (winding type, core type, and value) along with the termination and protection scheme of the node and bus. During CAN bus shorts to dc voltages the inductance of the common-mode choke may cause inductive flyback transients. Some combinations of common-mode chokes, bus termination, and shorting voltages take the bus voltages outside the absolute maximum ratings of the device, possibly leading to damage. 2 Submit Documentation Feedback Copyright © 2006–2010, Texas Instruments Incorporated SN65HVD1050-Q1 www.ti.com SLLS696C – MAY 2006 – REVISED DECEMBER 2010 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) UNIT VCC Supply voltage range (2) –0.3 V to 6 V Voltage range at any bus terminal (CANH, CANL, Vref) –27 V to 40 V IO Receiver output current VI Voltage input range, ac transient pulse (3) (CANH, CANL) VI Voltage input range (TXD, S) TJ Junction temperature range –40°C to 170°C TA Operating free-air temperature range –40°C to 125°C (1) (2) (3) 20 mA –200 V to 200 V –0.3 V to 6 V Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal. Tested in accordance with ISO 7637-1, test pulses 1, 2, 3a, 3b, 5, 6, and 7. ISO 7637-1 transient tests are ac only; if dc may be coupled in with ac transients, externally protect the bus pins within the absolute maximum voltage range at any bus terminal (–27 V to 40 V). If common-mode chokes are used in the system and the bus lines may be shorted to dc, ensure that the choke type and value in combination with the node termination and shorting voltage either will not create inductive flyback outside of voltage maximum specification or use an external transient-suppression circuit to protect the transceiver from the inductive transients ELECTROSTATIC DISCHARGE PROTECTION over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS Human-Body Model (2) Electrostatic discharge (1) (2) (3) (1) UNIT Bus terminals and GND ±8 kV All pins ±4 kV Charged-Device Model (3) All pins ±1.5 kV Machine Model ±200 V All typical values at 25°C. Tested in accordance JEDEC Standard 22, Test Method A114-A. Tested in accordance JEDEC Standard 22, Test Method C101. RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT VCC Supply voltage 4.75 5.25 V VI or VIC Voltage at any bus terminal (separately or common mode) –12 12 V VIH High-level input voltage TXD, S 2 5.25 V VIL Low-level input voltage TXD, S 0 0.8 V VID Differential input voltage –6 6 V IOH High-level output current IOL Low-level output current TJ Junction temperature Driver –70 Receiver mA –2 Driver 70 Receiver 2 See Thermal Characteristics table mA 150 °C TYP MAX UNIT 6 10 50 70 6 10 SUPPLY CURRENT over recommended operating conditions including operating free-air temperature range (unless otherwise noted) PARAMETER ICC 5-V supply current TEST CONDITIONS Silent mode S at VCC, VI = VCC Dominant VI = 0 V, 60-Ω load, S at 0 V Recessive VI = VCC, No load, S at 0 V Copyright © 2006–2010, Texas Instruments Incorporated MIN Submit Documentation Feedback mA 3 SN65HVD1050-Q1 SLLS696C – MAY 2006 – REVISED DECEMBER 2010 www.ti.com DEVICE SWITCHING CHARACTERISTICS over recommended operating conditions including operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS td(LOOP1) Total loop delay, driver input to receiver output, recessive to dominant td(LOOP2) Total loop delay, driver input to receiver output, dominant to recessive MIN MAX UNIT S at 0 V, See Figure 9 90 230 ns S at 0 V, See Figure 9 90 230 ns MAX UNIT DRIVER ELECTRICAL CHARACTERISTICS over recommended operating conditions including operating free-air temperature range (unless otherwise noted) PARAMETER VO(D) Bus output voltage (dominant) VO(R) Bus output voltage (recessive) VOD(D) TEST CONDITIONS CANH CANL Differential output voltage (dominant) VOD(R) Differential output voltage (recessive) VOC(ss) Steady state common-mode output voltage VI = 0 V, S at 0 V, RL = 60 Ω, See Figure 1 and Figure 2 MIN TYP (1) 2.9 0.8 VI = 3 V, S at 0 V, RL = 60 Ω, See Figure 1 and Figure 2 2 VI = 0 V, RL = 60 Ω, S at 0 V, See Figure 1, Figure 2, and Figure 3 VI = 0 V, RL = 45 Ω, S at 0 V, See Figure 1, Figure 2, and Figure 3 VI = 3 V, S at 0 V, See Figure 1 and Figure 2 VI = 3 V, S at 0 V, No Load 3.4 4.5 1.5 3 V 1.5 3 V 1.4 3 V –0.012 0.012 –0.5 0.05 2 2.3 2.3 3 Change in steady-state common-mode output voltage IIH High-level input current, TXD input VI at VCC –2 2 IIL Low-level input current, TXD input VI at 0 V –50 –10 IO(off) Power-off TXD output current VCC at 0 V, TXD at 5 V 30 CO Output capacitance –105 VCANH = 12 V, CANL open, See Figure 11 mV mA VCANL = –12 V, CANH open, See Figure 11 –72 0.36 –1 VCANL = 12 V, CANH open, See Figure 11 (1) V 1 VCANH = –12 V, CANL open, See Figure 11 Short-circuit steady-state output current V S at 0 V, Figure 8 ΔVOC(ss) IOS(ss) V 1 –0.5 71 mA 105 See receiver input capacitance All typical values are at 25°C with a 5-V supply. DRIVER SWITCHING CHARACTERISTICS over recommended operating conditions including operating free-air temperature range (unless otherwise noted) MIN TYP MAX UNIT tPLH Propagation delay time, low-to-high level output PARAMETER S at 0 V, See Figure 4 25 65 120 ns tPHL Propagation delay time, high-to-low level output S at 0 V, See Figure 4 25 45 120 ns tr Differential output signal rise time S at 0 V, See Figure 4 25 tf Differential output signal fall time S at 0 V, See Figure 4 50 ten Enable time from silent mode to dominant See Figure 7 t(dom) Dominant time out ↓VI, See Figure 10 4 Submit Documentation Feedback TEST CONDITIONS 300 450 ns ns 1 ms 700 ms Copyright © 2006–2010, Texas Instruments Incorporated SN65HVD1050-Q1 www.ti.com SLLS696C – MAY 2006 – REVISED DECEMBER 2010 RECEIVER ELECTRICAL CHARACTERISTICS over recommended operating conditions including operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT 800 900 mV VIT+ Positive-going input threshold voltage S at 0 V, See Table 3 VIT– Negative-going input threshold voltage S at 0 V, See Table 3 Vhys Hysteresis voltage (VIT+ – VIT–) VOH High-level output voltage IO = –2 mA, See Figure 6 VOL Low-level output voltage IO = 2 mA, See Figure 6 0.2 0.4 V II(off) Power-off bus input current CANH or CANL = 5 V, Other pin at 0 V, VCC at 0 V, TXD at 0 V 165 250 mA IO(off) Power-off RXD leakage current VCC at 0 V, RXD at 5 V 20 mA CI Input capacitance to ground (CANH or CANL) TXD at 3 V, VI = 0.4 sin (4E6pt) + 2.5 V CID Differential input capacitance TXD at 3 V, VI = 0.4 sin (4E6pt) RID Differential input resistance TXD at 3 V, S at 0 V 30 80 kΩ RIN Input resistance (CANH or CANL) TXD at 3 V, S at 0 V 15 30 40 kΩ RI(m) Input resistance matching [1 – (RIN (CANH) / RIN (CANL))] × 100% V(CANH) = V(CANL) –3 0 3 % (1) 500 650 mV 100 125 mV 4 4.6 V 13 pF 5 pF All typical values are at 25°C with a 5-V supply. RECEIVER SWITCHING CHARACTERISTICS over recommended operating conditions including operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS tPLH Propagation delay time, low-to-high-level output tPHL Propagation delay time, high-to-low-level output tr Output signal rise time tf Output signal fall time S at 0 V or VCC, See Figure 6 MIN TYP MAX UNIT 60 100 130 ns 45 70 130 ns 8 ns 8 ns S PIN CHARACTERISTICS over recommended operating conditions including operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IIH High level input current S at 2 V IIL Low level input current S at 0.8 V MIN TYP MAX 20 40 70 UNIT mA 5 20 30 mA VREF PIN CHARACTERISTICS over recommended operating conditions including operating free-air temperature range (unless otherwise noted) PARAMETER VO Reference output voltage Copyright © 2006–2010, Texas Instruments Incorporated TEST CONDITIONS –50 mA < IO < 50 mA MIN 0.4 VCC TYP MAX 0.5 VCC 0.6 VCC Submit Documentation Feedback UNIT V 5 SN65HVD1050-Q1 SLLS696C – MAY 2006 – REVISED DECEMBER 2010 www.ti.com THERMAL CHARACTERISTICS over recommended operating conditions including operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP Low-K thermal resistance (1) 211 High-K thermal resistance 131 MAX UNIT qJA Junction-to-air thermal resistance qJB Junction-to-board thermal resistance 53 °C/W qJC Junction-to-case thermal resistance 79 °C/W PD VCC = 5 V, TJ = 27°C, RL = 60 Ω, S at 0 V, Input to TXD at 500 kHz, 50% duty cycle square wave, CL at RXD = 15 pF Average power dissipation 112 mW VCC = 5.5 V, TJ = 130°C, RL = 45 Ω, S at 0 V, Input to TXD at 500 kHz, 50% duty cycle square wave, CL at RXD = 15 pF 170 Thermal shutdown temperature (1) °C/W 190 °C Tested in accordance with the low-K or high-K thermal metric definitions of EIA/JESD51-3 for leaded surface-mount packages. FUNCTION TABLES Table 1. DRIVER (1) INPUTS (1) OUTPUTS BUS STATE TXD S CANH CANL L L or Open H L Dominant H X Z Z Recessive Open X Z Z Recessive X H Z Z Recessive H = high level, L = low level, X = irrelevant, ? = indeterminate, Z = high impedance Table 2. RECEIVER (1) (1) 6 DIFFERENTIAL INPUTS VID = V(CANH) – V(CANL) OUTPUT RXD BUS STATE VID ≥ 0.9 V L Dominant 0.5 V < VID < 0.9 V ? ? VID ≤ 0.5 V H Recessive Open H Recessive H = high level, L = low level, X = irrelevant, ? = indeterminate, Z = high impedance Submit Documentation Feedback Copyright © 2006–2010, Texas Instruments Incorporated SN65HVD1050-Q1 www.ti.com SLLS696C – MAY 2006 – REVISED DECEMBER 2010 PARAMETER MEASUREMENT INFORMATION IO(CANH) II Dominant  3.5 V VO (CANH) TXD VOD RL VO(CANH) + VO(CANL) Recessive  2.5 V 2 S VI VO(CANH) I I(S) + VI(S) _ VOC I O(CANL) V O(CANL)  1.5 V Figure 1. Driver Voltage, Current, and Test Definition CANH 0V TXD VOD Figure 2. Bus Logic State Voltage Definitions 330 W +1% RL + _ S CANL VO(CANL) −2 V 3 VTEST 3 7 V 330 W +1% Figure 3. Driver VOD Test Circuit CANH VCC VI TXD RL = 60 W ±1% VI (See Note A) VCC/2 0V VO tPLH CL = 100 pF (see Note B) VO S VCC/2 tPHL 10% CANL VO(D) 90% 0.9 V tr tf 0.5 V VO(R) Figure 4. Driver Test Circuit and Voltage Waveforms CANH RXD VI (CANH) V + VI (CANL) VIC = I (CANH) 2 VI (CANL) IO VID CANL VO Figure 5. Receiver Voltage and Current Definitions Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback 7 SN65HVD1050-Q1 SLLS696C – MAY 2006 – REVISED DECEMBER 2010 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) 3.5 V CANH VI RXD VI 1.5 V 2.4 V IO 1.5 V tPLH CANL (See Note A) 2V STB CL = 15 pF ±20% (See Note B) VO VO tPHL 0.25 VCC 90% VOH 0.75 VCC 10% VOL tf tr A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes instrumentation and fixture capacitance within ±20%. Figure 6. Receiver Test Circuit and Voltage Waveforms Table 3. Differential Input Voltage Threshold Test INPUT OUTPUT VCANH VCANL |VID| –11.1 V –12 V 900 mV L R 12 V 11.1 V 900 mV L –6 V –12 V 6V L 12 V 6V 6V L –11.5 V –12 V 500 mV H 12 V 11.5 V 500 mV H –12 V –6 V 6V H 6V 12 V 6V H Open Open X H VOL VOH DUT CANH TXD 0V VI STB RXD CL (A) VCC 60 W ±1% VI (B) 0.5 VCC 0V CANL VOH 0.5 VCC VO ten + VOL VO 15 pF ± 20% _ A. CL = 100 pF and includes instrumentation and fixture capacitance within ±20%. B. All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure 7. ten Test Circuit and Waveforms 8 Submit Documentation Feedback Copyright © 2006–2010, Texas Instruments Incorporated SN65HVD1050-Q1 www.ti.com SLLS696C – MAY 2006 – REVISED DECEMBER 2010 CANH TXD VI RL CANL STB VOC = VO(CANL) VO(CANH) + VO(CANL) 2 VOC(SS) VOC VO(CANH) NOTE: All VI input pulses are from 0 V to VCC and supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure 8. Common-Mode Output Voltage Test and Waveforms DUT VCC CANH (B) VI TXD (A) CL 60 W ± 1% TXD Input 0.5 VCC 0V tloop2 tloop1 VOH CANL S RXD Output 0.5 VCC 0.5 VCC VOL RXD + VO 15 pF ± 20% _ A. CL = 100 pF and includes instrumentation and fixture capacitance within ±20%. B. All VI input pulses are from 0 V to VCC and supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure 9. t(LOOP) Test Circuit and Waveforms CANH VCC VI TXD VI RL = 60 W ±1% CL (B) 0V VOD VOD(D) (A) VOD STB 900 mV 500 mV CANL 0V tdom A. All VI input pulses are from 0 V to VCC and supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 500 Hz, 50% duty cycle. B. CL = 100 pF includes instrumentation and fixture capacitance within ±20%. Figure 10. Dominant Time-Out Test Circuit and Waveforms Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback 9 SN65HVD1050-Q1 SLLS696C – MAY 2006 – REVISED DECEMBER 2010 www.ti.com | IOS(SS) | | IOS(P) | IOS 200 ms CANH TXD 0V 0 V or VCC 12 V S CANL VIN −12 V or 12 V Vin 0V or 0V 10 ms Vin −12 V Figure 11. Driver Short-Circuit Current Test and Waveforms 10 Submit Documentation Feedback Copyright © 2006–2010, Texas Instruments Incorporated SN65HVD1050-Q1 www.ti.com SLLS696C – MAY 2006 – REVISED DECEMBER 2010 Equivalent Input and Output Schematic Diagrams TXD Input VCC RXD Output VCC 25 W 4.3 kW Output Input 6V 6V CANL Input CANH Input VCC VCC 10 kW 10 kW 20 kW 20 kW Input Input 10 kW 40 V 10 kW 40 V CANH and CANL Outputs S Input VCC VCC CANH 4.3 kW Input 6V CANL 40 kW 40 V 40 V Vref Output VCC 2 kW Output 2 kW Copyright © 2006–2010, Texas Instruments Incorporated 40 V Submit Documentation Feedback 11 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN65HVD1050QDRQ1 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 H1050Q (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of