SN54ABT2244A, SN74ABT2244A
OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS106E – JANUARY 1991 – REVISED MAY 1997
D
D
D
D
description
These octal buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. Together with the SN54ABT2240,
SN74ABT2240A, and ’ABT2241, these devices
provide the choice of selected combinations of
inverting and noninverting outputs, symmetrical
active-low output-enable (OE) inputs, and
complementary OE and OE inputs. These devices
feature high fan-out and improved fan-in.
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
SN54ABT2244A . . . FK PACKAGE
(TOP VIEW)
1A2
2Y3
1A3
2Y2
1A4
2OE
D
SN54ABT2244A . . . J OR W PACKAGE
SN74ABT2244A . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
2Y4
1A1
1OE
VCC
D
Output Ports Have Equivalent 25-Ω Series
Resistors, So No External Resistors Are
Required
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
High-Impedance State During Power Up
and Power Down
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Plastic (N) and Ceramic (J) DIPs, and
Ceramic Flat (W) Packages
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
1Y1
2A4
1Y2
2A3
1Y3
2Y1
GND
2A1
1Y4
2A2
D
The outputs, which are designed to sink up to 12 mA, include equivalent 25-Ω series resistors to reduce
overshoot and undershoot.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT2244A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT2244A is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
SN54ABT2244A, SN74ABT2244A
OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS106E – JANUARY 1991 – REVISED MAY 1997
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
logic symbol†
1OE
1A1
1A2
1A3
1A4
1
2OE
EN
2
1
18
4
16
6
14
8
12
1Y1
2A1
1Y2
2A2
1Y3
2A3
1Y4
2A4
19
11
EN
9
1
13
7
15
5
17
3
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1OE
1A1
1A2
1A3
1A4
2
1
2OE
2
18
4
16
6
14
8
12
1Y1
2A1
1Y2
2A2
1Y3
2A3
1Y4
2A4
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19
11
9
13
7
15
5
17
3
• DALLAS, TEXAS 75265
2Y1
2Y2
2Y3
2Y4
2Y1
2Y2
2Y3
2Y4
SN54ABT2244A, SN74ABT2244A
OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS106E – JANUARY 1991 – REVISED MAY 1997
schematic of Y outputs
VCC
Output
GND
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,
which use a trace length of zero.
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SN54ABT2244A, SN74ABT2244A
OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS106E – JANUARY 1991 – REVISED MAY 1997
recommended operating conditions (see Note 3)
SN54ABT2244A
MIN
MAX
4.5
5.5
4.5
5.5
Supply voltage
VIL
VI
Low-level input voltage
IOH
IOL
High-level output current
∆t/∆v
Input transition rise or fall rate
∆t/∆VCC
TA
Power-up ramp rate
200
Operating free-air temperature
–55
2
2
0.8
Input voltage
0
Low-level output current
Outputs enabled
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
4
MAX
VCC
VIH
High-level input voltage
SN74ABT2244A
MIN
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• DALLAS, TEXAS 75265
VCC
–24
V
V
0.8
0
UNIT
VCC
–32
V
V
mA
12
12
mA
5
5
ns/V
µs/V
200
125
–40
85
°C
SN54ABT2244A, SN74ABT2244A
OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS106E – JANUARY 1991 – REVISED MAY 1997
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V,
II = –18 mA
IOH = –3 mA
VCC = 5 V,
VCC = 4
4.5
5V
SN54ABT2244A
MIN
–1.2
MAX
SN74ABT2244A
MIN
–1.2
2.5
IOH = –3 mA
IOH = –24 mA
3
3
3
2
2
IOH = –32 mA
IOL = 12 mA
2*
II
VCC = 5.5 V,
VI = VCC or GND
VCC = 0 to 2.1 V,
VO = 0.5 V to 2.7 V, OE = X
MAX
–1.2
2.5
VCC = 4.5 V,
IOZPD‡
VCC = 2.1 V to 0,
VO = 0.5 V to 2.7 V, OE = X
IOZH
IOZL
VCC = 2.1 V to 5.5 V, VO = 2.7 V, OE ≥ 2 V
VCC = 2.1 V to 5.5 V, VO = 0.5 V, OE ≥ 2 V
Ioff
VCC = 0,
VCC = 5.5 V,
VO = 5.5 V
VI or VO ≤ 4.5 V
VCC = 5.5 V,
VO = 2.5 V
Outputs high
ICEX
IO§
5 5 V,
V IO = 0,
0
VCC = 5.5
VI = VCC or GND
ICC
V
2
0.8
0.8
0.8
±1
±1
±1
Outputs high
V
µA
±50
±50
±50
µA
±50
±50
±50
µA
mV
10
50
10
µA
–10
–50
–10
µA
±100
µA
50
µA
–180
mA
250
µA
±100
50
–50
UNIT
V
100
IOZPU‡
Ci
TA = 25°C
TYP†
MAX
2.5
VOL
Vhys
∆ICC¶
MIN
–100
–180
1
250
50
–50
–180
–50
250
Outputs low
24
30
30
30
mA
Outputs disabled
0.5
250
250
250
µA
Outputs enabled
1.5
1.5
1.5
Outputs disabled
0.05
0.05
0.05
1.5
1.5
1.5
Data
inputs
VCC = 5.5 V,
One input at 3.4 V,,
Other inputs at
VCC or GND
Control
inputs
VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND
VI = 2.5 V or 0.5 V
VO = 2.5 V or 0.5 V
4
Co
5.5
* On products compliant to MIL-PRF-38535, this parameter does not apply.
† All typical values are at VCC = 5 V.
‡ This parameter is characterized, but not production tested.
§ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
¶ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
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mA
pF
pF
5
SN54ABT2244A, SN74ABT2244A
OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS106E – JANUARY 1991 – REVISED MAY 1997
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
SN54ABT2244A
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
Y
tPZH
tPZL
OE
Y
tPHZ
tPLZ
OE
Y
VCC = 5 V,
TA = 25°C
MIN
MAX
MIN
TYP
MAX
1
3.4
4.4
1
5.3
1
4.5
6.3
1
6.8
1.1
3.8
5.5
1.1
6.5
2.1
6.3
9
2.1
10.2
2.1
4.5
6.9
2.1
7
1.7
4.3
6.9
1.7
7.4
UNIT
ns
ns
ns
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
SN74ABT2244A
PARAMETER
6
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
Y
tPZH
tPZL
OE
Y
tPHZ
tPLZ
OE
Y
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• DALLAS, TEXAS 75265
VCC = 5 V,
TA = 25°C
MIN
MAX
MIN
TYP
MAX
1
3.4
4.3
1
4.7
1
4.5
5.3
1
5.6
1.1
3.8
4.8
1.1
5.5
2.1
6.3
7.3
2.1
8.3
2.1
4.5
5.6
2.1
6.6
1.7
4.3
5.3
1.7
5.8
UNIT
ns
ns
ns
SN54ABT2244A, SN74ABT2244A
OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS106E – JANUARY 1991 – REVISED MAY 1997
PARAMETER MEASUREMENT INFORMATION
500 Ω
From Output
Under Test
S1
7V
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
3V
LOAD CIRCUIT
Timing Input
1.5 V
0V
tw
tsu
3V
th
3V
1.5 V
Input
1.5 V
Data Input
0V
1.5 V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
3V
3V
1.5 V
Input
Output
Control
1.5 V
0V
1.5 V
1.5 V
VOL
tPLH
tPHL
VOH
Output
1.5 V
1.5 V
VOL
1.5 V
0V
tPLZ
Output
Waveform 1
S1 at 7 V
(see Note B)
VOH
Output
1.5 V
tPZL
tPHL
tPLH
1.5 V
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
3.5 V
VOL + 0.3 V
VOL
tPHZ
tPZH
1.5 V
VOH – 0.3 V
VOH
≈0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN74ABT2244ADBR
ACTIVE
SSOP
DB
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AA244A
Samples
SN74ABT2244ADW
ACTIVE
SOIC
DW
20
25
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
ABT2244A
Samples
SN74ABT2244ADWR
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
ABT2244A
Samples
SN74ABT2244AN
ACTIVE
PDIP
N
20
20
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 85
SN74ABT2244AN
Samples
SN74ABT2244ANSR
ACTIVE
SO
NS
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
ABT2244A
Samples
SN74ABT2244APW
ACTIVE
TSSOP
PW
20
70
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AA244A
Samples
SN74ABT2244APWR
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AA244A
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of