SCBS159E − JANUARY 1991 − REVISED APRIL 2005
D State-of-the-Art EPIC-ΙΙB BiCMOS Design
D
D
D
D
D
D
SN54ABT827 . . . JT PACKAGE
SN74ABT827 . . . DB, DW, NT, OR PW PACKAGE
(TOP VIEW)
Significantly Reduces Power Dissipation
Flow-Through Architecture Optimizes PCB
Layout
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
High-Impedance State During Power Up
and Power Down
High-Drive Outputs (−32-mA IOH, 64-mA IOL)
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK), and
Plastic (NT) and Ceramic (JT) DIPs
OE1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
GND
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
VCC
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
OE2
SN54ABT827 . . . FK PACKAGE
(TOP VIEW)
A2
A1
OE1
NC
VCC
Y1
Y2
description
These 10-bit buffers or bus drivers provide a
high-performance bus interface for wide data
paths or buses carrying parity.
5
3 2 1 28 27 26
25
6
24
7
23
8
22
9
21
10
20
4
A3
A4
A5
NC
A6
A7
A8
The 3-state control gate is a 2-input AND gate with
active-low inputs so that, if either output-enable
(OE1 or OE2) input is high, all ten outputs are in
the high-impedance state. The ’ABT827 provides
true data at the outputs.
A9
A10
GND
NC
OE2
Y10
Y9
When VCC is between 0 and 2.1 V, the device
is in the high-impedance state during power up
or power down. However, to ensure
the high-impedance state above 2.1 V, OE should
be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by
the current-sinking capability of the driver.
11
19
12 13 14 15 16 17 18
Y3
Y4
Y5
NC
Y6
Y7
Y8
NC − No internal connection
The SN54ABT827 is characterized for operation over the full military temperature range of −55°C to 125°C. The
SN74ABT827 is characterized for operation from −40°C to 85°C.
FUNCTION TABLE
INPUTS
A
OUTPUT
Y
OE1
OE2
L
L
L
L
L
L
H
H
H
X
X
Z
X
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments.
Copyright 2005, Texas Instruments Incorporated
!"#$% ! & '("") % $& ! *(+, '$% ! -$%).
"!-('%& '! !"# %! &*)' '$% ! & *)" %/) %)"#& ! )0$& &%"(#) %&
&%$ -$"- 1$""$ %2. "!-('% ! *"!')&& 3 -!)& !% )')&&$" ,2 ',(-)
%)&% 3 ! $,, *$"$#)%)"&.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCBS159E − JANUARY 1991 − REVISED APRIL 2005
logic symbol†
1
OE1
OE2
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
13
2
logic diagram (positive logic)
OE1
&
OE2
EN
1
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
A1
1
13
2
23
Y1
Y1
Y2
To Nine Other Channels
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the DB, DW, JT, NT, and PW packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . −0.5 V to 5.5 V
Current into any output in the low state, IO: SN54ABT827 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74ABT827 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W
NT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,
which use a trace length of zero.
2
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• DALLAS, TEXAS 75265
SCBS159E − JANUARY 1991 − REVISED APRIL 2005
recommended operating conditions (see Note 3)
SN54ABT827
SN74ABT827
MIN
MAX
MIN
MAX
4.5
5.5
4.5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
IOH
IOL
High-level output current
VCC
−24
Low-level output current
48
64
mA
∆t/∆v
Input transition rise or fall rate
5
5
ns/V
∆t/∆VCC
TA
Power-up ramp rate
200
Operating free-air temperature
−55
High-level input voltage
2
2
0.8
Input voltage
0
V
0.8
0
VCC
−32
−40
V
V
mA
µs/V
200
125
V
85
°C
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
POST OFFICE BOX 655303
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3
SCBS159E − JANUARY 1991 − REVISED APRIL 2005
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V,
II = −18 mA
IOH = −3 mA
VCC = 5 V,
VCC = 4.5 V
VOL
Vhys
II
IOZPU‡
IOZPD‡
IOZH
IOZL
Ioff
ICEX
IO¶
VCC = 4.5 V
∆ICC#
Ci
MIN
SN74ABT827
MAX
−1.2
MIN
−1.2
MAX
−1.2
2.5
2.5
IOH = −3 mA
IOH = −24 mA
3
3
3
2
2
IOH = −32 mA
IOL = 48 mA
2*
UNIT
V
V
2
0.55
0.55
0.55*
0.55
100
V
mV
VCC = 0 to 5.5 V,
VI = VCC or GND
VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V, OE = X
±1
±1
±1
µA
±50
±10
±50
µA
VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V, OE = X
VCC = 2.1 V to 5.5 V, VO = 2.7 V, OE ≥ 2 V
±50
10§
±10
µA
10
±50
10§
−10§
−10
−10§
µA
±100
µA
50
−225§
mA
VCC = 2.1 V to 5.5 V, VO = 0.5 V, OE ≥ 2 V
VCC = 0,
VI or VO ≤ 5.5 V
VCC = 5.5 V, VO = 5.5 V
VCC = 5.5 V,
VCC = 5.5 V,
One input at 3.4 V,
Other inputs at VCC or GND
±100
Outputs high
VO = 2.5 V
Outputs high
−50
−140
50
−225§
80
50
−225§
−50
−50
µA
µA
µA
Outputs low
35
250
40§
250
40§
250
40§
mA
Outputs disabled
80
250
250
250
µA
Outputs enabled
1.5
1.5
1.5
mA
Outputs disabled
50
50
50
µA
1.5
1.5
1.5
mA
Control inputs
VI = 2.5 V or 0.5 V
VO = 2.5 V or 0.5 V
Co
SN54ABT827
2.5
IOL = 64 mA
VCC = 5.5 V, IO = 0,
VI = VCC or GND
ICC
TA = 25°C
TYP†
MAX
MIN
4
pF
8
pF
* On products compliant to MIL-PRF-38535, this parameter does not apply.
† All typical values are at VCC = 5 V.
‡ This parameter is characterized, but not production tested.
§ This data sheet limit may vary among suppliers.
¶ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
# This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
Y
tPZH
tPZL
OE
Y
tPHZ
tPLZ
OE
Y
PARAMETER
VCC = 5 V,
TA = 25°C
POST OFFICE BOX 655303
SN74ABT827
MIN
TYP
MAX
MIN
MAX
MIN
MAX
1.1
2.6
4.4
1.1
4.9
1.1
4.8
1.1
1§
2.3
4.1
1.1
4.8
4.7
3.2
5.1
1
6
1.1
1§
7.1
1§
6.9
2
1.3§
6.8
1§
3.3
5.9
2
1.3§
4.9
6.3
2
7
4.2
6.6
1.3
7.9
§ This data sheet limit may vary among suppliers.
4
SN54ABT827
• DALLAS, TEXAS 75265
1
UNIT
ns
5.9
6.9
ns
ns
SCBS159E − JANUARY 1991 − REVISED APRIL 2005
PARAMETER MEASUREMENT INFORMATION
500 Ω
From Output
Under Test
S1
7V
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
3V
LOAD CIRCUIT
Timing Input
1.5 V
0V
tw
tsu
3V
th
3V
Input
1.5 V
1.5 V
Data Input
0V
1.5 V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
3V
3V
1.5 V
Input
Output
Control
1.5 V
0V
1.5 V
1.5 V
VOL
tPLH
tPHL
VOH
Output
1.5 V
1.5 V
VOL
1.5 V
0V
tPLZ
Output
Waveform 1
S1 at 7 V
(see Note B)
VOH
Output
1.5 V
tPZL
tPHL
tPLH
1.5 V
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
3.5 V
VOL + 0.3 V
VOL
tPHZ
tPZH
1.5 V
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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5
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
5962-9450901QKA
ACTIVE
CFP
W
24
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9450901QK
A
SNJ54ABT827W
5962-9450901QLA
ACTIVE
CDIP
JT
24
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9450901QL
A
SNJ54ABT827JT
SN74ABT827DBR
ACTIVE
SSOP
DB
24
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AB827
Samples
SN74ABT827DW
ACTIVE
SOIC
DW
24
25
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
ABT827
Samples
SN74ABT827DWR
ACTIVE
SOIC
DW
24
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
ABT827
Samples
SN74ABT827PW
ACTIVE
TSSOP
PW
24
60
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AB827
Samples
SN74ABT827PWR
ACTIVE
TSSOP
PW
24
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AB827
Samples
SNJ54ABT827JT
ACTIVE
CDIP
JT
24
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9450901QL
A
SNJ54ABT827JT
SNJ54ABT827W
ACTIVE
CFP
W
24
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9450901QK
A
SNJ54ABT827W
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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