SN74ABTR2245NSR

SN54ABTR2245, SN74ABTR2245 OCTAL TRANSCEIVERS AND LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS SCBS680A – MARCH 1997 – REVISED MAY 1997 D D D D D SN54ABTR2245 . . . J PACKAGE SN74ABTR2245 . . . DB, DGV, DW, N, OR PW PACKAGE (TOP VIEW) DIR A1 A2 A3 A4 A5 A6 A7 A8 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE B1 B2 B3 B4 B5 B6 B7 B8 SN54ABTR2245 . . . FK PACKAGE (TOP VIEW) A3 A4 A5 A6 A7 description 4 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 B1 B2 B3 B4 B5 A8 GND B8 B7 B6 These octal transceivers and line drivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated. 3 OE D Outputs Have Equivalent 25-Ω Series Resistors, So No External Resistors Are Required State-of-the-Art EPIC-ΙΙB  BiCMOS Design Significantly Reduces Power Dissipation High-Impedance State During Power Up and Power Down Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 ESD Protection Exceeds 2000 V Per MIL-STD-833, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and Thin Very Small-Outline (DGV) Packages, Ceramic Chip Carriers (FK), and Plastic (N) and Ceramic (J) DIPs A2 A1 DIR VCC D Both the A-port and B-port outputs, which are designed to sink up to 12 mA, include equivalent 25-Ω series resistors to reduce overshoot and undershoot. When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABTR2245 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74ABTR2245 is characterized for operation from –40°C to 85°C. FUNCTION TABLE INPUTS OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC-ΙΙB is a trademark of Texas Instruments Incorporated. Copyright  1997, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ABTR2245, SN74ABTR2245 OCTAL TRANSCEIVERS AND LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS SCBS680A – MARCH 1997 – REVISED MAY 1997 logic symbol† 19 OE 1 DIR 2 A1 G3 3 EN1 [BA] 3 EN2 [AB] 18 1 B1 2 A2 A3 A4 A5 A6 A7 A8 3 17 4 16 5 15 6 14 7 13 8 12 9 11 B2 B3 B4 B5 B6 B7 B8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) DIR 1 19 A1 2 18 To Seven Other Channels 2 OE POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 B1 SN54ABTR2245, SN74ABTR2245 OCTAL TRANSCEIVERS AND LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS SCBS680A – MARCH 1997 – REVISED MAY 1997 output schematic VCC 25 Ω Output GND All resistor values shown are nominal. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages, which use a trace length of zero. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54ABTR2245, SN74ABTR2245 OCTAL TRANSCEIVERS AND LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS SCBS680A – MARCH 1997 – REVISED MAY 1997 recommended operating conditions (see Note 3) SN54ABTR2245 MIN MAX 4.5 5.5 4.5 5.5 Supply voltage VIL VI Low-level input voltage IOH IOL High-level output current ∆t /∆v Input transition rise or fall rate ∆t/∆VCC TA Power-up ramp rate 200 Operating free-air temperature –55 2 2 0.8 Input voltage 0 Low-level output current Outputs enabled NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 4 MAX VCC VIH High-level input voltage SN74ABTR2245 MIN POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VCC –12 V V 0.8 0 UNIT VCC –12 V V mA 12 12 mA 5 5 ns/V µs/V 200 125 –40 85 °C SN54ABTR2245, SN74ABTR2245 OCTAL TRANSCEIVERS AND LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS SCBS680A – MARCH 1997 – REVISED MAY 1997 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, II = –18 mA IOH = –1 mA VCC = 5 V, VCC = 4 4.5 5V VOL VCC = 4 4.5 5V MIN SN54ABTR2245 MIN –1.2 MAX SN74ABTR2245 MIN –1.2 MAX –1.2 3.35 3.3 3.35 IOH = –1 mA IOH = –3 mA 3.85 3.8 3.85 3 3.1 IOH = –12 mA IOL = 8 mA 2.6 IOL = 12 mA VCC = 0 to 5.5 V, VI = VCC or GND A or B ports VCC = 2.1 V to 5.5 V, VI = VCC or GND V V 0.8 0.65 0.8 0.8 100 Control inputs UNIT 2.6 0.65 Vhys II TA = 25°C TYP† MAX V mV ±1 ±1 ±1 ±20 ±20 ±20 µA IOZH‡ VCC = 2.1 V to 5.5 V, VO = 2.7 V, OE ≥ 2 V 10 10 10 µA IOZL‡ VCC = 2.1 V to 5.5 V, VO = 0.5 V, OE ≥ 2 V –10 –10 –10 µA IOZPU§ VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V, OE = X ±50 ±50 ±50 µA IOZPD§ VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V, OE = X ±50 ±50 ±50 µA Ioff VCC = 0, VCC = 5.5 V, VO = 5.5 V VI or VO ≤ 4.5 V ±100 ±100 µA 50 µA VCC = 5.5 V, VO = 2.5 V Outputs high –100 mA ICEX IO¶ ICC A or B ports Data inputs ∆ICC# Control inputs Ci Cio VCC = 5.5 V, IO = 0, VI = VCC or GND Outputs high 50 –25 –100 50 –25 –100 –25 1 250 250 250 µA Outputs low 24 32 32 32 mA Outputs disabled 0.5 250 250 250 µA 1.5 1.5 1.5 0.05 0.05 0.05 1.5 1.5 1.5 VCC = 5.5 V, Outputs enabled One input at 3.4 V,, Other inputs at Outputs disabled VCC or GND VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V mA 3 pF 6 pF * On products compliant to MIL-PRF–38535, this parameter does not apply. † All typical values are at VCC = 5 V. ‡ The parameters IOZH and IOZL include the input leakage current. § This parameter is characterized but not production tested. ¶ Not more than one output should be tested at a time, and the duration of the test should not exceed one second. # This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN54ABTR2245, SN74ABTR2245 OCTAL TRANSCEIVERS AND LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS SCBS680A – MARCH 1997 – REVISED MAY 1997 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL A or B B or A tPZH tPZL OE A or B tPHZ tPLZ OE A or B PARAMETER VCC = 5 V, TA = 25°C SN54ABTR2245 MIN TYP MAX MIN MAX MIN MAX 1 2.5 3.4 1 4 1 3.8 1 3.2 4.2 1 4.6 1 4.5 1.5 3.6 4.9 1.5 6.3 1.5 6.1 1.5 3.9 5.3 1.5 6.6 1.5 6.3 1.5 3.6 4.7 1.5 5.5 1.5 5.3 1.5 3.3 4.4 1.5 4.9 1.5 4.8 PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 6 POST OFFICE BOX 655303 SN74ABTR2245 • DALLAS, TEXAS 75265 UNIT ns ns ns SN54ABTR2245, SN74ABTR2245 OCTAL TRANSCEIVERS AND LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS SCBS680A – MARCH 1997 – REVISED MAY 1997 PARAMETER MEASUREMENT INFORMATION 7V S1 500 Ω From Output Under Test Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V Open LOAD CIRCUIT 3V Timing Input 1.5 V 0V tw tsu 3V Input 1.5 V th 3V 1.5 V Data Input 1.5 V 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.5 V Input 0V 1.5 V 1.5 V VOL tPLH tPHL VOH Output 1.5 V 1.5 V VOL 1.5 V 0V tPLZ Output Waveform 1 S1 at 7 V (see Note B) VOH Output 1.5 V tPZL tPHL tPLH 3V Output Control 1.5 V Output Waveform 2 S1 at Open (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V tPZH 3.5 V VOL + 0.3 V VOL tPHZ 1.5 V VOH – 0.3 V VOH ≈0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 PACKAGE MATERIALS INFORMATION www.ti.com 3-Jun-2022 TAPE AND REEL INFORMATION REEL DIMENSIONS TAPE DIMENSIONS K0 P1 B0 W Reel Diameter Cavity A0 B0 K0 W P1 A0 Dimension designed to accommodate the component width Dimension designed to accommodate the component length Dimension designed to accommodate the component thickness Overall width of the carrier tape Pitch between successive cavity centers Reel Width (W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Sprocket Holes Q1 Q2 Q1 Q2 Q3 Q4 Q3 Q4 User Direction of Feed Pocket Quadrants *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74ABTR2245DWR SOIC DW 20 2000 330.0 24.4 10.8 13.3 2.7 12.0 24.0 Q1 SN74ABTR2245PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.0 1.4 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 3-Jun-2022 TAPE AND REEL BOX DIMENSIONS Width (mm) W L H *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ABTR2245DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74ABTR2245PWR TSSOP PW 20 2000 356.0 356.0 35.0 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 3-Jun-2022 TUBE T - Tube height L - Tube length W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) SN74ABTR2245DW DW SOIC 20 25 507 12.83 5080 6.6 Pack Materials-Page 3 IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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