SN74AC374N

SN54AC374, SN74AC374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS543E − OCTOBER 1995 - REVISED OCTOBER 2003 D SN54AC374 . . . J OR W PACKAGE SN74AC374 . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW) 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 9.5 ns at 5 V 3-State Noninverting Outputs Drive Bus Lines Directly Full Parallel Access for Loading OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND description/ordering information These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK SN54AC374 . . . FK PACKAGE (TOP VIEW) 1D 1Q OE VCC The eight flip-flops of the ’AC374 devices are D-type edge-triggered flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs. 2D 2Q 3Q 3D 4D 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 8D 7D 7Q 6Q 6D 4Q GND CLK 5Q 5D A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines in bus-organized systems without need for interface or pullup components. 8Q D D D D OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. ORDERING INFORMATION PDIP − N SN74AC374N Tube SN74AC374DW Tape and reel SN74AC374DWR SOP − NS Tape and reel SN74AC374NSR AC374 SSOP − DB Tape and reel SN74AC374DBR AC374 Tube SN74AC374PW Tape and reel SN74AC374PWR CDIP − J Tube SNJ54AC374J SNJ54AC374J CFP − W Tube SNJ54AC374W SNJ54AC374W LCCC − FK Tube SNJ54AC374FK SNJ54AC374FK TSSOP − PW −55°C 55 C to 125 125°C C † TOP-SIDE MARKING Tube SOIC − DW −40°C 40 C to 85°C 85 C ORDERABLE PART NUMBER PACKAGE† TA SN74AC374N AC374 AC374 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright © 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54AC374, SN74AC374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS543E − OCTOBER 1995 - REVISED OCTOBER 2003 description/ordering information (continued) To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE (each flip-flop) INPUTS OE CLK D OUTPUT Q L ↑ H H L ↑ L L L H or L X Q0 H X X Z logic diagram (positive logic) OE CLK 1 11 C1 1D 3 2 1Q 1D To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54AC374, SN74AC374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS543E − OCTOBER 1995 - REVISED OCTOBER 2003 recommended operating conditions (see Note 3) SN54AC374 VCC Supply voltage VCC = 3 V VIH High-level High level input voltage VIL Low-level Low level input voltage VI Input voltage VO Output voltage IOH High-level High level output current IOL Low-level Low level output current Δt/Δv Input transition rise or fall rate TA Operating free-air temperature MIN MAX 2 6 SN74AC374 MIN MAX 2 6 2.1 2.1 VCC = 4.5 V 3.15 3.15 VCC = 5.5 V 3.85 3.85 UNIT V V VCC = 3 V 0.9 0.9 VCC = 4.5V 1.35 1.35 VCC = 5.5 V 1.65 1.65 V 0 VCC 0 VCC V 0 VCC 0 VCC V VCC = 3 V −12 −12 VCC = 4.5 V −24 −24 VCC = 5.5 V −24 −24 VCC = 3 V 12 12 VCC = 4.5 V 24 24 VCC = 5.5 V 24 24 8 8 ns/V 85 °C −55 125 −40 mA mA NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −50 50 μA VOH IOH = −12 mA 24 mA IOH = −24 IOL = 50 μA VOL IOL = 12 mA IOL = 24 mA VCC TA = 25°C MIN TYP SN54AC374 MAX MIN MAX SN74AC374 MIN 3V 2.9 2.9 2.9 4.5 V 4.4 4.4 4.4 5.5 V 5.4 5.4 5.4 3V 2.56 2.4 2.46 4.5 V 3.86 3.7 3.76 5.5 V 4.86 4.7 4.76 MAX UNIT V 3V 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 5.5 V 0.1 0.1 0.1 3V 0.36 0.5 0.44 4.5 V 0.36 0.5 0.44 5.5 V 0.36 0.5 0.44 V II VI = VCC or GND 5.5 V ±0.1 ±1 ±1 μA IOZ VO = VCC or GND 5.5 V ±0.25 ±5 ±2.5 μA ICC VI = VCC or GND, 4 80 40 μA Ci VI = VCC or GND IO = 0 5.5 V 5V POST OFFICE BOX 655303 4.5 • DALLAS, TEXAS 75265 pF 3 SN54AC374, SN74AC374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS543E − OCTOBER 1995 - REVISED OCTOBER 2003 timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) TA = 25°C MIN SN54AC374 MAX MIN MAX 60 SN74AC374 MIN MAX 60 60 UNIT fclock Clock frequency tw Pulse duration, CLK high or low 5.5 6.5 6 MHz ns tsu Setup time, data before CLK↑ 5.5 6.5 6 ns th Hold time, data after CLK↑ 1 1 1 ns timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) TA = 25°C MIN SN54AC374 MAX MIN 100 MAX SN74AC374 MIN 95 MAX 100 UNIT fclock Clock frequency MHz tw Pulse duration, CLK high or low 4 5 4.5 ns tsu Setup time, data before CLK↑ 4 5 4.5 ns th Hold time, data after CLK↑ 1.5 1.5 1.5 ns switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER TO (INPUT) TO (OUTPUT) fmax tPLH tPHL tPZH tPZL tPHZ tPLZ CLK Q OE Q OE Q TA = 25°C MIN TYP 60 110 SN54AC374 MAX MIN MAX 60 SN74AC374 MIN MAX 60 UNIT MHz 3 11 13.5 3 16.5 1.5 15.5 2.5 10 12.5 3 15 2 14 3 9.5 11.5 1 14 1.5 13 3.5 9 11.5 1 14 1.5 13 3 10.5 12.5 1 16 2 14.5 2 8 11.5 1 13 1 12.5 ns ns ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER TO (INPUT) TO (OUTPUT) TA = 25°C SN54AC374 MIN TYP fmax 100 155 tPLH 2.5 8 9.5 3 12 1.5 10.5 2 7 9 3 11 1.5 10 2 7 8.5 1.5 10 1 9.5 2 6.5 8.5 1.5 10.5 1 9.5 tPHL tPZH tPZL tPHZ tPLZ CLK Q OE Q OE Q MAX MIN MAX SN74AC374 95 MIN MAX 100 UNIT MHz 2 8 11 1.5 12.5 2 12.5 1.5 6.5 8.5 1.5 10.5 1 10 ns ns ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd 4 TEST CONDITIONS Power dissipation capacitance CL = 50 pF, POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 f = 1 MHz TYP UNIT 40 pF SN54AC374, SN74AC374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS543E − OCTOBER 1995 - REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION 2 × VCC S1 500 Ω From Output Under Test CL = 50 pF (see Note A) Open TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 × VCC Open 500 Ω LOAD CIRCUIT VCC 50% VCC Timing Input 0V tw tsu 3V Input 50% VCC 50% VCC th VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS VCC Input 50% VCC 50% VCC 0V tPHL tPLH In-Phase Output 50% VCC tPHL Out-of-Phase Output Output Control (low-level enabling) VOH 50% VCC VOL VOH 50% VCC VOL 50% VCC 0V tPZL Output Waveform 1 S1 at 2 × VCC (see Note B) tPLH 50% VCC VCC 50% VCC tPLZ ≈VCC 50% VCC VOL tPHZ tPZH Output Waveform 2 S1 at Open (see Note B) VOLTAGE WAVEFORMS VOL + 0.3 V 50% VCC VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-87694012A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 596287694012A SNJ54AC 374FK 5962-8769401RA ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8769401RA SNJ54AC374J Samples 5962-8769401SA ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8769401SA SNJ54AC374W Samples SN74AC374DBR ACTIVE SSOP DB 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AC374 Samples SN74AC374DW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AC374 Samples SN74AC374DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AC374 Samples SN74AC374N ACTIVE PDIP N 20 20 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74AC374N Samples SN74AC374NSR ACTIVE SO NS 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AC374 Samples SN74AC374PW ACTIVE TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AC374 Samples SN74AC374PWR ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AC374 Samples SNJ54AC374FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 596287694012A SNJ54AC 374FK SNJ54AC374J ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8769401RA SNJ54AC374J Samples SNJ54AC374W ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8769401SA SNJ54AC374W Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1 Samples Samples PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of