SN54AHC126, SN74AHC126
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS257L – DECEMBER 1995 – REVISED JULY 2003
D
D
SN54AHC126 . . . J OR W PACKAGE
SN74AHC126 . . . D, DB, DGV, N, NS, OR PW PACKAGE
(TOP VIEW)
Operating Range 2-V to 5.5-V VCC
Latch-Up Performance Exceeds 250 mA Per
JESD 17
1OE
1A
1Y
2OE
2A
2Y
GND
description/ordering information
The ’AHC126 devices are quadruple bus buffer
gates featuring independent line drivers with
3-state outputs. Each output is disabled when the
associated output-enable (OE) input is low. When
OE is high, the respective gate passes the data
from the A input to its Y output.
To ensure the high-impedance state during power
up or power down, OE should be tied to GND
through a pulldown resistor; the minimum value of
the resistor is determined by the current-sourcing
capability of the driver.
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
4OE
4A
4Y
3OE
3A
3Y
1A
1OE
NC
VCC
4OE
SN54AHC126 . . . FK PACKAGE
(TOP VIEW)
4
3
2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A
NC
4Y
NC
3OE
2Y
GND
NC
3Y
3A
1Y
NC
2OE
NC
2A
NC – No internal connection
ORDERING INFORMATION
PDIP – N
SN74AHC126N
Tube
SN74AHC126D
Tape and reel
SN74AHC126DR
SOP – NS
Tape and reel
SN74AHC126NSR
AHC126
SSOP – DB
Tape and reel
SN74AHC126DBR
HA126
Tube
SN74AHC126PW
Tape and reel
SN74AHC126PWR
TVSOP – DGV
Tape and reel
SN74AHC126DGVR
HA126
CDIP – J
Tube
SNJ54AHC126J
SNJ54AHC126J
CFP – W
Tube
SNJ54AHC126W
SNJ54AHC126W
LCCC – FK
Tube
SNJ54AHC126FK
SNJ54AHC126FK
TSSOP – PW
–55°C to 125°C
TOP-SIDE
MARKING
Tube
SOIC – D
–40°C to 85°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
SN74AHC126N
AHC126
HA126
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN54AHC126, SN74AHC126
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS257L – DECEMBER 1995 – REVISED JULY 2003
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
H
H
H
H
L
L
L
X
Z
logic diagram (positive logic)
1OE
1A
2OE
2A
1
2
3OE
3
1Y
4
5
3A
4OE
6
2Y
4A
10
9
8
3Y
13
12
11
4Y
Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN54AHC126, SN74AHC126
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS257L – DECEMBER 1995 – REVISED JULY 2003
recommended operating conditions (see Note 3)
SN54AHC126
VCC
VIH
Supply voltage
VCC = 2 V
VCC = 3 V
High-level input voltage
VI
VO
IOH
Low-level input voltage
MAX
2
5.5
1.5
VCC = 5.5 V
VCC = 2 V
VIL
MIN
∆t/∆v
Output voltage
5.5
2.1
3.85
V
V
0.5
0.9
0.9
1.65
1.65
V
0
5.5
0
5.5
V
0
VCC
–50
0
VCC
–50
mA
VCC = 2 V
VCC = 3.3 V ± 0.3 V
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
VCC = 3.3 V ± 0.3 V
Input transition rise or fall rate
2
UNIT
1.5
0.5
Input voltage
Low-level output current
MAX
2.1
VCC = 5 V ± 0.5 V
VCC = 2 V
IOL
MIN
3.85
VCC = 3 V
VCC = 5.5 V
High-level output current
SN74AHC126
VCC = 5 V ± 0.5 V
–4
–4
–8
–8
50
50
4
4
8
8
100
100
20
20
V
mA
mA
mA
ns/V
TA
Operating free-air temperature
–55
125
–40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
MIN
TA = 25°C
TYP
MAX
2V
1.9
2
1.9
1.9
3V
2.9
3
2.9
2.9
4.5 V
4.4
4.5
4.4
4.4
IOH = –4 mA
3V
2.58
2.48
2.48
IOH = –8 mA
4.5 V
3.94
3.8
3.8
TEST CONDITIONS
VCC
IOH = –50 mA
VOH
IOL = 50 mA
VOL
IOL = 4 mA
II
IOZ
ICC
Ci
IOL = 8 mA
VI = 5.5 V or GND
VO = VCC or GND
VI = VCC or GND,
IO = 0
SN54AHC126
MIN
MAX
SN74AHC126
MIN
MAX
UNIT
V
2V
0.1
0.1
0.1
3V
0.1
0.1
0.1
4.5 V
0.1
0.1
0.1
3V
0.36
0.5
0.44
V
4.5 V
0.36
0.5
0.44
0 V to 5.5 V
±0.1
±1*
±1
mA
5.5 V
±0.25
±2.5
±2.5
mA
5.5 V
4
40
40
mA
10
pF
VI = VCC or GND
5V
4
10
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN54AHC126, SN74AHC126
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS257L – DECEMBER 1995 – REVISED JULY 2003
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH
tPHL
A
Y
CL = 15 pF
tPZH
tPZL
OE
Y
CL = 15 pF
tPHZ
tPLZ
OE
Y
CL = 15 pF
tPLH
tPHL
A
Y
CL = 50 pF
tPZH
tPZL
OE
Y
CL = 50 pF
tPHZ
tPLZ
OE
Y
CL = 50 pF
MIN
TA = 25°C
TYP
MAX
SN54AHC126
SN74AHC126
MIN
MAX
MIN
MAX
5.6*
8*
1*
9.5*
1
9.5
5.6*
8*
1*
9.5*
1
9.5
5.4*
8*
1*
9.5*
1
9.5
5.4*
8*
1*
9.5*
1
9.5
7*
9.7*
1*
11.5*
1
11.5
7*
9.7*
1*
11.5*
1
11.5
8.1
11.5
1
13
1
13
8.1
11.5
1
13
1
13
7.9
11.5
1
13
1
13
7.9
11.5
1
13
1
13
9.5
13.2
1
15
1
15
9.5
13.2
1
15
1
15
tsk(o)
CL = 50 pF
∗ On products compliant to MIL-PRF-38535, this parameter is not production tested.
∗∗ On products compliant to MIL-PRF-38535, this parameter does not apply.
1.5**
1.5
UNIT
ns
ns
ns
ns
ns
ns
ns
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH
tPHL
A
Y
CL = 15 pF
tPZH
tPZL
OE
Y
CL = 15 pF
tPHZ
tPLZ
OE
Y
CL = 15 pF
tPLH
tPHL
A
Y
CL = 50 pF
tPZH
tPZL
OE
Y
CL = 50 pF
tPHZ
tPLZ
OE
Y
CL = 50 pF
TA = 25°C
MIN
TYP
MAX
POST OFFICE BOX 655303
SN74AHC126
MIN
MAX
MIN
MAX
3.8*
5.5*
1*
6.5*
1
6.5
3.8*
5.5*
1*
6.5*
1
6.5
3.6*
5.1*
1*
6*
1
6
3.6*
5.1*
1*
6*
1
6
4.6*
6.8*
1*
8*
1
8
4.6*
6.8*
1*
8*
1
8
5.3
7.5
1
8.5
1
8.5
5.3
7.5
1
8.5
1
8.5
5.1
7.1
1
8
1
8
5.1
7.1
1
8
1
8
6.1
8.8
1
10
1
10
6.1
8.8
1
10
1
10
tsk(o)
CL = 50 pF
∗ On products compliant to MIL-PRF-38535, this parameter is not production tested.
∗∗ On products compliant to MIL-PRF-38535, this parameter does not apply.
4
SN54AHC126
• DALLAS, TEXAS 75265
1**
1
UNIT
ns
ns
ns
ns
ns
ns
ns
SN54AHC126, SN74AHC126
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS257L – DECEMBER 1995 – REVISED JULY 2003
noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4)
SN74AHC126
PARAMETER
MIN
MAX
UNIT
VOL(P)
VOL(V)
Quiet output, maximum dynamic VOL
0.8
V
Quiet output, minimum dynamic VOL
–0.8
V
VOH(V)
VIH(D)
Quiet output, minimum dynamic VOH
4.4
High-level dynamic input voltage
3.5
VIL(D)
Low-level dynamic input voltage
NOTE 4: Characteristics are for surface-mount packages only.
V
V
1.5
V
TYP
UNIT
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance
No load,
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
f = 1 MHz
14
pF
5
SN54AHC126, SN74AHC126
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS257L – DECEMBER 1995 – REVISED JULY 2003
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
RL = 1 kΩ
From Output
Under Test
Test
Point
S1
VCC
Open
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
VCC
50% VCC
Timing Input
tw
tsu
VCC
Input
50% VCC
50% VCC
0V
th
VCC
50% VCC
Data Input
50% VCC
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VCC
50% VCC
Input
50% VCC
0V
tPLH
In-Phase
Output
tPHL
50% VCC
tPHL
Out-of-Phase
Output
VOH
50% VCC
VOL
VCC
Output
Control
Output
Waveform 1
S1 at VCC
(see Note B)
50% VCC
0V
tPZL
VOH
50% VCC
VOL
tPLZ
≈VCC
50% VCC
tPZH
tPLH
50% VCC
50% VCC
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOL + 0.3 V
VOL
tPHZ
50% VCC
VOH – 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
5962-9686201Q2A
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
59629686201Q2A
SNJ54AHC
126FK
5962-9686201QDA
ACTIVE
CFP
W
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9686201QD
A
SNJ54AHC126W
SN74AHC126D
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AHC126
Samples
SN74AHC126DBR
ACTIVE
SSOP
DB
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HA126
Samples
SN74AHC126DGVR
ACTIVE
TVSOP
DGV
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HA126
Samples
SN74AHC126DR
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AHC126
Samples
SN74AHC126N
ACTIVE
PDIP
N
14
25
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 85
SN74AHC126N
Samples
SN74AHC126NSR
ACTIVE
SO
NS
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
AHC126
Samples
SN74AHC126PW
ACTIVE
TSSOP
PW
14
90
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HA126
Samples
SN74AHC126PWR
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HA126
Samples
SN74AHC126PWRG4
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
HA126
Samples
SNJ54AHC126FK
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
59629686201Q2A
SNJ54AHC
126FK
SNJ54AHC126W
ACTIVE
CFP
W
14
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9686201QD
A
SNJ54AHC126W
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
Addendum-Page 1
Samples
Samples
Samples
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of