SN74AHC14D

Product Folder Order Now Technical Documents Support & Community Tools & Software SN54AHC14, SN74AHC14 SCLS238M – OCTOBER 1995 – REVISED MARCH 2017 SNx4AHC14 Hex Schmitt-Trigger Inverters 1 Features 3 Description • The SNx4AHC14 devices contain six independent inverters. These devices perform the boolean function Y = A. 1 • • • • • ESD Protection Exceeds JESD 22: – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) Operating Range: 2 V to 5.5 V ±8-mA Output Drive at 5 V Schmitt-Trigger Inputs Enable Input Noise Resistance Low Power Consumption: 20 µA Maximum ICC Latch-Up Performance Exceeds 250 mA Per JESD 17 Each circuit functions as an independent inverter, but, because of the Schmitt-Trigger action, the inverters have different input threshold levels for positive-going (VT+) and negative-going (VT–) signals. Device Information(1) PART NUMBER SN54AHC14 2 Applications • • • • • • UPS White Goods Computer Peripherals Printers AC Servo Drives Desktop Computers SN74AHC14 PACKAGE BODY SIZE (NOM) CDIP (14) 7.62 mm x 19.94 mm CFP (14) 7.11 mm x 9.11 mm LCCC (20) 8.89 mm x 8.89 mm SOIC (14) 6.00 mm x 8.65 mm SSOP (14) 6.30 mm x 5.30 mm PDIP (14) 7.94 mm x 10.35 mm SO (14) 7.80 mm x 10.20 mm TSSOP (14) 6.40 mm x 5.00 mm TVSOP (14) 3.60 mm x 4.40 mm VQFN (14) 3.50 mm x 3.50 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Logic Diagram (Positive Logic) A Y Copyright © 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN54AHC14, SN74AHC14 SCLS238M – OCTOBER 1995 – REVISED MARCH 2017 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 4 4 4 5 5 6 7 7 Absolute Maximum Ratings ...................................... ESD Ratings ............................................................ Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Switching Characteristics – 3.3 V ............................. Switching Characteristics – 5 V ................................ Typical Characteristics .............................................. Parameter Measurement Information .................. 8 Detailed Description ............................................ 10 8.1 Overview ................................................................. 10 8.2 Functional Block Diagram ....................................... 10 8.3 Feature Description................................................. 10 8.4 Device Functional Modes........................................ 10 9 Application and Implementation ........................ 11 9.1 Application Information............................................ 11 9.2 Typical Application .................................................. 11 10 Power Supply Recommendations ..................... 12 11 Layout................................................................... 12 11.1 Layout Guidelines ................................................. 12 11.2 Layout Example .................................................... 12 12 Device and Documentation Support ................. 13 12.1 12.2 12.3 12.4 12.5 12.6 12.7 Documentation Support ........................................ Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 13 13 13 13 13 13 13 13 Mechanical, Packaging, and Orderable Information ........................................................... 13 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision L (September 2016) to Revision M • Page Added tPLH MIN and MAX specification for SN74AHC14 in Switching Characteristics – 5 V ................................................ 7 Changes from Revision K (June 2013) to Revision L Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .................................................................................................. 1 • Changed RθJA values in the Thermal Information table from 86 to 99.3 (D), from 96 to 112.4 (DB), from 127 to 141.9 (DGV), from 80 to 61.9 (N), from 76 to 94.7 (NS), from 113 to 128.8 (PW), and from 47 to 63.8 (RGY) ............................. 5 Changes from Revision J (October 2010) to Revision K • 2 Page Extended operating temperature range to 125°C................................................................................................................... 1 Submit Documentation Feedback Copyright © 1995–2017, Texas Instruments Incorporated Product Folder Links: SN54AHC14 SN74AHC14 SN54AHC14, SN74AHC14 www.ti.com SCLS238M – OCTOBER 1995 – REVISED MARCH 2017 5 Pin Configuration and Functions SOIC, SSOP, TVSOP, CDIP, PDIP, SO, TSSOP, or CFP Package 14-Pin D, DB, DGV, J, N, NS, PW, or W Top View 1Y 2 13 6A 2A 3 12 1Y 2A 2Y 3A 3Y 6Y 2Y 4 11 5A 3A 5 10 5Y 3Y 6 9 4A GND 7 8 4Y VCC VCC 1 14 2 13 6A 3 12 6Y 5A 4 11 5 10 5Y 9 4A 6 7 8 4Y 14 1A 1 GND 1A VQFN Package 14-Pin RGY Top View Not to scale 1Y 1A NC VCC 6A 3 2 1 20 19 LCCC Package 20-Pin FK Top View 6 16 5A NC 7 15 NC 3A 8 14 5Y 13 NC 2Y 12 6Y 17 11 18 5 10 4 9 2A NC 4A 4Y NC 3Y GND Not to scale Pin Functions PIN SOIC, SSOP, TVSOP, CDIP, PDIP, SO, TSSOP, CFP, VQFN LCCC 1A 1 2 I Channel 1 Input 1Y 2 3 O Channel 1 Output 2A 3 4 I Channel 2 Input 2Y 4 6 O Channel 2 Output 3A 5 8 I Channel 3 Input 3Y 6 9 O Channel 3 Output 4A 9 13 I Channel 4 Input 4Y 8 12 O Channel 4 Output 5A 11 16 I Channel 5 Input 5Y 10 14 O Channel 5 Output 6A 13 19 I Channel 6 Input 6Y 12 18 O Channel 6 Output GND 7 10 — Ground NC — 1, 5, 7, 11, 15, 17 — No internal connection VCC 14 20 — Power supply NAME I/O DESCRIPTION Copyright © 1995–2017, Texas Instruments Incorporated Product Folder Links: SN54AHC14 SN74AHC14 Submit Documentation Feedback 3 SN54AHC14, SN74AHC14 SCLS238M – OCTOBER 1995 – REVISED MARCH 2017 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) Supply voltage, VCC Input voltage, VI (2) Output voltage, VO (2) MIN MAX UNIT –0.5 7 V –0.5 7 V –0.5 VCC + 0.5 V Input clamp current, IIK VI < 0 –20 mA Output clamp current, IOK VO < 0 or VO > VCC ±20 mA Continuous output current, IO VO = 0 to VCC ±25 mA ±50 mA 150 °C 150 °C Continuous current through VCC or GND Virtual operating junction temperature, TJ Storage temperature, Tstg (1) (2) –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 6.2 ESD Ratings VALUE V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±1000 Machine Model (MM), A115-A (1) (2) UNIT V 200 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VCC Supply voltage 2 5.5 V VI Input voltage 0 5.5 V VO Output voltage 0 IOH IOL TA (1) 4 High-level output current Low-level output current Operating free-air temperature VCC V VCC = 2 V –50 µA VCC = 3.3 V ± 0.3 V –4 VCC = 5 V ± 0.5 V –8 VCC = 2 V 50 VCC = 3.3 V ± 0.3 V 4 VCC = 5 V ± 0.5 V 8 SN54AHC14 –55 125 SN74AHC14 –40 125 mA µA mA °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See TI application report, Implications of Slow or Floating CMOS Inputs (SCBA004). Submit Documentation Feedback Copyright © 1995–2017, Texas Instruments Incorporated Product Folder Links: SN54AHC14 SN74AHC14 SN54AHC14, SN74AHC14 www.ti.com SCLS238M – OCTOBER 1995 – REVISED MARCH 2017 6.4 Thermal Information SN74AHC14 THERMAL METRIC (1) D (SOIC) DB (SSOP) DGV (TVSOP) N (PDIP) NS (SO) PW (TSSOP) RGY (VQFN) 14 PINS 14 PINS 14 PINS 14 PINS 14 PINS 14 PINS 14 PINS UNIT RθJA Junction-to-ambient thermal resistance 99.3 112.4 141.9 61.9 94.7 128.8 63.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 59.1 64.3 61.1 49.5 52.5 57.2 76.6 °C/W RθJB Junction-to-board thermal resistance 53.6 59.8 71.3 41.7 53.4 70.6 39.9 °C/W ψJT Junction-to-top characterization parameter 24.8 28.5 9.7 34.7 21.3 9.6 5.2 °C/W ψJB Junction-to-board characterization parameter 53.3 59.3 70.6 41.7 53.1 70 40 °C/W — — — — — — 20 °C/W Junction-to-case RθJC(bot) (bottom) thermal resistance (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.5 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC = 3 V VT+ Positive-going input threshold voltage VT– ΔVT Hysteresis (VT+ – VT–) IOH = –50 µA VOH IOH = –4 mA, VCC = 3 V IOL = –8 mA, VCC = 4.5 V TYP MAX 1.2 2.2 VCC = 4.5 V 1.75 3.15 VCC = 5.5 V 2.15 3.85 0.9 1.9 VCC = 4.5 V 1.35 2.75 VCC = 5.5 V 1.65 3.35 VCC = 3 V 0.3 1.2 VCC = 4.5 V 0.4 1.4 VCC = 5.5 V 0.5 1.6 VCC = 2 V 1.9 VCC = 3 V 2.9 3 VCC = 4.5 V 4.4 4.5 VCC = 3 V Negative-going input threshold voltage MIN TA = 25°C 2.58 SNx4AHC14 2.48 TA = 25°C 3.94 SNx4AHC14 Copyright © 1995–2017, Texas Instruments Incorporated Product Folder Links: SN54AHC14 SN74AHC14 UNIT V V V 2 V 3.8 Submit Documentation Feedback 5 SN54AHC14, SN74AHC14 SCLS238M – OCTOBER 1995 – REVISED MARCH 2017 www.ti.com Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = 50 µA MIN TYP 0.1 VCC = 3 V 0.1 VCC = 4.5 V 0.36 SN54AHC14 IOH = 4 mA, VCC = 3 V SN74AHC14 0.5 TA = –40°C to 85°C 0.44 TA = –40°C to 125°C 0.5 V TA = 25°C 0.36 SN54AHC14 IOL = 8 mA, VCC = 4.5 V SN74AHC14 0.5 TA = –40°C to 85°C 0.44 TA = –40°C to 125°C 0.5 II VI = 5.5 V or GND, VCC = 0 V to 5.5 V TA = 25°C ±0.1 SNx4AHC14 ±1 (1) ICC VI = VCC or GND, IO = 0, VCC = 5.5 V TA = 25°C CI VI = VCC or GND, VCC = 5 V Power dissipation capacitance No load, f = 1 MHz, VCC = 5 V VOL(P) Quiet output, maximum dynamic VOL VOL(V) Cpd UNIT 0.1 TA = 25°C VOL MAX VCC = 2 V µA 1 SNx4AHC14 µA 20 TA = 25°C 2 SN74AHC14 10 pF 10 9 pF VCC = 5 V, CL = 50 pF, TA = 25°C 0.8 V Quiet output, minimum dynamic VOL VCC = 5 V, CL = 50 pF, TA = 25°C –0.4 V VOH(V) Quiet output, minimum dynamic VOH VCC = 5 V, CL = 50 pF, TA = 25°C 4.6 V VIH(D) High-level dynamic input voltage VCC = 5 V, CL = 50 pF, TA = 25°C VIL(D) Low-level dynamic input voltage VCC = 5 V, CL = 50 pF, TA = 25°C NOISE (1) (2) (2) 3.5 V 1.5 V On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V. Characteristics are for surface-mount packages only. 6.6 Switching Characteristics – 3.3 V VCC = 3.3 V ± 0.3 V and over operating free-air temperature range (unless otherwise noted; see Parameter Measurement Information) PARAMETER TEST CONDITIONS MIN tPLH From A (input) to Y (output), CL = 15 pF From A (input) to Y (output), CL = 15 pF SN54AHC14 1 (1) 15 (1) SN74AHC14 1 16 8.3 (1) 12.8 (1) (1) 15 (1) 1 16 SN54AHC14 1 SN74AHC14 TA = 25°C tPLH (1) 6 From A (input) to Y (output), CL = 50 pF MAX 12.8 (1) TA = 25°C tPHL TYP 8.3 (1) TA = 25°C 10.8 16.3 SN54AHC14 1 18.5 SN74AHC14 1 19.5 UNIT ns ns ns On products compliant to MIL-PRF-38535, this parameter is not production tested. Submit Documentation Feedback Copyright © 1995–2017, Texas Instruments Incorporated Product Folder Links: SN54AHC14 SN74AHC14 SN54AHC14, SN74AHC14 www.ti.com SCLS238M – OCTOBER 1995 – REVISED MARCH 2017 Switching Characteristics – 3.3 V (continued) VCC = 3.3 V ± 0.3 V and over operating free-air temperature range (unless otherwise noted; see Parameter Measurement Information) PARAMETER TEST CONDITIONS MIN TA = 25°C tPHL From A (input) to Y (output), CL = 50 pF TYP MAX 10.8 16.3 SN54AHC14 1 18.5 SN74AHC14 1 19.5 UNIT ns 6.7 Switching Characteristics – 5 V VCC = 5 V ± 0.5 V and over operating free-air temperature range (unless otherwise noted; see Parameter Measurement Information) PARAMETER TEST CONDITIONS MIN tPLH From A (input) to Y (output), CL = 15 pF From A (input) to Y (output), CL = 15 pF tPLH From A (input) to Y (output), CL = 50 pF tPHL From A (input) to Y (output), CL = 50 pF (1) MAX 8.6 (1) SN54AHC14 1 (1) 10 (1) SN74AHC14 1 10 5.5 (1) 8.6 (1) (1) 10 (1) SN74AHC14 1 10 TA = 25°C 7 10.6 SNx4AHC14 1 12 TA = 25°C 7 10.6 SNx4AHC14 1 12 TA = 25°C tPHL TYP 5.5 (1) TA = 25°C SN54AHC14 1 UNIT ns ns ns ns On products compliant to MIL-PRF-38535, this parameter is not production tested. 6.8 Typical Characteristics CL = 50 pF (unless otherwise noted) 13.5 13 Propagation Delay (ns) 12.5 12 11.5 11 10.5 10 9.5 9 8.5 3 3.2 3.4 3.6 3.8 4 4.2 4.4 Supply Voltage VCC (V) 4.6 4.8 5 D001 Figure 1. Propagation Delay vs Supply Voltage Copyright © 1995–2017, Texas Instruments Incorporated Product Folder Links: SN54AHC14 SN74AHC14 Submit Documentation Feedback 7 SN54AHC14, SN74AHC14 SCLS238M – OCTOBER 1995 – REVISED MARCH 2017 www.ti.com 7 Parameter Measurement Information From Output Under Test Test Point V CC CL S1 RL = 1 k Ω From Output Under Test Open GND CL Figure 2. Load Circuit For Totem-Pole Outputs Figure 3. Load Circuit For 3-State and Open-Drain Outputs Table 1. Measurement Information TEST S1 tPLH, tPHL Open tPLZ, tPZL VCC tPHZ, tPZH GND Open drain VCC tw V CC V CC Input 50% V CC Timing Input 0V 50% V CC 50% V CC th t su 0V V CC Figure 4. Voltage Waveforms Pulse Duration 50% V CC Data Input 50% V CC 0V Figure 5. Voltage Waveforms Setup and Hold Times V CC 50% V CC Input 50% V CC 0V t PHL t PLH In-Phase Output 50% V CC t PLH t PHL Out-of-Phase Output V OH 50% V CC V OL 50% V CC V OH 50% V CC V OL Figure 6. Voltage Waveforms Propagation Delay Times Inverting and Noninverting Outputs 8 Submit Documentation Feedback Copyright © 1995–2017, Texas Instruments Incorporated Product Folder Links: SN54AHC14 SN74AHC14 SN54AHC14, SN74AHC14 www.ti.com SCLS238M – OCTOBER 1995 – REVISED MARCH 2017 V CC Output Control 50% V CC 0V t PLZ t PZL Output Waveform 1 S1 at V CC ≈V CC 50% V CC V OL + 0.3 V V OL t PHZ t PZH Output Waveform 2 S1 at GND 50% V CC 50% V CC V OH − 0.3 V V OH ≈0 V A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 7. Voltage Waveforms Enable and Disable Times Low- and High-Level Enabling Copyright © 1995–2017, Texas Instruments Incorporated Product Folder Links: SN54AHC14 SN74AHC14 Submit Documentation Feedback 9 SN54AHC14, SN74AHC14 SCLS238M – OCTOBER 1995 – REVISED MARCH 2017 www.ti.com 8 Detailed Description 8.1 Overview The SNx4AHC14 Schmitt-Trigger devices contain six independent inverters. They perform the Boolean function Y = A in positive logic. Schmitt-Trigger inputs are designed to provide a minimum separation between positive and negative switching thresholds. This allows for noisy or slow inputs that would cause problems such as oscillation or excessive current draw with normal CMOS inputs. 8.2 Functional Block Diagram A Y Copyright © 2016, Texas Instruments Incorporated 8.3 Feature Description The wide operating range of the device allows it to be used in a variety of systems that use different logic levels. The outpus can drive up to 10 LSTTL loads each. The balanced drive outputs can source or sink 8 mA at 5-V VCC. 8.4 Device Functional Modes Table 2 lists the functional modes of the SNx4AHC14. Table 2. Function Table INPUT A 10 Submit Documentation Feedback OUTPUT Y H L L H Copyright © 1995–2017, Texas Instruments Incorporated Product Folder Links: SN54AHC14 SN74AHC14 SN54AHC14, SN74AHC14 www.ti.com SCLS238M – OCTOBER 1995 – REVISED MARCH 2017 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The SN74AHC14 device is a Schmitt-Trigger input CMOS device that can be used for a multitude of inverting buffer type functions. The application shown here takes advantage of the Schmitt-Trigger inputs to produce a delay for a logic input. 9.2 Typical Application Copyright © 2016, Texas Instruments Incorporated Figure 8. Simplified Application Schematic 9.2.1 Design Requirements This device uses CMOS technology. Take care to avoid bus contention because it can drive currents that would exceed maximum limits. Parallel output drive can create fast edges into light loads so consider routing and load conditions to prevent ringing. 9.2.2 Detailed Design Procedure This circuit is designed around an RC network that produces a slow input to the second inverter. The RC time constant, τ, is calculated from: τ = RC. The delay time for this circuit is from tdelay(min) = –ln |1 – VT+(min) / VCC| τ to tdelay(max) = –ln |1 – VT+(max) / VCC| τ. It must be noted that the delay is consistent for each device, but because the switching threshold is only ensured between the minimum and maximum value, the output pulse length varies between devices. These values must be calculated by using the minimum and maximum ensured VT+ values in the Electrical Characteristics. The resistor value must be chosen such that the maximum current to and from the SN74AHC14 is 8 mA at 5-V VCC. Copyright © 1995–2017, Texas Instruments Incorporated Product Folder Links: SN54AHC14 SN74AHC14 Submit Documentation Feedback 11 SN54AHC14, SN74AHC14 SCLS238M – OCTOBER 1995 – REVISED MARCH 2017 www.ti.com Typical Application (continued) 9.2.3 Application Curve VCC Voltage VT+(max) VT+ VT+ Typical VT+(min) tdelay (max) ln | 1 t delay (min) ln | 1 VT (max) VCC VT (min) VCC |W VC |W VOUT t0 + 42 t0 + 52 0.0 t0 t0 + 2 t0 + 22 t0 + 32 Time Figure 9. Ideal Capacitor Voltage and Output Voltage With Positive Switching Threshold 10 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the Recommended Operating Conditions. The VCC terminal must have a good bypass capacitor to prevent power disturbance. TI recommends using a 0.1-µF capacitor on the VCC terminal, and must be placed as close as possible to the pin for best results. 11 Layout 11.1 Layout Guidelines When using multiple bit logic devices, inputs must never float. In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only three of the four buffer gates are used. Such inputs must not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that must be applied to any particular unused input depends on the function of the device. Generally they are tied to GND or VCC, whichever makes more sense or is more convenient. Floating outputs are generally acceptable, unless the part is a transceiver. 11.2 Layout Example Vcc Unused Input Input Output Output Unused Input Input Figure 10. Layout Diagram 12 Submit Documentation Feedback Copyright © 1995–2017, Texas Instruments Incorporated Product Folder Links: SN54AHC14 SN74AHC14 SN54AHC14, SN74AHC14 www.ti.com SCLS238M – OCTOBER 1995 – REVISED MARCH 2017 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation For related documentation see the following: TI application report, Implications of Slow or Floating CMOS Inputs (SCBA004) 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to order now. Table 3. Related Links PARTS PRODUCT FOLDER ORDER NOW TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY SN54AHC14 Click here Click here Click here Click here Click here SN74AHC14 Click here Click here Click here Click here Click here 12.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.5 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.6 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.7 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright © 1995–2017, Texas Instruments Incorporated Product Folder Links: SN54AHC14 SN74AHC14 Submit Documentation Feedback 13 PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-9680201Q2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629680201Q2A SNJ54AHC 14FK 5962-9680201QCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9680201QC A SNJ54AHC14J 5962-9680201QDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9680201QD A SNJ54AHC14W 5962-9682001QCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9682001QC A SNJ54AHC08J 5962-9682001QDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9682001QD A SNJ54AHC08W SN74AHC14D ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHC14 Samples SN74AHC14DBR ACTIVE SSOP DB 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 HA14 Samples SN74AHC14DE4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHC14 Samples SN74AHC14DG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHC14 Samples SN74AHC14DGVR ACTIVE TVSOP DGV 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 HA14 Samples SN74AHC14DR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 AHC14 Samples SN74AHC14DRE4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHC14 Samples SN74AHC14DRG3 ACTIVE SOIC D 14 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 AHC14 Samples SN74AHC14DRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHC14 Samples SN74AHC14N ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 SN74AHC14N Samples SN74AHC14NSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 AHC14 Samples Addendum-Page 1 Samples Samples Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 10-Jun-2022 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74AHC14PW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 HA14 Samples SN74AHC14PWE4 ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 HA14 Samples SN74AHC14PWG4 ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 HA14 Samples SN74AHC14PWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 HA14 Samples SN74AHC14PWRE4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 HA14 Samples SN74AHC14PWRG3 ACTIVE TSSOP PW 14 2000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 HA14 Samples SN74AHC14PWRG4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 HA14 Samples SN74AHC14RGYR ACTIVE VQFN RGY 14 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 HA14 Samples SNJ54AHC08J ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9682001QC A SNJ54AHC08J SNJ54AHC08W ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9682001QD A SNJ54AHC08W SNJ54AHC14FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629680201Q2A SNJ54AHC 14FK SNJ54AHC14J ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9680201QC A SNJ54AHC14J SNJ54AHC14W ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9680201QD A SNJ54AHC14W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 2 Samples Samples Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2022 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of