SN74AHC244PWR

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents SN54AHC244, SN74AHC244 SCLS226K – OCTOBER 1995 – REVISED JULY 2014 SNx4AHC244 Octal Buffers/Drivers With 3-State Outputs 1 Features 3 Description • • These octal buffers and drivers are designed specifically to improve the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters. 1 • Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters. PART NUMBER SNx4AHC244 2 Applications • • • • • Device Information(1) Network Switches Power Infrastructures PCs and Notebooks Wearable Health and Fitness Devices Tests and Measurements PACKAGE BODY SIZE (NOM) SSOP (20) 7.20 mm × 5.30 mm SOIC (20) 12.80 mm × 7.50 mm PDIP (20) 24.33 mm × 6.35 mm TSSOP (20) 12.60 mm × 5.30 mm VQFN (20) 4.50 mm × 3.50 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 4 Simplified Schematic 1OE 1A1 1A2 1A3 1A4 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN54AHC244, SN74AHC244 SCLS226K – OCTOBER 1995 – REVISED JULY 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Simplified Schematic............................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 1 2 3 4 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10 4 4 4 5 5 6 6 7 7 7 Absolute Maximum Ratings ...................................... Handling Ratings....................................................... Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Switching Characteristics .......................................... Switching Characteristics .......................................... Noise Characteristics ................................................ Operating Characteristics.......................................... Typical Characteristics ............................................ Parameter Measurement Information .................. 8 9 Detailed Description .............................................. 9 9.1 9.2 9.3 9.4 Overview ................................................................... Functional Block Diagram ......................................... Feature Description................................................... Device Functional Modes.......................................... 9 9 9 9 10 Application and Implementation........................ 10 10.1 Application Information.......................................... 10 10.2 Typical Application ............................................... 10 11 Power Supply Recommendations ..................... 11 12 Layout................................................................... 11 12.1 Layout Guidelines ................................................. 11 12.2 Layout Example .................................................... 11 13 Device and Documentation Support ................. 12 13.1 13.2 13.3 13.4 Related Links ........................................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 12 12 12 12 14 Mechanical, Packaging, and Orderable Information ........................................................... 12 5 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision J (July 2003) to Revision K Page • Updated document to new TI data sheet format. ................................................................................................................... 1 • Removed Ordering Information table. .................................................................................................................................... 1 • Added Military Disclaimer to Features list. ............................................................................................................................ 1 • Added Applications. ............................................................................................................................................................... 1 • Added Pin Functions table...................................................................................................................................................... 3 • Added Handling Ratings table. ............................................................................................................................................... 4 • Changed MAX ambient temperature in Recommended Operating Conditions table. ........................................................... 4 • Added Thermal Information table. .......................................................................................................................................... 5 • Added Typical Characteristics. .............................................................................................................................................. 7 2 Submit Documentation Feedback Copyright © 1995–2014, Texas Instruments Incorporated Product Folder Links: SN54AHC244 SN74AHC244 SN54AHC244, SN74AHC244 www.ti.com SCLS226K – OCTOBER 1995 – REVISED JULY 2014 6 Pin Configuration and Functions 1 20 2 19 3 18 4 17 5 6 16 15 7 14 8 13 9 12 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 1A2 2Y3 1A3 2Y2 1A4 2OE 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1Y1 2A4 1Y2 2A3 1Y3 2Y1 GND 2A1 1Y4 2A2 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND SN54AHC244 . . . FK PACKAGE (TOP VIEW) 2Y4 1A1 1OE VCC SN54AHC244 . . . J OR W PACKAGE SN74AHC244 . . . DB, DGV, DW, N, NS, OR PW PACKAGE (TOP VIEW) Pin Functions PIN NO. NAME I/O DESCRIPTION 1 1OE I Output Enable 1 2 1A1 I 1A1 Input 3 2Y4 O 2Y4 Output 4 1A2 I 1A2 Input 5 2Y3 O 2Y3 Output 6 1A3 I 1A3 Input 7 2Y2 O 2Y2 Output 8 1A4 I 1A4 Input 9 2Y1 O 2Y1 Output 10 GND — Ground pin 11 2A1 I 2A1 Input 12 1Y4 O 1Y4 Output 13 2A2 I 2A2 Input 14 1Y3 O 1Y3 Output 15 2A3 I 2A3 Input 16 1Y2 O 1Y2 Output 17 2A4 I 2A4 Input 18 1Y1 O 1Y1 Output 19 2OE I Output Enable 2 20 VCC — Power Pin Copyright © 1995–2014, Texas Instruments Incorporated Product Folder Links: SN54AHC244 SN74AHC244 Submit Documentation Feedback 3 SN54AHC244, SN74AHC244 SCLS226K – OCTOBER 1995 – REVISED JULY 2014 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) VCC MIN MAX Supply voltage range –0.5 7 UNIT V (2) –0.5 7 V –0.5 VCC + 0.5 VI Input voltage range VO Output voltage range (3) IIK Input clamp current VI < 0 –20 mA IOK Output clamp current VO < 0 or VO > VCC ±20 mA IO Continuous output current VO = 0 to VCC ±25 mA ±50 mA Continuous current through each VCC or GND (1) (2) (3) V Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. 7.2 Handling Ratings Tstg Storage temperature range V(ESD) (1) (2) Electrostatic discharge MIN MAX UNIT °C –65 150 Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) 0 1500 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) 0 2000 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) (1) SN54AHC244 VCC Supply voltage VCC = 2 V VIH High-level input voltage VCC = 3 V VCC = 5.5 V VIL Low level input voltage SN74AHC244 MIN MAX 2 5.5 1.5 MIN MAX 2 5.5 V 1.5 2.1 2.1 3.85 3.85 V VCC = 2 V 0.5 VCC = 3 V 0.9 0.9 1.65 1.65 VCC = 5.5 V UNIT 0.5 V VI Input voltage 0 5.5 0 5.5 VO Output voltage 0 VCC 0 VCC V –50 –50 µA VCC = 3.3 V ± 0.3 V –4 –4 VCC = 5 V ± 0.5 V –8 –8 VCC = 2 V VCC = 2 V IOH High-level output current IOL Low level output current Δt/Δv Input transition rise or fall rate TA Operating free-air temperature (1) 4 50 50 VCC = 3.3 V ± 0.3 V 4 4 VCC = 5 V ± 0.5 V 8 8 100 100 20 20 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V –55 125 –40 V mA µA mA ns/V 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback Copyright © 1995–2014, Texas Instruments Incorporated Product Folder Links: SN54AHC244 SN74AHC244 SN54AHC244, SN74AHC244 www.ti.com SCLS226K – OCTOBER 1995 – REVISED JULY 2014 7.4 Thermal Information SN74AHCT244 THERMAL METRIC (1) DB DGV DW N NS PW 20 PINS 20 PINS 20 PINS 20 PINS 20 PINS 20 PINS UNIT RθJA Junction-to-ambient thermal resistance 99.9 119.2 83.0 54.9 80.4 105.4 RθJC(top) Junction-to-case (top) thermal resistance 61.7 34.5 48.9 41.7 46.9 39.5 RθJB Junction-to-board thermal resistance 55.2 60.7 50.5 35.8 47.9 56.4 ψJT Junction-to-top characterization parameter 22.6 1.2 21.1 27.9 19.9 3.1 ψJB Junction-to-board characterization parameter 54.8 60.0 50.1 35.7 47.5 55.8 RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a n/a n/a n/a (1) °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 7.5 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –50 µA TA = 25°C SN54AHC244 MAX MIN MAX SN74AHC244 MIN TYP MIN 2V 1.9 2 1.9 1.9 2.9 3V 2.9 3 2.9 4.5 V 4.4 4.5 4.4 4.4 IOH = –4 mA 3V 2.58 2.48 2.48 IOH = –8 mA 4.5 V 3.94 VOH 3.8 MAX UNIT V 3.8 2V 0.1 0.1 0.1 3V 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 IOL = 4 mA 3V 0.36 0.5 0.44 IOL = 8 mA 4.5 V 0.36 0.5 0.44 ±0.1 ±1 (1) ±1 µA IOL = 50 µA VOL (1) VCC V II VI = 5.5 V or GND 0 V to 5.5 V IOZ VO = VCC or GND, VI (OE) = VIL or VIH 5.5 V ±0.25 ±2.5 ±2.5 µA ICC VI = VCC or GND, 5.5 V 4 40 40 µA Ci VI = VCC or GND 5V 2 10 pF Co VO = VCC or GND 5V 3.5 IO = 0 10 pF On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V. Copyright © 1995–2014, Texas Instruments Incorporated Product Folder Links: SN54AHC244 SN74AHC244 Submit Documentation Feedback 5 SN54AHC244, SN74AHC244 SCLS226K – OCTOBER 1995 – REVISED JULY 2014 www.ti.com 7.6 Switching Characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 3) PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) TO LOAD (OUTPUT) CAPACITANCE A Y CL = 15 pF OE Y CL = 15 pF OE Y CL = 15 pF A Y CL = 50 pF OE Y CL = 50 pF OE Y CL = 50 pF tsk(o) (1) (2) TA = 25°C MIN SN54AHC244 SN74AHC244 TYP MAX MIN MAX MIN MAX 5.8 (1) 8.4 (1) 1 (1) 10 (1) 1 10 (1) (1) (1) 10 (1) 1 10 5.8 8.4 1 6.6 (1) 10.6 (1) 1 (1) 12.5 (1) 1 12.5 (1) (1) (1) (1) 1 12.5 6.6 10.6 1 12.5 5 (1) 9.7 (1) 1 (1) 11 (1) 1 11 5 (1) 9.7 (1) 1 (1) 11 (1) 1 11 8.3 11.9 1 13.5 1 13.5 8.3 11.9 1 13.5 1 13.5 9.1 14.1 1 16 1 16 9.1 14.1 1 16 1 16 10.3 14 1 16 1 16 10.3 14 1 16 1 16 1.5 (2) CL = 50 pF 1.5 UNIT ns ns ns ns ns ns ns On products compliant to MIL-PRF-38535, this parameter is not production tested. On products compliant to MIL-PRF-38535, this parameter does not apply. 7.7 Switching Characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 3) PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) TO (OUTPU T) LOAD CAPACITANCE A Y CL = 15 pF OE Y CL = 15 pF OE Y CL = 15 pF A Y CL = 50 pF OE Y CL = 50 pF OE Y CL = 50 pF tsk(o) (1) (2) 6 TA = 25°C MIN SN54AHC244 SN74AHC244 TYP MAX MIN MAX MIN MAX 3.9 (1) 5.5 (1) 1 (1) 6.5 (1) 1 6.5 (1) (1) (1) 6.5 (1) 1 6.5 3.9 5.5 1 4.7 (1) 7.3 (1) 1 (1) 8.5 (1) 1 8.5 (1) (1) (1) (1) 1 8.5 4.7 7.3 1 8.5 5 (1) 7.2 (1) 1 (1) 8.5 (1) 1 8.5 (1) (1) (1) 8.5 (1) 1 8.5 5 7.2 1 5.4 7.5 1 8.5 1 8.5 5.4 7.5 1 8.5 1 8.5 6.2 9.3 1 10.5 1 10.5 6.2 9.3 1 10.5 1 10.5 6.7 9.2 1 10.5 1 10.5 6.7 9.2 1 10.5 1 10.5 CL = 50 pF 1 (2) 1 UNIT ns ns ns ns ns ns ns On products compliant to MIL-PRF-38535, this parameter is not production tested. On products compliant to MIL-PRF-38535, this parameter does not apply. Submit Documentation Feedback Copyright © 1995–2014, Texas Instruments Incorporated Product Folder Links: SN54AHC244 SN74AHC244 SN54AHC244, SN74AHC244 www.ti.com SCLS226K – OCTOBER 1995 – REVISED JULY 2014 7.8 Noise Characteristics VCC = 5 V, CL = 50 pF, TA = 25°C (See (1)) SN74AHC244 PARAMETER MIN TYP MAX UNIT VOL(P) Quiet output, maximum dynamic VOL 0.5 V VOL(V) Quiet output, minimum dynamic VOL –0.2 V VOH(V) Quiet output, minimum dynamic VOH 4.8 V VIH(D) High-level dynamic input voltage VIL(D) Low-level dynamic input voltage (1) 3.5 V 1.5 V Characteristics are for surface-mount packages only. 7.9 Operating Characteristics VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load, f = 1 MHz TYP UNIT 8.6 pF 7.10 Typical Characteristics 7 8 6 7 TPD in ns 6 TPD (ns) TPD (ns) 5 4 3 5 4 3 2 2 1 1 TPD in ns 0 -100 0 -50 0 50 Temperature (qC) 100 150 0 1 D001 Figure 1. TPD vs Temperature Copyright © 1995–2014, Texas Instruments Incorporated Product Folder Links: SN54AHC244 SN74AHC244 2 3 VCC (V) 4 5 6 D002 Figure 2. TPD vs VCC Submit Documentation Feedback 7 SN54AHC244, SN74AHC244 SCLS226K – OCTOBER 1995 – REVISED JULY 2014 www.ti.com 8 Parameter Measurement Information RL = 1 kΩ From Output Under Test Test Point From Output Under Test S1 Open TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input tw tsu VCC 50% VCC 50% VCC Input 0V th VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VCC 50% VCC Input 50% VCC 0V tPLH In-Phase Output tPHL 50% VCC tPHL Out-of-Phase Output VOH 50% VCC VOL Output Waveform 1 S1 at VCC (see Note B) VOH 50% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 50% VCC 50% VCC 0V tPZL tPLZ ≈VCC 50% VCC tPZH tPLH 50% VCC VCC Output Control Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 50% VCC VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 3. Load Circuit and Voltage Waveforms 8 Submit Documentation Feedback Copyright © 1995–2014, Texas Instruments Incorporated Product Folder Links: SN54AHC244 SN74AHC244 SN54AHC244, SN74AHC244 www.ti.com SCLS226K – OCTOBER 1995 – REVISED JULY 2014 9 Detailed Description 9.1 Overview The SNx4AHC244 devices are organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the currentsinking capability of the driver. 9.2 Functional Block Diagram 1OE 1A1 1A2 1A3 1A4 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 Figure 4. Logic Diagram (Positive Logic) 9.3 Feature Description • • • VCC is optimized at 5 V Allows down voltage translation – Inputs accept VIH levels of 5.5 V Slow edge rates minimize output ringing 9.4 Device Functional Modes Table 1. Function Table (Each 4-Bit Buffer/Driver) INPUTS OE A OUTPUT Y L H H L L L H X Z Copyright © 1995–2014, Texas Instruments Incorporated Product Folder Links: SN54AHC244 SN74AHC244 Submit Documentation Feedback 9 SN54AHC244, SN74AHC244 SCLS226K – OCTOBER 1995 – REVISED JULY 2014 www.ti.com 10 Application and Implementation 10.1 Application Information The SNx4AHC244 is a low drive CMOS device that can be used for a multitude of bus interface type applications where output ringing is a concern. The low drive and slow edge rates will minimize overshoot and undershoot on the outputs. The inputs can except voltages to 5.5 V at any valid VCC making it ideal for down translation. 10.2 Typical Application Regulated 5 V OE VCC A1 Y1 µC System Logic LEDs µC or System Logic A4 Y4 GND Figure 5. Typical Application Diagram 10.2.1 Design Requirements This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads so routing and load conditions should be considered to prevent ringing. 10.2.2 Detailed Design Procedure • Recommended input conditions – Specified high and low levels. See (VIH and VIL) in Recommended Operating Conditions. – Inputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC • Recommend output conditions – Load currents should not exceed 25 mA per output and 50 mA total for the part – Outputs should not be pulled above VCC 10 Submit Documentation Feedback Copyright © 1995–2014, Texas Instruments Incorporated Product Folder Links: SN54AHC244 SN74AHC244 SN54AHC244, SN74AHC244 www.ti.com SCLS226K – OCTOBER 1995 – REVISED JULY 2014 Typical Application (continued) 10.2.3 Application Curves AC HC AHC Figure 6. Switching Characteristics Comparison 11 Power Supply Recommendations The power supply can be any voltage between the MIN and MAX supply voltage rating located in the Recommended Operating Conditions table. Each VCC pin should have a good bypass capacitor to prevent power disturbance. For devices with a single supply, 0.1 μf is recommended; if there are multiple VCC pins, then 0.01 μf or 0.022 μf is recommended for each power pin. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. A 0.1 μf and a 1 μf are commonly used in parallel. The bypass capacitor should be installed as close to the power pin as possible for best results. 12 Layout 12.1 Layout Guidelines When using multiple-bit logic devices, inputs should never float. In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Figure 7 specifies the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC, whichever makes more sense or is more convenient. It is generally acceptable to float outputs, unless the part is a transceiver. If the transceiver has an output enable pin, it will disable the output section of the part when asserted. This will not disable the input section of the I/Os, so they cannot float when disabled. 12.2 Layout Example Vcc Input Unused Input Output Unused Input Output Input Figure 7. Layout Diagram Copyright © 1995–2014, Texas Instruments Incorporated Product Folder Links: SN54AHC244 SN74AHC244 Submit Documentation Feedback 11 SN54AHC244, SN74AHC244 SCLS226K – OCTOBER 1995 – REVISED JULY 2014 www.ti.com 13 Device and Documentation Support 13.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY SN54AHC244 Click here Click here Click here Click here Click here SN74AHC244 Click here Click here Click here Click here Click here 13.2 Trademarks All trademarks are the property of their respective owners. 13.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 13.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 12 Submit Documentation Feedback Copyright © 1995–2014, Texas Instruments Incorporated Product Folder Links: SN54AHC244 SN74AHC244 PACKAGE OPTION ADDENDUM www.ti.com 25-Jan-2019 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962-9678201Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629678201Q2A SNJ54AHC 244FK 5962-9678201QRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9678201QR A SNJ54AHC244J 5962-9678201QSA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9678201QS A SNJ54AHC244W 5962-9678201VRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9678201VR A SNV54AHC244J 5962-9678201VSA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9678201VS A SNV54AHC244W SN74AHC244DBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 HA244 SN74AHC244DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 HA244 SN74AHC244DGVR ACTIVE TVSOP DGV 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 HA244 SN74AHC244DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 AHC244 SN74AHC244DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 AHC244 SN74AHC244DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 AHC244 SN74AHC244DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 AHC244 SN74AHC244N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 SN74AHC244N SN74AHC244NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 AHC244 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 25-Jan-2019 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) SN74AHC244PW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 HA244 SN74AHC244PWG4 ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 HA244 SN74AHC244PWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 HA244 SN74AHC244PWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 HA244 SN74AHC244PWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 HA244 SNJ54AHC244FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629678201Q2A SNJ54AHC 244FK SNJ54AHC244J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9678201QR A SNJ54AHC244J SNJ54AHC244W ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9678201QS A SNJ54AHC244W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of