SN74AHC367PWR

SN54AHC367, SN74AHC367 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS424E – JUNE 1998 – REVISED FEBRUARY 2002 D D D SN54AHC367 . . . J OR W PACKAGE SN74AHC367 . . . D, DB, DGV, N, OR PW PACKAGE (TOP VIEW) Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) 1OE 1A1 1Y1 1A2 1Y2 1A3 1Y3 GND description The ’AHC367 devices are hex buffers and line drivers designed for 2-V to 5.5-V VCC operation. These devices are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’AHC367 devices are organized as dual 4-line and 2-line buffers/drivers with active-low output-enable (1OE and 2OE) inputs. When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 2OE 2A2 2Y2 2A1 2Y1 1A4 1Y4 1A1 1OE NC VCC 2OE SN54AHC367 . . . FK PACKAGE (TOP VIEW) 1Y1 1A2 NC 1Y2 1A3 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2A2 2Y2 NC 2A1 2Y1 1Y3 GND NC 1Y4 1A4 To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. 4 NC – No internal connection ORDERING INFORMATION PDIP – N TOP-SIDE MARKING Tube SN74AHC367N Tube SN74AHC367D Tape and reel SN74AHC367DR SSOP – DB Tape and reel SN74AHC367DBR HA367 TSSOP – PW Tape and reel SN74AHC367PWR HA367 TVSOP – DGV Tape and reel SN74AHC367DGVR HA367 CDIP – J Tube SNJ54AHC367J SNJ54AHC367J CFP – W Tube SNJ54AHC367W SNJ54AHC367W LCCC – FK Tube SNJ54AHC367FK SNJ54AHC367FK SOIC – D –40°C to 85°C –55°C to 125°C ORDERABLE PART NUMBER PACKAGE† TA SN74AHC367N AHC367 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2002, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54AHC367, SN74AHC367 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS424E – JUNE 1998 – REVISED FEBRUARY 2002 FUNCTION TABLE (each buffer/driver) INPUTS OE A OUTPUT Y L H H L L L H X Z logic diagram (positive logic) 1OE 1A1 1 2 2OE 3 1Y1 2A1 15 12 To Three Other Channels 11 2Y1 To One Other Channel Pin numbers shown are for the D, DB, DGV, J, N, PW, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54AHC367, SN74AHC367 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS424E – JUNE 1998 – REVISED FEBRUARY 2002 recommended operating conditions (see Note 3) SN54AHC367 VCC Supply voltage VIH VCC = 2 V VCC = 3 V High-level input voltage Low-level input voltage VI VO 2 5.5 Output voltage ∆t/∆v 5.5 2.1 V V 0.5 0.9 0.9 1.65 1.65 V 0 5.5 0 5.5 V 0 VCC –50 0 VCC –50 mA VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V VCC = 3.3 V ± 0.3 V Input transition rise or fall rate 2 UNIT 1.5 3.85 VCC = 2 V VCC = 3.3 V ± 0.3 V Low-level output current MAX 2.1 VCC = 5 V ± 0.5 V VCC = 2 V IOL MIN 3.85 VCC = 3 V VCC = 5.5 V High-level output current SN74AHC367 0.5 Input voltage IOH MAX 1.5 VCC = 5.5 V VCC = 2 V VIL MIN VCC = 5 V ± 0.5 V –4 –4 –8 –8 50 50 4 4 8 8 100 100 20 20 V mA mA mA ns/V TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN SN54AHC367 MIN MAX SN74AHC367 MIN 2V 1.9 2 1.9 1.9 3V 2.9 3 2.9 2.9 4.5 V 4.4 4.5 4.4 4.4 IOH = –4 mA 3V 2.58 2.48 2.48 IOH = –8 mA 4.5 V 3.94 3.8 3.8 IOH = –50 mA VOH IOL = 50 mA VOL IOL = 4 mA II TA = 25°C TYP MAX VCC IOL = 8 mA VI = 5.5 V or GND IOZ VI = VCC or GND, VO = VCC or GND, OE = VIH ICC Ci VI = VCC or GND, VI = VCC or GND IO = 0 MAX UNIT V 2V 0.1 0.1 0.1 3V 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 3V 0.36 0.5 0.44 V 4.5 V 0.36 0.5 0.44 0 V to 5.5 V ±0.1 ±1* ±1 mA 5.5 V ±0.25 ±2.5 ±2.5 mA 4 40 40 mA 10 pF 5.5 V 5V 3 Co 10 VO = VCC or GND 5V 5.1 * On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V. pF PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54AHC367, SN74AHC367 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS424E – JUNE 1998 – REVISED FEBRUARY 2002 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL A Y CL = 15 pF tPZH tPZL OE Y CL = 15 pF OE Y CL = 15 pF F tPLH tPHL A Y CL = 50 pF tPZH tPZL OE Y CL = 50 pF MIN TA = 25°C TYP MAX SN54AHC367 SN74AHC367 MIN MAX MIN MAX 4.7* 8.3* 1* 10* 1 10 4.7* 8..3* 1* 10* 1 10 5.1* 10.5* 1* 12.5* 1 12.5 5.1* 10.5* 1* 12.5* 1 12.5 4* 10.5* 1* 12.5* 1 12.5 4.9* 10.5* 1* 12.5* 1 12.5 6.1 11.8 1 13.5 1 13.5 6.2 11.8 1 13.5 1 13.5 6.4 14 1 16 1 16 6.8 14 1 16 1 16 6.2 Y CL = 50 pF F OE tPLZ 7.3 * On products compliant to MIL-PRF-38535, this parameter is not production tested. 13.6 1 15.5 1 15.5 13.6 1 15.5 1 15.5 tPHZ tPLZ tPHZ UNIT ns ns ns ns ns ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL A Y CL = 15 pF tPZH tPZL OE Y CL = 15 pF OE Y CL = 15 pF F tPLH tPHL A Y CL = 50 pF tPZH tPZL OE Y CL = 50 pF OE Y CL = 50 pF F TA = 25°C MIN TYP MAX SN54AHC367 SN74AHC367 MIN MAX MIN MAX 3.4* 5.9* 1* 7* 1 7 3.6* 5.9* 1* 7* 1 7 3.6* 7.2* 1* 8.5* 1 8.5 3.8* 7.2* 1* 8.5* 1 8.5 2.6* 7.2* 0* 8.5* 0 8.5 2.6* 7.2* 0* 8.5* 0 8.5 4.3 7.9 1 9 1 9 4.5 7.9 1 9 1 9 4.6 9.2 1 10.5 1 10.5 4.9 9.2 1 10.5 1 10.5 3.4 9.2 0 10.5 0 10.5 tPLZ 4.5 * On products compliant to MIL-PRF-38535, this parameter is not production tested. 9.2 0 10.5 0 10.5 tPHZ tPLZ tPHZ UNIT ns ns ns ns ns ns noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4) SN74AHC367 PARAMETER MIN MAX UNIT VOL(P) VOL(V) Quiet output, maximum dynamic VOL 0.9 V Quiet output, minimum dynamic VOL –0.8 V VOH(V) VIH(D) Quiet output, minimum dynamic VOH 4.2 V High-level dynamic input voltage 3.5 VIL(D) Low-level dynamic input voltage NOTE 4: Characteristics are for surface-mount packages only. POST OFFICE BOX 655303 V 1.5 PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 4 TYP • DALLAS, TEXAS 75265 V SN54AHC367, SN74AHC367 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS424E – JUNE 1998 – REVISED FEBRUARY 2002 operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance Outputs enabled No load, f = 1 MHz TYP UNIT 22.4 pF PARAMETER MEASUREMENT INFORMATION From Output Under Test RL = 1 kΩ From Output Under Test Test Point VCC Open S1 TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input tw VCC 50% VCC Input 50% VCC 0V th tsu VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VCC 50% VCC Input 50% VCC tPLH In-Phase Output tPHL 50% VCC tPHL Out-of-Phase Output 0V VOH 50% VCC VOL Output Waveform 1 S1 at VCC (see Note B) VOH 50% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 50% VCC 50% VCC 0V tPZL tPLZ ≈ VCC 50% VCC tPZH tPLH 50% VCC VCC Output Control Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 50% VCC VOH – 0.3 V VOH ≈0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74AHC367D ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AHC367 SN74AHC367DR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AHC367 SN74AHC367N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74AHC367N SN74AHC367PWR ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HA367 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of