SN74AHC373DBR

SN54AHC373, SN74AHC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS235I – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) SN54AHC373 . . . J OR W PACKAGE SN74AHC373 . . . DB, DGV, DW, N, NS, OR PW PACKAGE (TOP VIEW) 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 1D 1Q OE VCC VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q LE 2D 2Q 3Q 3D 4D 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 8D 7D 7Q 6Q 6D 4Q GND LE 5Q 5D OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND SN54AHC373 . . . FK PACKAGE (TOP VIEW) 8Q D D description/ordering information The ’AHC373 devices are octal transparent D-type latches designed for 2-V to 5.5-V VCC operation. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. ORDERING INFORMATION PDIP – N SN74AHC373N Tube SN74AHC373DW Tape and reel SN74AHC373DWR SOP – NS Tape and reel SN74AHC373NSR AHC373 SSOP – DB Tape and reel SN74AHC373DBR HA373 Tube SN74AHC373PW Tape and reel SN74AHC373PWR TVSOP – DGV Tape and reel SN74AHC373DGVR HA373 CDIP – J Tube SNJ54AHC373J SNJ54AHC373J CFP – W Tube SNJ54AHC373W SNJ54AHC373W LCCC – FK Tube SNJ54AHC373FK TSSOP – PW –55°C to 125°C TOP-SIDE MARKING Tube SOIC – DW –40°C 40°C to 85°C ORDERABLE PART NUMBER PACKAGE† TA SN74AHC373N AHC373 HA373 SNJ54AHC373FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54AHC373, SN74AHC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS235I – OCTOBER 1995 – REVISED JULY 2003 description/ordering information (continued) OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE (each latch) INPUTS OE LE D OUTPUT Q L H H H L H L L L L X Q0 H X X Z logic diagram (positive logic) OE LE 1 11 C1 1D 3 2 1D 1Q To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54AHC373, SN74AHC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS235I – OCTOBER 1995 – REVISED JULY 2003 recommended operating conditions (see Note 3) SN54AHC373 VCC VIH Supply voltage VCC = 2 V VCC = 3 V High-level input voltage Low-level input voltage VI VO 2 5.5 Output voltage ∆t/∆v 5.5 2.1 V V 0.5 0.9 0.9 1.65 1.65 V 0 5.5 0 5.5 V 0 VCC –50 0 VCC –50 mA VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V VCC = 3.3 V ± 0.3 V Input transition rise or fall rate 2 UNIT 1.5 3.85 VCC = 2 V VCC = 3.3 V ± 0.3 V Low-level output current MAX 2.1 VCC = 5 V ± 0.5 V VCC = 2 V IOL MIN 3.85 VCC = 3 V VCC = 5.5 V High-level output current SN74AHC373 0.5 Input voltage IOH MAX 1.5 VCC = 5.5 V VCC = 2 V VIL MIN VCC = 5 V ± 0.5 V –4 –4 –8 –8 50 50 4 4 8 8 100 100 20 20 V mA mA mA ns/V TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS 1.9 1.9 1.9 3V 2.9 2.9 2.9 4.5 V 4.4 4.4 4.4 IOH = –4 mA 3V 2.58 2.48 2.48 IOH = –8 mA 4.5 V 3.94 3.8 3.8 VOH IOL = 50 mA VOL IOL = 4 mA ICC Ci MIN 2V IOH = –50 mA II IOZ TA = 25°C SN54AHC373 SN74AHC373 TYP MAX MIN MAX MIN MAX VCC IOL = 8 mA VI = 5.5 V or GND VI = VIH or VIL, VI = VCC or GND, VI = VCC or GND VO = VCC or GND VO = VCC or GND IO = 0 UNIT V 2V 0.1 0.1 0.1 3V 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 3V 0.36 0.5 0.44 V 4.5 V 0.36 0.5 0.44 0 V to 5.5 V ±0.1 ±1* ±1 mA 5.5 V ±0.25 ±2.5 ±2.5 mA 5.5 V 4 40 40 mA 10 pF 5V 4 10 Co 5V 6 * On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 pF 3 SN54AHC373, SN74AHC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS235I – OCTOBER 1995 – REVISED JULY 2003 timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) TA = 25°C MIN MAX SN54AHC373 MIN MAX SN74AHC373 MIN MAX UNIT tw Pulse duration, LE high 5 5 5 ns tsu Setup time, data before LE↓ 4 4 4 ns th Hold time, data after LE↓ 1 1 1 ns timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) TA = 25°C MIN MAX SN54AHC373 MIN MAX SN74AHC373 MIN MAX UNIT tw Pulse duration, LE high 5 5 5 ns tsu Setup time, data before LE↓ 4 4 4 ns th Hold time, data after LE↓ 1 1 1 ns switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL D Q CL = 15 pF tPLH tPHL LE Q CL = 15 pF tPZH tPZL OE Q CL = 15 pF tPHZ tPLZ OE Q CL = 15 pF tPLH tPHL D Q CL = 50 pF tPLH tPHL LE Q CL = 50 pF tPZH tPZL OE Q CL = 50 pF tPHZ tPLZ OE Q CL = 50 pF MIN TA = 25°C TYP MAX POST OFFICE BOX 655303 SN74AHC373 MIN MAX MIN MAX 7.3* 11.4* 1* 13.5* 1 13.5 7.3* 11.4* 1* 13.5* 1 13.5 7* 11* 1* 13* 1 13 7* 11* 1* 13* 1 13 7.3* 11.4* 1* 13.5* 1 13.5 7.3* 11.4* 1* 13.5* 1 13.5 7* 10* 1* 12* 1 12 7* 10* 1* 12* 1 12 9.8 14.9 1 17 1 17 9.8 14.9 1 17 1 17 9.5 14.5 1 16.5 1 16.5 9.5 14.5 1 16.5 1 16.5 9.8 14.9 1 17 1 17 9.8 14.9 1 17 1 17 9.5 13.2 1 15 1 15 9.5 13.2 1 15 1 15 tsk(o) CL = 50 pF ∗ On products compliant to MIL-PRF-38535, this parameter is not production tested. ∗∗ On products compliant to MIL-PRF-38535, this parameter does not apply. 4 SN54AHC373 • DALLAS, TEXAS 75265 1.5** 1.5 UNIT ns ns ns ns ns ns ns ns ns SN54AHC373, SN74AHC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS235I – OCTOBER 1995 – REVISED JULY 2003 switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL D Q CL = 15 pF tPLH tPHL LE Q CL = 15 pF tPZH tPZL OE Q CL = 15 pF tPHZ tPLZ OE Q CL = 15 pF tPLH tPHL D Q CL = 50 pF tPLH tPHL LE Q CL = 50 pF tPZH tPZL OE Q CL = 50 pF tPHZ tPLZ OE Q CL = 50 pF MIN TA = 25°C TYP MAX SN54AHC373 SN74AHC373 MIN MAX MIN MAX 5* 7.2* 1* 8.5* 1 8.5 5* 7.2* 1* 8.5* 1 8.5 4.9* 7.2* 1* 8.5* 1 8.5 4.9* 7.2* 1* 8.5* 1 8.5 5.5* 8.1* 1* 9.5* 1 9.5 5.5* 8.1* 1* 9.5* 1 9.5 5* 7.2* 1* 8.5* 1 8.5 5* 7.2* 1* 8.5* 1 8.5 6.5 9.2 1 10.5 1 10.5 6.5 9.2 1 10.5 1 10.5 6.4 9.2 1 10.5 1 10.5 6.4 9.2 1 10.5 1 10.5 7 10.1 1 11.5 1 11.5 7 10.1 1 11.5 1 11.5 6.5 9.2 1 10.5 1 10.5 6.5 9.2 1 10.5 1 10.5 tsk(o) CL = 50 pF ∗ On products compliant to MIL-PRF-38535, this parameter is not production tested. ∗∗ On products compliant to MIL-PRF-38535, this parameter does not apply. 1** 1 UNIT ns ns ns ns ns ns ns ns ns noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4) SN74AHC373 PARAMETER MIN MAX UNIT VOL(P) VOL(V) Quiet output, maximum dynamic VOL VOH(V) VIH(D) Quiet output, minimum dynamic VOH 4.1 V High-level dynamic input voltage 3.5 V Quiet output, minimum dynamic VOL VIL(D) Low-level dynamic input voltage NOTE 4: Characteristics are for surface-mount packages only. 0.8 V –0.8 V 1.5 V TYP UNIT operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load, POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 f = 1 MHz 18 pF 5 SN54AHC373, SN74AHC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS235I – OCTOBER 1995 – REVISED JULY 2003 PARAMETER MEASUREMENT INFORMATION From Output Under Test RL = 1 kΩ From Output Under Test Test Point VCC Open S1 TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input tw tsu VCC Input 50% VCC 50% VCC 0V th VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VCC 50% VCC Input 50% VCC 0V tPLH In-Phase Output tPHL 50% VCC tPHL Out-of-Phase Output VOH 50% VCC VOL VCC Output Control Output Waveform 1 S1 at VCC (see Note B) 50% VCC 0V tPZL VOH 50% VCC VOL tPLZ ≈VCC 50% VCC tPZH tPLH 50% VCC 50% VCC Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOL + 0.3 V VOL tPHZ 50% VCC VOH – 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-9686601Q2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629686601Q2A SNJ54AHC 373FK 5962-9686601QRA ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9686601QR A SNJ54AHC373J 5962-9686601QSA ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9686601QS A SNJ54AHC373W SN74AHC373DBR ACTIVE SSOP DB 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HA373 Samples SN74AHC373DGVR ACTIVE TVSOP DGV 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HA373 Samples SN74AHC373DW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AHC373 Samples SN74AHC373DWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AHC373 Samples SN74AHC373N ACTIVE PDIP N 20 20 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74AHC373N Samples SN74AHC373NSR ACTIVE SO NS 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AHC373 Samples SN74AHC373PW ACTIVE TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HA373 Samples SN74AHC373PWG4 ACTIVE TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HA373 Samples SN74AHC373PWR ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HA373 Samples SNJ54AHC373FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629686601Q2A SNJ54AHC 373FK SNJ54AHC373J ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9686601QR A SNJ54AHC373J SNJ54AHC373W ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9686601QS A SNJ54AHC373W Addendum-Page 1 Samples Samples Samples Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2022 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of