SN74AHCT00N

SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K − OCTOBER 1995 − REVISED JULY 2003 D Inputs Are TTL-Voltage Compatible D Latch-Up Performance Exceeds 250 mA Per D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) JESD 17 SN54AHCT00 . . . J OR W PACKAGE SN74AHCT00 . . . D, DB, DGV, N, NS, OR PW PACKAGE (TOP VIEW) 13 3 12 4 11 5 10 6 9 7 8 1B 1Y 2A 2B 2Y 14 1B 1A NC VCC 4B VCC 1 SN54AHCT00 . . . FK PACKAGE (TOP VIEW) 2 13 4B 3 12 4A 4 11 4Y 1Y NC 2A NC 2B 10 3B 9 3A 5 6 7 8 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4A NC 4Y NC 3B 2Y GND NC 3Y 3A 2 VCC 4B 4A 4Y 3B 3A 3Y 3Y 14 1A 1 GND 1A 1B 1Y 2A 2B 2Y GND SN74AHCT00 . . . RGY PACKAGE (TOP VIEW) NC − No internal connection description/ordering information The ’AHCT00 devices perform the Boolean function Y = A • B or Y = A + B in positive logic. ORDERING INFORMATION Tape and reel SN74AHCT00RGYR HB00 PDIP − N Tube SN74AHCT00N SN74AHCT00N Tube SN74AHCT00D Tape and reel SN74AHCT00DR SOP − NS Tape and reel SN74AHCT00NSR AHCT00 SSOP − DB Tape and reel SN74AHCT00DBR HB00 Tube SN74AHCT00PW Tape and reel SN74AHCT00PWR TVSOP − DGV Tape and reel SN74AHCT00DGVR HB00 CDIP − J Tube SNJ54AHCT00J SNJ54AHCT00J CFP − W Tube SNJ54AHCT00W SNJ54AHCT00W LCCC − FK Tube SNJ54AHCT00FK SNJ54AHCT00FK TSSOP − PW −55°C 55 C to 125 125°C C † TOP-SIDE MARKING QFN − RGY SOIC − D −40°C to 85°C ORDERABLE PART NUMBER PACKAGE† TA AHCT00 HB00 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS OUTPUT Y A B H H L L X H X L H Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright © 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K − OCTOBER 1995 − REVISED JULY 2003 logic diagram, each gate (positive logic) A Y B absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W (see Note 2): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W (see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W (see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W (see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W (see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 3. The package thermal impedance is calculated in accordance with JESD 51-5. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K − OCTOBER 1995 − REVISED JULY 2003 recommended operating conditions (see Note 4) SN54AHCT00 SN74AHCT00 MIN MAX MIN MAX 4.5 5.5 4.5 5.5 UNIT VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage 0.8 V VI Input voltage 0 5.5 0 5.5 V VO Output voltage 0 VCC 0 VCC V IOH High-level output current −8 −8 mA IOL Low-level output current 8 8 mA Δt/Δv Input transition rise or fall rate 20 ns/V TA Operating free-air temperature 85 °C 2 2 0.8 20 −55 125 −40 V V NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOH VOL TEST CONDITIONS VCC IOH = −50 mA 45V 4.5 IOH = −8 mA IOL = 50 mA TA = 25°C MIN TYP 4.4 4.5 SN54AHCT00 MAX 3.94 45V 4.5 IOL = 8 mA II VI = 5.5 V or GND ICC VI = VCC or GND, ΔICC† One input at 3.4 V, Other inputs at VCC or GND Ci VI = VCC or GND MAX SN74AHCT00 MIN 4.4 4.4 3.8 3.8 MAX UNIT V 0.1 0.1 0.1 0.36 0.44 0.44 V ±0.1 ±1* ±1 mA 5.5 V 2 20 20 mA 5.5 V 1.35 1.5 1.5 mA 10 pF 0 V to 5.5 V IO = 0 MIN 5V 2 10 * On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V. † This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or V . CC switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPLH tPHL FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE A or B Y CL = 15 pF A or B Y CL = 50 pF TA = 25°C MIN SN54AHCT00 SN74AHCT00 TYP MAX MIN MAX MIN MAX 5** 6.9** 1** 8** 1 8 5** 6.9** 1** 8** 1 8 5.5 7.9 1 9 1 9 5.5 7.9 1 9 1 9 UNIT ns ns ** On products compliant to MIL-PRF-38535, this parameter is not production tested. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K − OCTOBER 1995 − REVISED JULY 2003 noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 5) SN74AHCT00 PARAMETER MIN TYP MAX UNIT VOL(P) Quiet output, maximum dynamic VOL 0.4 0.8 V VOL(V) Quiet output, minimum dynamic VOL −0.4 −0.8 V VOH(V) Quiet output, minimum dynamic VOH VIH(D) High-level dynamic input voltage VIL(D) Low-level dynamic input voltage 4.5 V 2 V 0.8 V TYP UNIT 10.5 pF NOTE 5: Characteristics are for surface-mount packages only. operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd 4 TEST CONDITIONS Power dissipation capacitance No load, POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 f = 1 MHz SN54AHCT00, SN74AHCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS229K − OCTOBER 1995 − REVISED JULY 2003 PARAMETER MEASUREMENT INFORMATION VCC From Output Under Test RL = 1 kΩ From Output Under Test Test Point S1 Open TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw 3V 1.5 V Input 1.5 V th tsu 3V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.5 V Input 1.5 V 0V tPLH tPHL VOH In-Phase Output 50% VCC tPHL Out-of-Phase Output 50% VCC VOL 3V Output Control Output Waveform 1 S1 at VCC (see Note B) 1.5 V 0V tPZL 50% VCC tPLZ ≈VCC 50% VCC tPZH tPLH VOH 50% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 50% VCC VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-9682301Q2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629682301Q2A SNJ54AHCT 00FK 5962-9682301QCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9682301QC A SNJ54AHCT00J 5962-9682301QDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9682301QD A SNJ54AHCT00W SN74AHCT00D ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AHCT00 Samples SN74AHCT00DBR ACTIVE SSOP DB 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HB00 Samples SN74AHCT00DGVR ACTIVE TVSOP DGV 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HB00 Samples SN74AHCT00DR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AHCT00 Samples SN74AHCT00DRE4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AHCT00 Samples SN74AHCT00N ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74AHCT00N Samples SN74AHCT00NE4 ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74AHCT00N Samples SN74AHCT00NSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 AHCT00 Samples SN74AHCT00PW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HB00 Samples SN74AHCT00PWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HB00 Samples SN74AHCT00RGYR ACTIVE VQFN RGY 14 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 HB00 Samples SNJ54AHCT00FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629682301Q2A SNJ54AHCT 00FK SNJ54AHCT00J ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9682301QC A Addendum-Page 1 Samples Samples Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 14-Oct-2022 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) (3) Device Marking Samples (4/5) (6) SNJ54AHCT00J SNJ54AHCT00W ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9682301QD A SNJ54AHCT00W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of