SN74ALS652ADWR

SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 DEVICE A OUTPUT B OUTPUT LOGIC SN74ALS651A, ’AS651 3-State 3-State Inverting SN54ALS652, SN74ALS652A, ’AS652 3-State 3-State SN54ALS’, SN54AS’ . . . JT PACKAGE SN74ALS’, SN74AS’ . . . DW OR NT PACKAGE (TOP VIEW) CLKAB SAB OEAB A1 A2 A3 A4 A5 A6 A7 A8 GND True ’ALS653 Open Collector 3-State Inverting SN74ALS654 Open Collector 3-State True 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC CLKBA SBA OEBA B1 B2 B3 B4 B5 B6 B7 B8 SN54ALS’, SN54AS’ . . . FK PACKAGE (TOP VIEW) description These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select real-time or stored data transfer. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input level selects real-time data, and a high input level selects stored data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the octal bus transceivers and registers OEAB SAB CLKAB NC VCC CLKBA SAB D D D Bus Transceivers/Registers Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data Choice of True or Inverting Data Paths Choice of 3-State or Open-Collector Outputs to A Bus A1 A2 A3 NC A4 A5 A6 5 4 3 2 1 28 27 26 25 6 24 7 23 8 22 9 21 10 20 11 19 12 13 14 15 16 17 18 OEBA B1 B2 NC B3 B4 B5 A7 A8 GND NC B8 B7 B6 D D NC – No internal connection Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) terminals, regardless of the select- or output-control terminals. When SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state. The -1 versions of the SN74ALS651A and SN74ALS652A are identical to the standard versions except that the recommended maximum IOL for the -1 versions is increased to 48 mA. There are no -1 versions of the SN54ALS652, SN54ALS653, SN74ALS653, and SN74ALS654. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 ORDERING INFORMATION TA ORDERABLE PART NUMBER PACKAGE† PDIP – NT 0°C to 70°C SOIC – DW CDIP – JT Tube SN74ALS651ANT SN74ALS652ANT SN74ALS652ANT SN74ALS653NT SN74ALS653NT SN74ALS654NT SN74ALS654NT SN74AS651NT SN74AS651NT SN74AS652NT SN74AS652NT SN74ALS651ADW Tape and reel SN74ALS651ADWR Tube SN74ALS652ADW Tape and reel SN74ALS652ADWR Tube SN74ALS653DW Tape and reel SN74ALS653DWR Tube SN74ALS654DW Tape and reel SN74ALS654DWR Tube SN74AS651DW Tape and reel SN74AS651DWR Tube SN74AS652DW Tape and reel SN74AS652DWR –55°C 55°C to 125°C LCCC – FK SN74ALS651ANT Tube Tube Tube TOP-SIDE MARKING ALS651A ALS652A ALS653 ALS654 AS651 AS652 SNJ54ALS652JT SNJ54ALS652JT SNJ54ALS653JT SNJ54ALS653JT SNJ54AS651JT SNJ54AS651JT SNJ54AS652JT SNJ54AS652JT SNJ54ALS652FK SNJ54ALS652FK SNJ54ALS653FK SNJ54ALS653FK SNJ54AS651FK SNJ54AS651FK SNJ54AS652FK SNJ54AS652FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS 3 21 OEAB OEBA L L 1 23 2 CLKAB CLKBA SAB X X X BUS B BUS A BUS A BUS B SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 22 SBA L 3 21 OEAB OEBA H H 21 OEBA H X H 1 23 2 CLKAB CLKBA SAB ↑ X ↑ X ↑ ↑ X X X 2 SAB L 22 SBA X BUS B BUS A BUS A 3 OEAB X L L 23 CLKBA X REAL-TIME TRANSFER BUS A TO BUS B BUS B REAL-TIME TRANSFER BUS B TO BUS A 1 CLKAB X 22 3 21 1 23 2 22 SBA OEAB H OEBA L CLKAB CLKBA SAB SBA H or L H or L H H X X X STORAGE FROM A, B, OR A AND B TRANSFER STORED DATA TO A AND/OR B Pin numbers shown are for the DW, JT, and NT packages. Figure 1. Bus-Management Functions POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 Function Tables SN54ALS653, SN54AS651, SN74ALS651A, SN74ALS653, SN74AS651 DATA I/O† INPUTS OEAB OEBA CLKAB CLKBA SAB L H H or L H or L X L H ↑ ↑ X X H ↑ H or L H H ↑ ↑ X X‡ L X H or L ↑ X L L ↑ ↑ L L X SBA OPERATION OR FUNCTION A1– A8 B1– B8 X Input Input Isolation X Input Input Store A and B data X Input Unspecified‡ Store A, hold B X Input Output Store A in both registers Unspecified‡ Input Hold A, store B X X X‡ Output Input Store B in both registers X X L Output Input Real-time B data to A bus L L X H or L X H Output Input Stored B data to A bus H H X X L X Input Output Real-time A data to B bus H H H or L X H X Input Output Stored A data to B bus Output Stored A data to B bus and stored B data to A bus H L H or L H or L H H Output † The data output functions can be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data input functions always are enabled; i.e., data at the bus terminals is stored on every low-to-high transition on the clock inputs. ‡ Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered to load both registers. SN54ALS652, SN54AS652, SN74ALS652A, SN74ALS654, SN74AS652 DATA I/O† INPUTS OEAB OEBA CLKAB CLKBA SAB SBA L H H or L H or L X L H ↑ ↑ X X H ↑ H or L H H ↑ ↑ X X‡ L X H or L ↑ X L L ↑ ↑ X X X‡ L L X X X L L L X H or L X H H H X X L H H H or L X H H L H or L H or L H H OPERATION OR FUNCTION A1– A8 B1– B8 X Input Input Isolation X Input Input Store A and B data X Input Unspecified‡ Store A, hold B X Input Unspecified‡ Output Store A in both registers Input Hold A, store B Output Input Store B in both registers Output Input Real-time B data to A bus Output Input Stored B data to A bus X Input Output Real-time A data to B bus X Input Output Stored A data to B bus Output Output Stored A data to B bus and stored B data to A bus † The data output functions can be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data input functions always are enabled; i.e., data at the bus terminals is stored on every low-to-high transition on the clock inputs. ‡ Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered to load both registers. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 logic symbols† SN54AS651, SN74ALS651A, SN74AS651 OEBA OEAB CLKBA SBA CLKAB SAB A1 21 3 23 22 1 EN1 [BA] OEBA EN2 [AB] OEAB 2 C6 G7 4 ≥1 A4 A5 A6 A7 A8 SBA CLKAB SAB 5 1 20 4D B1 A1 5 1 7 1 A3 CLKBA C4 G5 6D A2 SN54ALS652, SN54AS652, SN74ALS652A, SN74AS652 ≥1 21 3 23 22 1 OEAB C6 G7 4 ≥1 7 6 18 7 17 8 16 9 15 10 14 11 13 A2 B3 A3 B4 A4 B5 A5 B6 A6 B7 A7 B8 A8 CLKBA SBA CLKAB SAB A1 23 22 1 OEBA EN2 [AB] OEAB 4 ≥1 A4 A5 A6 A7 A8 SAB 5 4D 20 B1 A1 5 1 7 1 A3 SBA CLKAB 1 6D A2 CLKBA C4 G5 C6 G7 ≥1 20 B1 ≥1 2 7 5 19 6 18 7 17 8 16 9 15 10 14 11 13 B2 B3 B4 B5 B6 B7 B8 SN74ALS654 EN1 [BA] 2 4D 5 1 7 1 B2 5 1 2 19 3 C4 G5 6D 5 21 EN2 [AB] 2 SN54ALS653, SN74ALS653 OEBA EN1 [BA] 21 3 23 22 1 EN1 [BA] EN2 [AB] C4 G5 2 C6 G7 4 ≥1 1 7 1 19 6 18 7 17 8 16 9 15 10 14 11 13 B2 A2 B3 A3 B4 A4 B5 A5 B6 A6 B7 B8 A7 A8 4D 20 B1 5 1 6D 2 7 5 5 ≥1 2 7 5 19 6 18 7 17 8 16 9 15 10 14 11 13 B2 B3 B4 B5 B6 B7 B8 † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, JT, and NT packages. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 logic diagrams (positive logic) OEBA OEAB CLKBA SBA CLKAB SAB 21 SN54ALS653, SN54AS651, SN74ALS651A, SN74ALS653, SN74AS651 3 23 22 1 2 One of Eight Channels 1D C1 A1 4 20 1D B1 C1 To Seven Other Channels OEBA OEAB CLKBA SBA CLKAB SAB 21 3 SN54ALS652, SN54AS652, SN74ALS652A, SN74ALS654, SN74AS652 23 22 1 2 One of Eight Channels 1D C1 A1 4 20 1D C1 To Seven Other Channels Pin numbers shown are for the DW, JT, and NT packages. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 B1 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI: Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V I / O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V Package thermal impedance, θJA (see Note 1): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W NT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51. recommended operating conditions SN74ALS651A MIN NOM MAX 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 V High-level output current –15 mA High-level input voltage 2 V V 24 IOL Low level output current Low-level fclock Clock frequency tw Pulse duration tsu th Setup time before CLKAB↑ or CLKBA↑ A or B 10 Hold time after CLKAB↑ or CLKBA↑ A or B 0 48‡ 0 CLKBA or CLKAB high 12.5 CLKBA or CLKAB low 12.5 TA Operating free-air temperature ‡ Applies only to the SN74ALS651A-1 and only if VCC is maintained between 4.75 V and 5.25 V 40 mA MHz ns ns ns 0 70 °C recommended operating conditions SN54ALS652 VCC VIH Supply voltage VIL IOH Low-level input voltage High-level input voltage NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 2 High-level output current IOL Low level output current Low-level fclock Clock frequency SN74ALS652A MIN 2 V V 0.7 0.8 V – 12 –15 mA 12 24 48‡ 0 UNIT 35 0 CLKBA or CLKAB high 14.5 12.5 CLKBA or CLKAB low 14.5 12.5 40 mA MHz tw Pulse duration tsu th Setup time before CLKAB↑ or CLKBA↑ A or B 15 10 ns Hold time after CLKAB↑ or CLKBA↑ A or B 5 0 ns TA Operating free-air temperature – 55 ‡ Applies only to the SN74ALS652A-1 and only if VCC is maintained between 4.75 V and 5.25 V POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 125 0 ns 70 °C 7 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK SN74ALS651A TYP† MAX MIN VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 0.4 mA 5V VCC = 4 4.5 IOH = – 3 mA IOH = – 15 mA VCC = 4 4.5 5V IOL = 12 mA IOL = 24 mA 0.25 0.4 0.35 0.5 VCC = 4.75 V, VCC = 5.5 V, IOL = 48 mA (-1 versions) VI = 7 V 0.35 0.5 Control inputs A or B ports VCC = 5.5 V, VI = 5.5 V VCC = 5.5 5 5 V, V VI = 2.7 27V VCC = 5.5 5 5 V, V VI = 0.4 04V VCC = 5.5 V, VO = 2.25 V VOH VOL II TEST CONDITIONS – 1.2 VCC – 2 2.4 A or B ports‡ 2 0.1 0.1 20 20 Control inputs IIL IO§ ICC A or B ports‡ V V 3.2 Control inputs IIH UNIT V mA µA A – 0.2 VCC = 5.5 V – 0.2 – 30 – 112 Outputs high 42 68 Outputs low 52 82 Outputs disabled 52 82 mA mA mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS. 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 0.4 mA VCC = 4.5 V IOH = – 3 mA IOH = – 12 mA VCC = 4 4.5 5V VOL MIN A or B ports VCC = 5.5 V, VI = 7 V VI = 5.5 V 3.2 VCC = 5.5 5 5 V, V VI = 2.7 27V 5 5 V, V VCC = 5.5 04V VI = 0.4 IO§ VCC = 5.5 V, VO = 2.25 V ICC VCC = 5.5 V A or B ports‡ UNIT V V 2 0.25 Control inputs IIL 3.2 2 Control inputs A or B ports‡ – 1.2 VCC – 2 2.4 0.4 IOL = 24 mA IOL = 48 mA (-1 versions) Control inputs IIH SN74ALS652A TYP† MAX MIN – 1.2 VCC – 2 2.4 IOH = – 15 mA IOL = 12 mA VCC = 4.75 V, VCC = 5.5 V, II SN54ALS652 TYP† MAX TEST CONDITIONS – 20 0.25 0.4 0.35 0.5 0.35 0.5 0.1 0.1 0.1 0.1 20 20 20 20 – 0.2 – 0.2 – 0.2 – 0.2 – 112 – 30 – 112 Outputs high 47 76 47 76 Outputs low 55 88 55 88 Outputs disabled 55 88 55 88 V mA µA A mA mA mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 switching characteristics (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX† UNIT SN74ALS651A MIN fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ CLKBA or CLKAB A or B A or B B or A SBA or SAB‡ (with A or B high) A or B SBA or SAB‡ (with A or B low) A or B OEBA A OEBA A OEAB B POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MHz 8 32 5 17 2 18 2 10 8 38 6 21 8 25 7 21 3 20 5 18 2 9 3 12 3 22 6 21 2 OEAB B tPLZ 2 † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ‡ These parameters are measured with the internal output state of the storage register opposite that of the bus input. 10 MAX 40 12 14 ns ns ns ns ns ns ns ns SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 switching characteristics (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX† SN54ALS652 MIN fmax tPLH MAX 35 UNIT SN74ALS652A MIN MAX 40 MHz 10 35 8 30 5 20 5 17 5 20 4 18 3 15 3 12 15 40 8 35 6 23 6 20 8 30 8 25 5 24 5 20 3 20 3 17 5 22 5 18 1 12 1 10 2 20 2 16 8 25 3 22 6 21 5 18 1 12 1 OEAB B tPLZ 2 21 2 † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ‡ These parameters are measured with the internal output state of the storage register opposite that of the bus input. 10 tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ CLKBA or CLKAB A or B A or B B or A SBA or SAB‡ (with A or B high) A or B SBA or SAB‡ (with A or B low) A or B OEBA A OEBA A OEAB B POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 16 ns ns ns ns ns ns ns ns 11 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI: Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V I / O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V Package thermal impedance, θJA (see Note 1): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W NT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51. recommended operating conditions SN54ALS653 SN74ALS653 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL VOH Low-level input voltage High-level output voltage A ports 5.5 5.5 V IOH IOL High-level output current B ports – 12 – 15 mA fclock Clock frequency tw Pulse duration tsu th TA Operating free-air temperature High-level input voltage 2 2 V 0.7 Low-level output current 0.8 12 0 25 V 0 V 24 mA 35 MHz CLKBA or CLKAB high 20 14.5 CLKBA or CLKAB low 20 14.5 Setup time before CLKAB↑ or CLKBA↑ A or B 15 10 ns Hold time after CLKAB↑ or CLKBA↑ A or B 5 0 ns – 55 125 ns 0 70 °C recommended operating conditions SN74ALS654 MIN NOM MAX 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL VOH Low-level input voltage High-level output voltage A ports 5.5 V IOH IOL High-level output current B ports – 15 mA fclock Clock frequency tw Pulse duration tsu th Setup time before CLKAB↑ or CLKBA↑ A or B 10 Hold time after CLKAB↑ or CLKBA↑ A or B 0 TA Operating free-air temperature 12 High-level input voltage 2 V 0.8 Low-level output current 0 CLKBA or CLKAB high 14.5 CLKBA or CLKAB low 14.5 0 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V V 24 mA 35 MHz ns ns ns 70 °C SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH B ports VOL II TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 0.4 mA VCC = 4.5 V IOH = – 3 mA IOH = – 12 mA VCC = 4 4.5 5V Control inputs A or B ports VCC = 5.5 V, VCC = 5.5 V, SN54ALS653 TYP† MAX MIN –1.2 VCC – 2 2.4 IOH IO§ ICC 0.25 0.4 0.35 0.5 0.1 0.1 0.1 0.1 20 20 20 20 – 0.2 – 0.2 – 0.2 – 0.2 VI = 0.4 04V A ports VCC = 4.5 V, VOH = 5.5 V B ports VCC = 5.5 V, VO = 2.25 V VCC = 5.5 V 0.4 VI = 5.5 V VCC = 5.5 5 5 V, V A or B ports‡ V V IOL = 24 mA VI = 7 V VI = 2.7 27V UNIT 2 0.25 Control inputs IIL 3.2 2 IOH = – 15 mA IOL = 12 mA VCC = 5.5 5 5 V, V A or B ports‡ –1.2 VCC – 2 2.4 3.2 Control inputs IIH SN74ALS653 TYP† MAX MIN 0.1 – 20 – 112 – 30 V mA µA A mA 0.1 mA – 112 mA Outputs high 47 76 47 76 Outputs low 55 88 55 88 Outputs disabled 55 88 55 88 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH B ports VOL II Control inputs A or B ports TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 0.4 mA 5V VCC = 4 4.5 IOH = – 3 mA IOH = – 15 mA VCC = 4 4.5 5V IOL = 12 mA IOL = 24 mA VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 5.5 V IIH Control inputs A or B ports‡ VCC = 5 5.5 5V V, VI = 2 2.7 7V IIL Control inputs A or B ports‡ VCC = 5 5.5 5V V, VI = 0 0.4 4V VCC = 4.5 V, VCC = 5.5 V, VOH = 5.5 V VO = 2.25 V IOH IO§ ICC A ports B ports VCC = 5.5 V SN74ALS654 TYP† MAX MIN – 1.2 VCC – 2 2.4 UNIT V V 3.2 2 0.25 0.4 0.35 0.5 0.1 0.1 20 20 – 0.2 – 0.2 – 30 V mA µA mA 0.1 mA – 112 mA Outputs high 47 76 Outputs low 55 88 Outputs disabled 55 88 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS. 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 switching characteristics (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 680 Ω (A outputs), R1 = R2 = 500 Ω (B outputs), TA = MIN to MAX† SN54ALS653 MIN fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ SN74ALS653 MAX 25 CLKBA A CLKAB B A B B A SBA‡ (with B high) A SBA‡ (with B low) A SAB‡ (with A high) B SAB‡ (with A low) B OEBA A OEAB B • DALLAS, TEXAS 75265 MIN MAX 35 MHz 16 71 16 64 6 24 6 22 10 35 10 30 5 20 5 17 5 20 5 18 1.5 18 2 15 8 63 12 56 2 18 2 15 12 68 19 62 5 27 5 25 12 68 19 62 5 27 5 25 8 30 15 35 6 25 6 22 12 40 8 25 6 25 6 22 6 35 6 30 6 27 6 24 7 25 8 22 6 25 6 22 1 14 2 16 1 16 OEAB B tPLZ 2 21 † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ‡ These parameters are measured with the internal output state of the storage register opposite that of the bus input. POST OFFICE BOX 655303 UNIT ns ns ns ns ns ns ns ns ns ns ns 15 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 switching characteristics (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 680 Ω (A outputs), R1 = R2 = 500 Ω (B outputs), TA = MIN to MAX† SN74ALS654 MIN fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ MAX 35 CLKBA A CLKAB B A B B A SBA‡ (with B low) A SBA‡ (with B high) A SAB‡ (with A low) B SAB‡ (with A high) B OEBA A OEAB B POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MHz 16 64 6 22 10 30 5 17 5 18 2 15 12 56 2 21 19 62 5 25 19 62 5 25 15 35 6 22 8 25 6 22 6 30 6 24 6 22 6 22 1 OEAB B tPLZ 2 † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ‡ These parameters are measured with the internal output state of the storage register opposite that of the bus input. 16 UNIT 14 16 ns ns ns ns ns ns ns ns ns ns ns SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI: Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V I / O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V Package thermal impedance, θJA (see Note 1): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W NT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51. recommended operating conditions SN54AS651 SN54AS652 SN74AS651 SN74AS652 UNIT MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 0.8 V High-level output current –12 –15 mA IOL fclock Low-level output current tw Pulse duration tsu th High-level input voltage 2 2 32 Clock frequency 0* 75* 0 CLKBA or CLKAB high 6* 5 CLKBA or CLKAB low 7* 6 Setup time before CLKAB↑ or CLKBA↑ A or B 7* 6 Hold time after CLKAB↑ or CLKBA A or B 0* 0 TA Operating free-air temperature – 55 125 0 * On products compliant to MIL-PRF-38535, this parameter is based on characterized data but is not production tested. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V V 48 mA 90 MHz ns ns ns 70 °C 17 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER SN54AS651 SN54AS652 TEST CONDITIONS MIN VIK VOH VOL II VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 2 mA VCC = 4.5 V IOH = – 3 mA IOH = – 12 mA 5V VCC = 4 4.5 Control inputs A or B ports VCC = 5.5 V, VCC = 5.5 V, TYP† A or B ports‡ VCC – 2 2.4 A or B ports‡ IO§ ′AS651 ′AS652 – 1.2 3.2 2 0.25 0.5 0.1 0.1 0.1 0.1 20 20 70 70 – 0.5 – 0.5 – 0.75 – 0.75 VI = 0.4 04V VCC = 5.5 V, VO = 2.25 V Outputs high V V VI = 5.5 V VCC = 5.5 5 5 V, V VCC = 5.5 V UNIT MAX IOL = 48 mA VI = 7 V VI = 2.7 27V ICC TYP† 2 IOH = – 15 mA IOL = 32 mA VCC = 5.5 5 5 V, V VCC = 5.5 V MIN VCC – 2 2.4 3.2 0.35 Control input IIL MAX – 1.2 Control inputs IIH SN74AS651 SN74AS652 – 30 – 112 – 30 0.5 – 112 110 185 110 185 Outputs low 120 195 120 195 Outputs disabled 130 195 130 195 Outputs high 120 195 120 195 Outputs low 130 211 130 211 V mA µA A mA mA mA Outputs disabled 130 211 130 211 † All typical values are at VCC = 5 V, TA = 25 °C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS. 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 switching characteristics (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX† SN54AS651 MIN fmax tPLH MAX 75* UNIT SN74AS651 MIN MAX 90 MHz 2 11 2 8.5 2 10 2 9 2 12 2 8 1 8 1 7 2 15 2 11 2 11 2 9 2 11 2 10 3 18 3 16 2 10 2 9 2 10 2 9 3 12 3 11 3 20 3 16 2 11 2 OEAB B tPLZ 2 12 2 * On products compliant to MIL-PRF-38535, this parameter is based on characterized data but is not production tested. † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ‡ These parameters are measured with the internal output state of the storage register opposite that of the bus input. 10 tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ CLKBA or CLKAB A or B A or B B or A SBA or SAB‡ A or B OEBA A OEBA A OEAB B POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 ns ns ns ns ns ns ns 19 SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 switching characteristics (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V TO 5.5 V, CL = 50 PF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN TO MAX† SN54AS652 MIN fmax tPLH MAX 75* UNIT SN74AS652 TYP MAX 90 MHz 2 11 2 8.5 2 10 2 9 2 12 2 9 1 8 1 7 2 15 2 11 2 11 2 9 2 11 2 10 3 18 3 16 2 10 2 9 2 10 2 9 3 12 3 11 3 20 3 16 2 11 2 OEAB B tPLZ 2 12 2 * On products compliant to MIL-PRF-38535, this parameter is based on characterized data but is not production tested. † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ‡ These parameters are measured with the internal output state of the storage register opposite that of the bus input. 10 tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ 20 CLKBA or CLKAB A or B A or B B or A SBA or SAB‡ A or B OEBA A OEBA A OEAB B POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 ns ns ns ns ns ns ns SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS066G – DECEMBER 1983 – REVISED DECEMBER 2000 PARAMETER MEASUREMENT INFORMATION 7V VCC SWITCH POSITION TABLE Open S1 TEST S1 tPLH tPHL Open Open tPZH tPZL Open Closed tPHZ Open tPLZ Closed R1 = 500 Ω From Output Under Test CL = 50 pF (see Note A) Test Point R2 = 500 Ω RL From Output Under Test Test Point CL = 50 pF (see Note A) LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V 3.5 V Timing Input 1.3 V High-Level Pulse 0.3 V tw 0.3 V th tsu Data Input 1.3 V 1.3 V 3.5 V 1.3 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 1.3 V 0.3 V 0.3 V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3.5 V Output Control 1.3 V 1.3 V 0.3 V 3.5 V Input 1.3 V tPZL 1.3 V tPLZ 0.3 V In-Phase Output VOH 1.3 V VOL 1.3 V Waveform 1 S1 Closed (see Note B) VOH 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.3 V tPHZ tPLH tPHL Out-of-Phase Output 3.5 V tPHL tPLH tPZH Waveform 2 S1 Open (see Note B) VOL 0.3 V VOH 1.3 V 0.3 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns. D. The outputs are measured one at a time with one transition per measurement. Figure 2. Load Circuits and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21 PACKAGE OPTION ADDENDUM www.ti.com 2-Sep-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-88673013A ACTIVE LCCC FK 28 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 596288673013A SNJ54ALS 652FK 5962-8867301LA ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8867301LA SNJ54ALS652JT Samples 5962-8868701LA ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8868701LA SNJ54AS652JT Samples 5962-89687013A ACTIVE LCCC FK 28 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 596289687013A SNJ54ALS 653FK 5962-8968701LA ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8968701LA SNJ54ALS653JT Samples SN54ALS652JT ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN54ALS652JT Samples SN54AS652JT ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN54AS652JT Samples SN74ALS652A-1DW ACTIVE SOIC DW 24 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS652A-1 Samples SN74ALS652ADW ACTIVE SOIC DW 24 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS652A Samples SN74ALS652ADWR ACTIVE SOIC DW 24 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS652A Samples SN74ALS653DW ACTIVE SOIC DW 24 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS653 Samples SN74ALS653DWE4 ACTIVE SOIC DW 24 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS653 Samples SN74ALS654DW ACTIVE SOIC DW 24 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS654 Samples SN74AS652DW ACTIVE SOIC DW 24 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AS652 Samples SNJ54ALS652FK ACTIVE LCCC FK 28 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 Addendum-Page 1 596288673013A SNJ54ALS 652FK Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 2-Sep-2022 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SNJ54ALS652JT ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8867301LA SNJ54ALS652JT SNJ54ALS653FK ACTIVE LCCC FK 28 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 596289687013A SNJ54ALS 653FK SNJ54ALS653JT ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8968701LA SNJ54ALS653JT Samples SNJ54AS652JT ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8868701LA SNJ54AS652JT Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of