SN74ALS869DWR

SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 • • • • Fully Programmable With Synchronous Counting and Loading SN74ALS867A and ′AS867 Have Asynchronous Clear; SN74ALS869 and ′AS869 Have Synchronous Clear Fully Independent Clock Circuit Simplifies Use Ripple-Carry Output for n-Bit Cascading Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs SN54AS867, SN54AS869 . . . JT PACKAGE SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 . . . DW OR NT PACKAGE (TOP VIEW) S0 S1 A B C D E F G H ENT GND description These counters are fully programmable; they may be preset to any number between 0 and 255. The load-input circuitry allows parallel loading of the cascaded counters. Because loading is synchronous, selecting the load mode disables the counter and causes the outputs to agree with the data inputs after the next clock pulse. 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC ENP QA QB QC QD QE QF QG QH CLK RCO A S1 S0 NC VCC SN54AS867, SN54AS869 . . . FK PACKAGE (TOP VIEW) B C D NC E F G 5 2 1 28 27 26 25 6 24 7 23 8 22 9 21 10 20 4 3 19 11 12 13 14 15 16 17 18 QB QC QD NC QE QF QG H ENT GND NC RCO CLK QH These synchronous, presettable, 8-bit up/down counters feature internal-carry look-ahead circuitry for cascading in high-speed counting applications. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincidentally with each other when so instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes normally associated with asynchronous (rippleclock) counters. A buffered clock (CLK) input triggers the eight flip-flops on the rising (positivegoing) edge of the clock waveform. 1 ENP QA • NC – No internal connection The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Two count-enable (ENP and ENT) inputs and a ripple-carry (RCO) output are instrumental in accomplishing this function. Both ENP and ENT must be low to count. The direction of the count is determined by the levels of the select (S0, S1) inputs as shown in the function table. ENT is fed forward to enable RCO. RCO thus enabled produces a low-level pulse while the count is zero (all outputs low) counting down or 255 counting up (all outputs high). This low-level overflow-carry pulse can be used to enable successive cascaded stages. Transitions at ENP and ENT are allowed regardless of the level of CLK. All inputs are diode clamped to minimize transmission-line effects, thereby simplifying system design. These counters feature a fully independent clock circuit. With the exception of the asynchronous clear on the SN74ALS867A and ′AS867, changes at S0 and S1 that modify the operating mode have no effect on the Q outputs until clocking occurs. For the ′AS867 and ′AS869, any time ENP and/or ENT is taken high, RCO either goes or remains high. For the SN74ALS867A and SN74ALS869, any time ENT is taken high, RCO either goes or remains high. The function of the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the stable setup and hold times. Copyright  1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 description (continued) The SN54AS867 and SN54AS869 are characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74ALS867A, SN74ALS869, SN74AS867, and SN74AS869 are characterized for operation from 0°C to 70°C. FUNCTION TABLE 2 S1 S0 FUNCTION L L Clear L H Count down H L Load H H Count up POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 logic symbols† SN74ALS867A S0 S1 ENT ENP CLK A B C D E F G H 1 2 11 23 14 3 0 1 CTRDIV 256 0 M 3 G4 1,4CT=0 G5 3,4CT=255 13 RCO C6/1,4,5 – /3,4,5 + 0R 22 2,6D 4 21 5 20 6 19 7 18 8 17 9 16 10 15 QA QB QC QD QE QF QG QH SN74ALS869 S0 S1 ENT ENP CLK A B C D E F G H 1 2 11 23 14 3 0 1 CTRDIV 256 0 M 3 G4 1,4CT=0 G5 3,4CT=255 13 RCO C6/1,4,5 – /3,4,5 + 0,6R 22 2,6D 4 21 5 20 6 19 7 18 8 17 9 16 10 15 QA QB QC QD QE QF QG QH † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, JT, and NT packages. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 logic symbols (continued)† ′AS867 S0 S1 ENT ENP CLK A B C D E F G H 1 2 11 23 14 3 0 1 CTRDIV 256 0 M 3 G4 1,4,5CT=0 G5 3,4,5CT=255 13 RCO C6/1,4,5 – /3,4,5 + 0R 22 2,6D 4 21 5 20 6 19 7 18 8 17 9 16 10 15 QA QB QC QD QE QF QG QH ′AS869 S0 S1 ENT ENP CLK A B C D E F G H 1 2 11 23 14 3 0 1 CTRDIV 256 0 M 3 G4 1,4,5CT=0 G5 3,4,5CT=255 RCO C6/1,4,5 – /3,4,5 + 0,6R 22 2,6D 4 21 5 20 6 19 7 18 8 17 9 16 10 15 † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, JT, and NT packages. 4 13 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 QA QB QC QD QE QF QG QH SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 logic diagram (positive logic) SN74ALS867A, SN74ALS869 14 CLK 1 S0 S1 2 SN74ALS867A Only (asynchronous clear) ENP 23 A 3 1D C1 R B 4 1D C1 R C 5 1D C1 R D 6 1D C1 R E 7 1D C1 R F 8 1D C1 R G 9 1D C1 R H 10 1D C1 R 22 Q A 21 Q B 20 Q C 19 Q D 18 Q E 17 Q F 16 Q G 15 Q H 13 RCO ENT 11 Pin numbers shown are for the DW, JT, and NT packages. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 logic diagram (positive logic) ′AS867, ′AS869 S0 S1 ENT ENP CLK A 1 ′AS867 Only (asynchronous clear) 2 11 13 23 14 22 3 4 5 6 7 8 9 10 1D C1 R Pin numbers shown are for the DW, JT, and NT packages. 6 QG 1D C1 R 15 H QF 1D C1 R 16 G QE 1D C1 R 17 F QD 1D C1 R 18 E QC 1D C1 R 19 D QB 1D C1 R 20 C QA 1D C1 R 21 B RCO POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 QH SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 typical clear, preset, count, and inhibit sequences The following sequence is illustrated below: 1. Clear outputs to zero (SN74ALS867A and ′AS867 are asynchronous; SN74ALS869 and ′AS869 are synchronous.) 2. Preset to binary 252 3. Count up to 253, 254, 255, 0, 1, and 2 4. Count down to 1, 0, 255, 254, 253, and 252 5. Inhibit S0 S1 A B C Data Inputs D E F G H CLK ENP ENT QA QB QC QD Outputs QE QF QG QH RCO Sync 252 253 254 255 0 1 Clear Count Up 2 1 0 255 254 253 252 Count Down Inhibit† Async Preset Clear † ENT and ENP both must be low for counting to occur. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN74ALS867A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN74ALS867A MIN NOM MAX 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage IOL fclock Low-level output current tw(clock) tw(clear) Pulse duration, CLK high or low 14 ns Pulse duration of clear pulse, S0 and S1 low 10 ns tsu High-level input voltage 2 V 0.8 High-level output current – 0.4 Clock frequency 0 Setup time before CLK↑ th Hold time after CLK↑ TA Operating free-air temperature Data inputs A – H 10 ENP or ENT 15 S0 low and S1 high (load) 12 S0 high and S1 low (count down) 12 S0 and S1 high (count up) 12 S0 high after S1↑ or S1 high after S0↑ 3 Data inputs A – H 0 V V mA 8 mA 35 MHz ns ns 0 70 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = –18 mA IOH = – 0.4 mA VOL 5V VCC = 4 4.5 IOL = 4 mA IOL = 8 mA II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V IIL IO§ VCC = 5.5 V, VCC = 5.5 V, VI = 0.4 V VO = 2.25 V SN74ALS867A TYP‡ MAX MIN –1.2 VCC – 2 – 30 UNIT V V 0.25 0.4 0.35 0.5 V 0.1 mA 20 µA – 0.2 mA –112 mA ICC VCC = 5.5 V 28 45 mA ‡ All typical values are at VCC = 5 V, TA = 25°C. § The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX† SN74ALS867A MIN fmax tPLH RCO CLK Any Q tPHL tPHL ENT RCO S0 or S1 (clear mode) Any Q tPLH tPHL S0 or S1 (count up/down) RCO tPHL tPLH MAX 35 CLK tPHL tPLH POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MHz 4 14 4 14 3 16 3 16 3 14 2 9 8 26 4 16 4 16 tPLH S0 or S1 (clear mode) RCO 4 † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. UNIT 16 ns ns ns ns ns ns 9 SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN74ALS869 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN74ALS869 VCC VIH Supply voltage VIL IOH Low-level input voltage IOL fclock Low-level output current tw(clock) Pulse duration, CLK high or low tsu High-level input voltage MIN NOM MAX 4.5 5 5.5 2 High-level output current – 0.4 0 Set p time before CLK↑ Setup th Hold time after CLK↑ TA Operating free-air temperature 10 ENP or ENT 15 S0 and S1 low (clear) 13 S0 low and S1 high (load) 13 S0 high and S1 low (count down) 13 S0 and S1 high (count up) 13 S0 high after S1↑ or S1 high after S0↑ 3 Data inputs A – H 0 V mA 8 mA 35 MHz 14 Data inputs A – H V V 0.8 Clock frequency UNIT ns ns ns 0 70 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = –18 mA IOH = – 0.4 mA VOL VCC = 4 4.5 5V IOL = 4 mA IOL = 8 mA II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V IIL IO§ VCC = 5.5 V, VCC = 5.5 V, VI = 0.4 V VO = 2.25 V SN74ALS869 TYP‡ MAX MIN –1.2 VCC – 2 – 30 UNIT V V 0.25 0.4 0.35 0.5 V 0.1 mA 20 µA – 0.2 mA –112 mA ICC VCC = 5.5 V 28 45 mA ‡ All typical values are at VCC = 5 V, TA = 25°C. § The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX† SN74ALS869 MIN fmax tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH MAX 35 CLK RCO CLK Any Q ENT RCO S1 (count up/down) RCO POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MHz 4 14 4 14 3 16 3 16 3 14 2 9 4 15 4 15 4 S0 RCO (clear/load) tPHL 4 † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. UNIT 16 12 ns ns ns ns ns 11 SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN54AS867 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74AS867 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN54AS867 SN74AS867 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 0.8 V High-level output current –2 –2 mA IOL fclock* Low-level output current tw(clock)* tw(clear)* Pulse duration, CLK high or low 12.5 10 ns Pulse duration of clear pulse, S0 and S1 low 12.5 10 ns 5 4 High-level input voltage 2 20 Clock frequency 0 Data inputs A – H ENP or ENT tsu* Set p time before CLK↑ Setup 2 40 0 9 8 S0 low and S1 high (load) 11 10 S0 and S1 low (clear) 11 10 S0 high and S1 low (count down) 42 40 S0 and S1 high (count up) 42 40 0 0 th* Hold time after CLK↑ Data inputs A – H tskew* Skew time between S0 and S1 (maximum to avoid inadvertent clear) V 20 mA 50 MHz ns ns 7 ns TA Operating free-air temperature – 55 125 0 70 * On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested. °C 12 POST OFFICE BOX 655303 8 V • DALLAS, TEXAS 75265 SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VOL RCO IIH IIL ENT Other inputs ENT Other inputs MIN VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = –18 mA IOH = – 2 mA VCC = 4.5 V IOL = 20 mA, VIL on ENT = 0.7 V VCC = 5.5 V, IOL = 20 mA VI = 7 V Other outputs II SN54AS867 TYP† MAX TEST CONDITIONS VCC = 5 5.5 5V V, VI = 2 2.7 7V VCC = 5 5.5 5V V, VI = 0 0.4 4V SN74AS867 TYP† MAX MIN –1.2 VCC – 2 –1.2 VCC – 2 0.34 UNIT V V 0.5 V 0.34 0.5 0.1 0.1 40 40 20 20 –4 –4 –2 –2 mA µA mA IO‡ VCC = 5.5 V, VO = 2.25 V – 30 – 112 – 30 – 112 mA ICC VCC = 5.5 V 134 195 134 195 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX§ SN54AS867 SN74AS867 MIN fmax* tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPHL MAX 40 CLK RCO CLK Any Q ENT RCO ENP RCO Clear (S0 or S1 low) Any Q MIN UNIT MAX 50 MHz 5 31 5 22 6 19 6 16 3 12 3 11 4 16 4 15 3 19 3 10 5 21 5 17 5 16 5 14 5 21 5 17 7 23 7 21 ns ns ns ns ns * On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested. § For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN54AS869 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74AS869 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN54AS869 SN74AS869 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.7 0.8 V High-level output current –2 –2 mA IOL fclock* Low-level output current 20 20 mA Clock frequency 40 45 MHz tw(clock)* Pulse duration, CLK high or low High-level input voltage 2 12.5 11 6 5 ENP or ENT 10 9 S0 low and S1 high (load) 13 11 S0 and S1 low (clear) 13 11 S0 high and S1 low (count down) 52 50 S0 and S1 high (count up) 52 50 Data inputs A – H tsu* th* TA Set p time before CLK↑ Setup Hold time after CLK↑ 2 Data inputs A – H Operating free-air temperature 0 – 55 0 * On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested. 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V ns ns 0 125 V ns 70 °C SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VOL RCO IIH IIL ENT Other inputs ENT Other inputs MIN VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = –18 mA IOH = – 2 mA VCC = 4.5 V, VCC = 4.5 V IOH = – 2 mA IOL = 20 mA, VIL on ENT = 0.7 V VCC = 5.5 V, IOL = 20 mA VI = 7 V Other outputs II SN54AS869 TYP† MAX TEST CONDITIONS 5V VCC = 5 5.5 V, 7V VI = 2 2.7 VCC = 5 5.5 5V V, VI = 0 0.4 4V SN74AS869 TYP† MAX MIN –1.2 –1.2 VCC – 2 V V VCC – 2* 0.34 UNIT 0.5 V 0.34 0.5 0.1 0.1 40 40 20 20 –4 –4 –2 –2 mA µA mA IO‡ VCC = 5.5 V, VO = 2.25 V – 30 – 112 – 30 – 112 mA ICC VCC = 5.5 V 134 195 134 195 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX§ SN54AS869 MIN fmax* tPLH tPHL tPLH tPHL tPLH tPHL tPLH MAX 40 CLK RCO CLK Any Q ENT RCO ENP RCO UNIT SN74AS869 MIN MAX 45 MHz 6 35 6 35 6 20 6 18 3 12 3 11 4 16 4 15 3 25 3 15 6 21 6 17 5 27 5 19 tPHL 6 21 6 18 * On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested. § For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ns ns ns ns 15 SN54AS867, SN54AS869 SN74ALS867A, SN74ALS869, SN74AS867, SN74AS869 SYNCHRONOUS 8-BIT UP/DOWN COUNTERS SDAS115C – DECEMBER 1982 – REVISED JANUARY 1995 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point From Output Under Test CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V tsu Data Input tw th 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ [3.5 V 1.3 V tPHZ tPZH Waveform 2 S1 Open (see Note B) 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V [0 V 3.5 V 1.3 V Input 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output 1.3 V 1.3 V VOL tPLH tPHL VOH Out-of-Phase Output (see Note C) 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-8966801LA ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8966801LA SNJ54AS867JT Samples SN54AS867JT ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN54AS867JT Samples SN54AS869JT ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN54AS869JT Samples SN74ALS867ADW ACTIVE SOIC DW 24 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS867A Samples SN74ALS869DW ACTIVE SOIC DW 24 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS869 Samples SN74ALS869DWE4 ACTIVE SOIC DW 24 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS869 Samples SN74AS869DW ACTIVE SOIC DW 24 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 AS869 Samples SNJ54AS867JT ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8966801LA SNJ54AS867JT Samples SNJ54AS869JT ACTIVE CDIP JT 24 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8952601LA SNJ54AS869JT Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of