SN54BCT2244, SN74BCT2244
OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS017D − SEPTEMBER 1988 − REVISED MARCH 2003
D Operating Voltage Range of 4.5 V to 5.5 V
D State-of-the-Art BiCMOS Design
SN54BCT2244 . . . J OR W PACKAGE
SN74BCT2244 . . . DW, N, OR NS PACKAGE
(TOP VIEW)
Significantly Reduces ICCZ
D Output Ports Have Equivalent 33-Ω Series
description/ordering information
The ’BCT2244 devices are designed specifically
to improve both the performance and density of
3-state memory address drivers, clock drivers,
and bus-oriented receivers and transmitters.
Together with the ’BCT2240 devices and
SN74BCT2241, these devices provide the choice
of selected combinations of inverting and
noninverting outputs, symmetrical active-low
output-enable (OE) inputs, and complementary
OE and OE inputs. These devices feature high
fan-out and improved fan-in.
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
2Y4
1A1
1OE
VCC
SN54BCT2244 . . . FK PACKAGE
(TOP VIEW)
1A2
2Y3
1A3
2Y2
1A4
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
1Y1
2A4
1Y2
2A3
1Y3
2Y1
GND
2A1
1Y4
2A2
To ensure the high-impedance state during power
up or power down, OE should be tied to VCC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
2OE
D
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
Resistors, So No External Resistors Are
Required
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
The outputs, which are designed to source or sink
up to 12 mA, include 33-Ω series resistors to
reduce overshoot and undershoot.
ORDERING INFORMATION
PDIP − N
0°C to 70°C
−55°C to 125°C
†
ORDERABLE
PART NUMBER
PACKAGE†
TA
TOP-SIDE
MARKING
Tube
SN74BCT2244N
Tube
SN74BCT2244DW
Tape and reel
SN74BCT2244DWR
SOP − NS
Tape and reel
SN74BCT2244NSR
BCT2244
CDIP − J
Tube
SNJ54BCT2244J
SNJ54BCT2244J
CFP − W
Tube
SNJ54BCT2244W
SNJ54BCT2244W
LCCC − FK
Tube
SNJ54BCT2244FK
SNJ54BCT2244FK
SOIC − DW
SN74BCT2244N
BCT2244
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
1
SN54BCT2244, SN74BCT2244
OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS017D − SEPTEMBER 1988 − REVISED MARCH 2003
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
logic diagram (positive logic)
1
1OE
1A1
1A2
1A3
1A4
2OE
2A1
2A2
2A3
2A4
2
2
18
4
16
6
14
8
12
1Y1
1Y2
1Y3
1Y4
19
11
9
13
7
15
5
17
3
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
2Y1
2Y2
2Y3
2Y4
SN54BCT2244, SN74BCT2244
OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS017D − SEPTEMBER 1988 − REVISED MARCH 2003
schematic of Y outputs
VCC
Output
GND
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . . −0.5 V to 5.5 V
Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC
Input clamp current, IIK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30 mA
Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 mA
Package thermal impedance, θJA (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions(see Note 3)
SN54BCT2244
SN74BCT2244
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
UNIT
VCC
Supply voltage
VIH
High-level input voltage
VIL
Low-level input voltage
0.8
0.8
V
IIK
Input clamp current
−18
−18
mA
IOH
High-level output current
−12
−12
mA
IOL
Low-level output current
12
12
mA
TA
Operating free-air temperature
70
°C
2
−55
2
125
0
V
V
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
3
SN54BCT2244, SN74BCT2244
OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS017D − SEPTEMBER 1988 − REVISED MARCH 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54BCT2244
PARAMETER
VIK
†
‡
TEST CONDITIONS
VCC = 4.5 V,
MIN
TYP†
II = −18 mA
SN74BCT2244
MAX
MIN
TYP†
−1.2
IOH = −1 mA
MAX
−1.2
2.4
2.4
2
2
UNIT
V
VOH
VCC = 4
4.5
5V
VOL
VCC = 4
4.5
5V
II
VCC = 5.5 V,
VI = 7 V
0.1
0.1
IIH
VCC = 5.5 V,
VI = 2.7 V
20
20
μA
IIL
VCC = 5.5 V,
VI = 0.5 V
−1
−1
mA
IOZH
VCC = 5.5 V,
VO = 2.7 V
50
50
μA
IOZL
VCC = 5.5 V,
VO = 0.5 V
IOS‡
VCC = 5.5 V,
VO = 0
ICCH
VCC = 5.5 V,
Outputs open
23
37
ICCL
VCC = 5.5 V,
Outputs open
53
77
ICCZ
VCC = 5.5 V,
Outputs open
6.5
10
Ci
VCC = 5 V,
VI = 2.5 V or 0.5 V
6
6
pF
Co
VCC = 5 V,
VO = 2.5 V or 0.5 V
11
11
pF
IOH = −12 mA
V
IOL = 1 mA
0.15
0.5
0.15
0.5
IOL = 12 mA
0.35
0.8
0.35
0.8
−225
mA
−50
μA
−225
mA
23
37
mA
53
77
mA
6.5
10
mA
−50
−100
V
−100
All typical values are at VCC = 5 V, TA = 25°C.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
FROM
(INPUT)
TO
(OUTPUT)
A
Y
OE
Y
OE
Y
VCC = 5 V,
TA = 25°C
MIN
SN54BCT2244
TYP
MAX
MIN
MAX
MIN
MAX
0.5
3
4.4
0.5
5.2
0.5
4.9
1.6
4.6
6.3
1.6
7.1
1.6
6.7
2.4
6.1
7.7
2.4
9.1
2.4
8.7
3.9
7.6
9.4
3.9
10.8
3.9
10.4
1.7
5.2
6.9
1.7
8.1
1.7
7.8
2.8
6.5
8.3
2.8
10.9
2.8
9.8
PARAMETER MEASUREMENT INFORMATION
4
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
SN74BCT2244
UNIT
ns
ns
ns
SN54BCT2244, SN74BCT2244
OCTAL BUFFERS AND LINE/MOS DRIVERS
WITH 3-STATE OUTPUTS
SCBS017D − SEPTEMBER 1988 − REVISED MARCH 2003
7 V (tPZL, tPLZ, O.C.)
S1
Open
(all others)
From Output
Under Test
Test
Point
CL
(see Note A)
R1
From Output
Under Test
R1
Test
Point
CL
(see Note A)
R2
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
RL = R1 = R2
LOAD CIRCUIT FOR
3-STATE AND OPEN-COLLECTOR OUTPUTS
High-Level
Pulse
(see Note B)
3V
Timing Input
(see Note B)
3V
1.5 V
1.5 V
0V
1.5 V
tw
0V
Data Input
(see Note B)
3V
th
tsu
Low-Level
Pulse
3V
1.5 V
1.5 V
0V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
Output
Control
(low-level enable)
3V
Input
(see Note B)
1.5 V
1.5 V
0V
VOH
1.5 V
VOL
0V
VOH
1.5 V
1.5 V
tPLZ
1.5 V
Waveform 1
(see Notes C and D)
3.5 V
VOL
tPLH
tPHL
Out-of-Phase
Output
(see Note D)
1.5 V
1.5 V
tPZL
tPHL
tPLH
In-Phase
Output
(see Note D)
1.5 V
tPHZ
0.3 V
1.5 V
0.3 V
0V
tPZH
Waveform 2
(see Notes C and D)
VOL
VOH
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (see Note D)
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, tr = tf ≤ 2.5 ns, duty cycle = 50%.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
E. When measuring propagation delay times of 3-state outputs, switch S1 is open.
F. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
•
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POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
5
PACKAGE OPTION ADDENDUM
www.ti.com
27-Sep-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
5962-9074101M2A
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
59629074101M2A
SNJ54BCT
2244FK
5962-9074101MRA
ACTIVE
CDIP
J
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9074101MR
A
SNJ54BCT2244J
SN74BCT2244DW
ACTIVE
SOIC
DW
20
25
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
BCT2244
Samples
SN74BCT2244N
ACTIVE
PDIP
N
20
20
RoHS &
Non-Green
NIPDAU
N / A for Pkg Type
0 to 70
SN74BCT2244N
Samples
SNJ54BCT2244FK
ACTIVE
LCCC
FK
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
59629074101M2A
SNJ54BCT
2244FK
SNJ54BCT2244J
ACTIVE
CDIP
J
20
1
Non-RoHS
& Green
SNPB
N / A for Pkg Type
-55 to 125
5962-9074101MR
A
SNJ54BCT2244J
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of