SN74BCT240DBRG4

SN54BCT240, SN74BCT240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS004F – OCTOBER 1987 – REVISED MARCH 2003 D Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ D 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) SN54BCT240 . . . J OR W PACKAGE SN74BCT240 . . . DB, DW, N, OR NS PACKAGE (TOP VIEW) 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 2Y4 1A1 1OE VCC 1 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 1A2 2Y3 1A3 2Y2 1A4 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1Y1 2A4 1Y2 2A3 1Y3 2Y1 GND 2A1 1Y4 2A2 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND SN54BCT240 . . . FK PACKAGE (TOP VIEW) 2OE D D description/ordering information These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the ’BCT241 and ’BCT244 devices, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical OE (active-low output-enable) inputs, and complementary OE and OE inputs. These devices feature high fan-out and improved fan-in. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION PDIP – N 0°C to 70°C –55°C to 125°C ORDERABLE PART NUMBER PACKAGE† TA TOP-SIDE MARKING Tube SN74BCT240N Tube SN74BCT240DW Tape and reel SN74BCT240DWR SOP – NS Tape and reel SN74BCT240NSR BCT240 SSOP – DB Tape and reel SN74BCT240DBR BT240 CDIP – J Tube SNJ54BCT240J SNJ54BCT240J CFP – W Tube SNJ54BCT240W SNJ54BCT240W SOIC – DW SN74BCT240N BCT240 LCCC – FK Tube SNJ54BCT240FK SNJ54BCT240FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54BCT240, SN74BCT240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS004F – OCTOBER 1987 – REVISED MARCH 2003 FUNCTION TABLE (each buffer) INPUTS OUTPUT Y OE A L H L L L H H X Z logic diagram (positive logic) 1 1OE 2 18 4 16 6 14 8 12 1A1 1A2 1A3 1A4 1Y1 1Y2 1Y3 1Y4 19 2OE 11 9 13 7 15 5 17 3 2A1 2A2 2A3 2A4 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2Y1 2Y2 2Y3 2Y4 SN54BCT240, SN74BCT240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS004F – OCTOBER 1987 – REVISED MARCH 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . . –0.5 V to 5.5 V Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC Input clamp current, IIK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA Current into any output in the low state: SN54BCT240 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74BCT240 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) SN54BCT240 SN74BCT240 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IIK Low-level input voltage 0.8 0.8 V Input clamp current –18 –18 mA IOH IOL High-level output current –12 –15 mA Low-level output current 48 64 mA High-level input voltage 2 2 V V TA Operating free-air temperature –55 125 0 70 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54BCT240, SN74BCT240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS004F – OCTOBER 1987 – REVISED MARCH 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH SN54BCT240 TYP† MAX TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V MIN II = –18 mA IOH = –3 mA SN74BCT240 TYP† MAX MIN –1.2 IOH = –12 mA IOH = –15 mA 2.4 3.3 2 3.2 –1.2 2.4 V 3.3 V 2 0.38 UNIT 3.1 VOL VCC = 4 4.5 5V IOL = 48 mA IOL = 64 mA 0.55 II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V 0.1 0.1 mA 20 20 µA IIL IOZH VCC = 5.5 V, VCC = 5.5 V, VI = 0.5 V VO = 2.7 V –1 –1 mA 50 50 µA IOZL IOS‡ VCC = 5.5 V, VCC = 5.5 V, VO = 0.5 V VO = 0 –50 –50 µA –225 mA ICCH ICCL VCC = 5.5 V, VCC = 5.5 V, Outputs open 19 31 19 31 mA Outputs open 46 71 46 71 mA ICCZ Ci VCC = 5.5 V, VCC = 5 V, Outputs open 6 9 6 9 mA VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V 6 0.42 –100 –225 –100 Co VCC = 5 V, 11 † All typical values are at VCC = 5 V. ‡ Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 0.55 V 6 pF 11 pF switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = 25°C VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX§ ’BCT240 tPLH tPHL A Y tPZH tPZL OE Y tPHZ tPLZ OE Y SN54BCT240 SN74BCT240 MIN TYP MAX MIN MAX MIN MAX 0.5 3.3 4.8 0.5 6.4 0.5 5.6 0.4 1.8 3.5 0.4 4.5 0.4 4 1 6.4 7.9 1 9.2 1 8.8 1 7.5 9.4 1 10.8 1 10.5 1 6 6.8 1 8.5 1 8.1 1 6.7 8.1 1 10.6 1 9.5 § For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. 4 POST OFFICE BOX 655303 UNIT • DALLAS, TEXAS 75265 ns ns ns SN54BCT240, SN74BCT240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS004F – OCTOBER 1987 – REVISED MARCH 2003 PARAMETER MEASUREMENT INFORMATION 7 V (tPZL, tPLZ, O.C.) S1 Open (all others) From Output Under Test Test Point CL (see Note A) R1 From Output Under Test R1 Test Point CL (see Note A) R2 LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS RL = R1 = R2 LOAD CIRCUIT FOR 3-STATE AND OPEN-COLLECTOR OUTPUTS High-Level Pulse (see Note B) 3V Timing Input (see Note B) 3V 1.5 V 1.5 V 0V 1.5 V tw 0V Data Input (see Note B) 3V th tsu Low-Level Pulse 3V 1.5 V 1.5 V 0V 1.5 V 1.5 V VOLTAGE WAVEFORMS PULSE DURATION 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 3V Input (see Note B) 1.5 V 1.5 V 0V tPLH In-Phase Output (see Note D) VOH 1.5 V 1.5 V VOL VOH 1.5 V 1.5 V 0V tPLZ 1.5 V Waveform 1 (see Notes C and D) 3.5 V VOL tPHZ tPLH 1.5 V 1.5 V tPZL tPHL tPHL Out-of-Phase Output (see Note D) Output Control (low-level enable) 0.3 V tPZH Waveform 2 (see Notes C and D) VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (see Note D) VOH 1.5 V 0.3 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, tr = tf ≤ 2.5 ns, duty cycle = 50%. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one transition per measurement. E. When measuring propagation delay times of 3-state outputs, switch S1 is open. F. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-9074201M2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629074201M2A SNJ54 BCT240FK 5962-9074201MRA ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9074201MR A SNJ54BCT240J 5962-9074201MSA ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9074201MS A SNJ54BCT240W SN74BCT240DW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 BCT240 Samples SN74BCT240N ACTIVE PDIP N 20 20 RoHS & Non-Green NIPDAU N / A for Pkg Type 0 to 70 SN74BCT240N Samples SN74BCT240NSR ACTIVE SO NS 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 BCT240 Samples SNJ54BCT240FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629074201M2A SNJ54 BCT240FK SNJ54BCT240J ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9074201MR A SNJ54BCT240J SNJ54BCT240W ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9074201MS A SNJ54BCT240W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1 Samples Samples Samples Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2022 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of