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SN74BCT540ANSR

SN74BCT540ANSR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC20_208MIL

  • 描述:

    IC BUFFER INVERT 5.5V 20SO

  • 数据手册
  • 价格&库存
SN74BCT540ANSR 数据手册
SN54BCT540, SN74BCT540A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS012E – JULY 1988 – REVISED MARCH 2003 D D D Operating Voltage Range of 4.5 V to 5.5 V State-of-the-Art BiCMOS Design Significantly Reduces ICCZ 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers P-N-P Inputs Reduce DC Loading D Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs) ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) SN54BCT540 . . . J OR W PACKAGE SN74BCT540A . . . DW, N, OR NS PACKAGE (TOP VIEW) 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 A2 A1 OE1 VCC VCC OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 A3 A4 A5 A6 A7 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 Y1 Y2 Y3 Y4 Y5 A8 GND Y8 Y7 Y6 OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND SN54BCT540 . . . FK PACKAGE (TOP VIEW) OE2 D D description/ordering information The SN54BCT540 and SN74BCT540A octal buffers and line drivers are ideal for driving bus lines or buffer memory-address registers. The devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout. The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all corresponding outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION PDIP – N 0°C to 70°C –55°C to 125°C ORDERABLE PART NUMBER PACKAGE† TA TOP-SIDE MARKING Tube SN74BCT540AN Tube SN74BCT540ADW Tape and reel SN74BCT540ADWR SOP – NS Tape and reel SN74BCT540ANSR BCT540A CDIP – J Tube SNJ54BCT540J SNJ54BCT540J CFP – W Tube SNJ54BCT540W SNJ54BCT540W LCCC – FK Tube SNJ54BCT540FK SOIC – DW SN74BCT540AN BCT540A SNJ54BCT540FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54BCT540, SN74BCT540A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS012E – JULY 1988 – REVISED MARCH 2003 FUNCTION TABLE INPUTS A OUTPUT Y L L H L H L H X X Z X H X Z OE1 OE2 L L logic diagram (positive logic) OE1 OE2 A1 1 19 2 18 Y1 To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . . –0.5 V to 5.5 V Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC Input clamp current, IIK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA Current into any output in the low state: SN54BCT540 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74BCT540A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Package thermal impedance, θJA (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54BCT540, SN74BCT540A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS012E – JULY 1988 – REVISED MARCH 2003 recommended operating conditions (see Note 3) SN54BCT540 SN74BCT540A MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IIK Low-level input voltage 0.8 0.8 V Input clamp current –18 –18 mA IOH IOL High-level output current –12 –15 mA Low-level output current 48 64 mA High-level input voltage 2 2 V V TA Operating free-air temperature –55 125 0 70 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH SN54BCT540 TYP† MAX TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V MIN II = –18 mA IOH = –3 mA SN74BCT540A TYP† MAX MIN –1.2 IOH = –12 mA IOH = –15 mA 2.4 3.3 2 3.2 –1.2 2.4 V 3.3 V 2 0.38 UNIT 3.1 VOL VCC = 4 4.5 5V IOL = 48 mA IOL = 64 mA 0.55 II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V IIL IOS‡ VCC = 5.5 V, VCC = 5.5 V, VI = 0.5 V VO = 0 IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.5 V –50 µA ICCH ICCL VCC = 5.5 V VCC = 5.5 V 20 30 20 30 mA 45 71 45 71 mA ICCZ Ci VCC = 5.5 V VCC = 5 V, 3 6 3 6 mA 0.42 0.1 mA 20 20 µA –225 –100 50 –50 VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V 6 Co VCC = 5 V, 10 † All typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be tested at a time, and the duration of the test should not exceed one second. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V 0.1 –0.6 –100 0.55 –0.6 mA –225 mA 50 µA 5 pF 10 pF 3 SN54BCT540, SN74BCT540A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS012E – JULY 1988 – REVISED MARCH 2003 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = 25°C VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX§ ’BCT540 tPLH tPHL A Y tPZH tPZL OE Y tPHZ tPLZ OE Y SN54BCT540 SN74BCT540A MIN TYP MAX MIN MAX MIN MAX 2.5 4.1 5.8 1.9 7.2 2 6.9 0.6 1.9 3.5 0.3 4.5 0.3 4 4 6.8 8.9 4.1 10.4 3.3 10.1 5 8 10 5.3 11.8 4.3 11.3 3.5 5.7 7.8 2.7 9.4 2.7 9 3.8 5.5 7.4 3.5 8.9 3.5 8.5 § For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. 4 POST OFFICE BOX 655303 UNIT • DALLAS, TEXAS 75265 ns ns ns SN54BCT540, SN74BCT540A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS012E – JULY 1988 – REVISED MARCH 2003 PARAMETER MEASUREMENT INFORMATION 7 V (tPZL, tPLZ, O.C.) S1 Open (all others) From Output Under Test Test Point CL (see Note A) R1 From Output Under Test R1 Test Point CL (see Note A) R2 LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS RL = R1 = R2 LOAD CIRCUIT FOR 3-STATE AND OPEN-COLLECTOR OUTPUTS High-Level Pulse (see Note B) 3V Timing Input (see Note B) 3V 1.5 V 1.5 V 0V 1.5 V tw 0V Data Input (see Note B) 3V th tsu Low-Level Pulse 3V 1.5 V 1.5 V 0V 1.5 V 1.5 V VOLTAGE WAVEFORMS PULSE DURATION 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 3V Input (see Note B) 1.5 V 1.5 V 0V tPLH In-Phase Output (see Note D) VOH 1.5 V 1.5 V VOL VOH 1.5 V 1.5 V 0V tPLZ 1.5 V Waveform 1 (see Notes C and D) 3.5 V VOL tPHZ tPLH 1.5 V 1.5 V tPZL tPHL tPHL Out-of-Phase Output (see Note D) Output Control (low-level enable) 0.3 V tPZH Waveform 2 (see Notes C and D) VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (see Note D) VOH 1.5 V 0.3 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, tr = tf ≤ 2.5 ns, duty cycle = 50%. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one transition per measurement. E. When measuring propagation delay times of 3-state outputs, switch S1 is open. F. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 19-Jan-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) 5962-9074801MRA ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9074801MR A SNJ54BCT540J 5962-9074801MSA ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9074801MS A SNJ54BCT540W SN74BCT540ADW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 BCT540A SN74BCT540AN ACTIVE PDIP N 20 20 RoHS & Non-Green NIPDAU N / A for Pkg Type 0 to 70 SN74BCT540AN SN74BCT540ANSR ACTIVE SO NS 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 BCT540A SNJ54BCT540J ACTIVE CDIP J 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9074801MR A SNJ54BCT540J SNJ54BCT540W ACTIVE CFP W 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9074801MS A SNJ54BCT540W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
SN74BCT540ANSR 价格&库存

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SN74BCT540ANSR
    •  国内价格 香港价格
    • 1+20.092741+2.44216
    • 10+15.0695510+1.83162
    • 50+10.0463750+1.22108
    • 100+8.03871100+0.97706
    • 500+7.53881500+0.91630
    • 1000+7.232421000+0.87906
    • 2000+7.135672000+0.86730
    • 4000+7.087294000+0.86142

    库存:0

    SN74BCT540ANSR
      •  国内价格
      • 1000+22.66000

      库存:0