SN74CB3Q3345
8-BIT FET BUS SWITCH
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
www.ti.com
SCDS144B – OCTOBER 2003 – REVISED MARCH 2005
•
•
(1)
For additional information regarding the performance
characteristics of the CB3Q family, refer to the TI application
report, CBT-C, CB3T, and CB3Q Signal-Switch Families,
literature number SCDA008.
•
•
•
•
DBQ, DGV, OR PW PACKAGE
(TOP VIEW)
OE
A1
A2
A3
A4
A5
A6
A7
A8
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
RGY PACKAGE
(TOP VIEW)
A1
A2
A3
A4
A5
A6
A7
A8
VCC
•
•
1
20
3
4
19 OE
18 B1
17 B2
5
6
16 B9
15 B4
7
8
14 B5
13 B6
2
12 B7
9
10
11
B8
•
•
•
•
Data and Control Inputs Provide Undershoot
Clamp Diodes
Low Power Consumption (ICC = 0.7 mA Typ)
VCC Operating Range From 2.3 V to 3.6 V
Data I/Os Support 0- to 5-V Signaling Levels
(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog
Applications: Differential Signal Interface,
Memory Interleaving, Bus Isolation,
Low-Distortion Signal Gating
OE
•
High-Bandwidth Data Path (up to 500 MHz (1))
5-V-Tolerant I/Os With Device Powered Up or
Powered Down
Low and Flat ON-State Resistance (ron)
Characteristics Over Operating Range
(ron = 4 Ω Typ)
Rail-to-Rail Switching on Data I/O Ports
– 0- to 5-V Switching With 3.3-V VCC
– 0- to 3.3-V Switching With 2.5-V VCC
Bidirectional Data Flow With Near-Zero
Propagation Delay
Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(Cio(OFF) = 4 pF Typ)
Fast Switching Frequency (fOE = 20 MHz Max)
GND
•
FEATURES
•
•
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2005, Texas Instruments Incorporated
SN74CB3Q3345
8-BIT FET BUS SWITCH
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
www.ti.com
SCDS144B – OCTOBER 2003 – REVISED MARCH 2005
DESCRIPTION/ORDERING INFORMATION
The SN74CB3Q3345 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of
the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows
for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device
also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.
Specifically designed to support high-bandwidth applications, the SN74CB3Q3345 provides an optimized
interface solution ideally suited for broadband communications, networking, and data-intensive computing
systems.
The SN74CB3Q3384A is organized as an 8-bit bus switch with two output-enable (OE, OE) inputs. When OE is
high or OE is low, the bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow
between ports. When OE is low and OE is high, the bus switch is OFF, and a high-impedance state exists
between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging
current backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is
determined by the current-sinking/current-sourcing capability of the driver.
ORDERING INFORMATION
PACKAGE (1)
TA
–40°C to 85°C
Tape and reel
SN74CB3Q3345RGYR
BU345
SSOP (QSOP) – DBQ
Tape and reel
SN74CB3Q3345DBQR
CB3Q3345
Tube
SN74CB3Q3345PW
Tape and reel
SN74CB3Q3345PWR
Tape and reel
SN74CB3Q3345DGVR
TSSOP – PW
BU345
BU345
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
OE
OE
INPUT/OUTPUT
A
FUNCTION
H
X
B
A port = B port
X
L
B
A port = B port
L
H
Z
Disconnect
LOGIC DIAGRAM (POSITIVE LOGIC)
2
A1
A8
B1
9
11
SW
1
OE
18
SW
OE
2
TOP-SIDE MARKING
QFN – RGY
TVSOP – DGV
(1)
ORDERABLE PART NUMBER
19
B8
SN74CB3Q3345
8-BIT FET BUS SWITCH
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
www.ti.com
SCDS144B – OCTOBER 2003 – REVISED MARCH 2005
SIMPLIFIED SCHEMATIC, EACH FET SWITCH (SW)
A
B
VCC
Charge
Pump
EN(1)
(1) EN is the internal enable signal applied to the switch.
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
–0.5
4.6
V
VIN
Control input voltage
range (2) (3)
–0.5
7
V
VI/O
Switch I/O voltage range (2) (3) (4)
–0.5
7
II/K
Control input clamp current
VIN < 0
–50
mA
II/OK
I/O port clamp current
VI/O < 0
–50
mA
IIO
ON-state switch current (5)
±64
mA
±100
mA
VCC
Supply voltage range
Continuous current through VCC or GND
package (6)
68
DGV package (6)
92
PW package (6)
83
RGY package (7)
37
DBQ
θJA
Tstg
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Package thermal impedance
Storage temperature range
–65
150
UNIT
V
°C/W
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
VI and VO are used to denote specific conditions for VI/O.
II and IO are used to denote specific conditions for II/O.
The package thermal impedance is calculated in accordance with JESD 51-7.
The package thermal impedance is calculated in accordance with JESD 51-5.
3
SN74CB3Q3345
8-BIT FET BUS SWITCH
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
www.ti.com
SCDS144B – OCTOBER 2003 – REVISED MARCH 2005
Recommended Operating Conditions (1)
VCC
Supply voltage
VIH
High-level control input voltage
VIL
Low-level control input voltage
VI/O
Data input/output voltage
TA
Operating free-air temperature
(1)
MIN
MAX
UNIT
2.3
3.6
VCC = 2.3 V to 2.7 V
1.7
5.5
V
VCC = 2.7 V to 3.6 V
2
5.5
VCC = 2.3 V to 2.7 V
0
0.7
VCC = 2.7 V to 3.6 V
0
0.8
0
5.5
V
–40
85
°C
V
V
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Electrical Characteristics (1)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
TEST CONDITIONS
VCC = 3.6 V,
II = –18 mA
VCC = 3.6 V,
VIN = 0 to 5.5 V
VCC = 3.6 V,
VO = 0 to 5.5 V,
VI = 0,
Switch OFF,
VIN = VCC or GND
Ioff
VCC = 0,
VO = 0 to 5.5 V,
VI = 0
ICC
VCC = 3.6 V,
II/O = 0,
Switch ON or OFF,
VIN = VCC or GND
Other inputs at VCC or GND
IIN
IOZ
Control inputs
(3)
∆ICC (4)
Control inputs
VCC = 3.6 V,
One input at 3 V,
ICCD (5)
Per control
input
VCC = 3.6 V,
A and B ports open,
Cin
Control inputs
VCC = 3.3 V,
VIN = 5.5 V, 3.3 V, or 0
Cio(OFF)
VCC = 3.3 V,
Switch OFF,
VIN = VCC or GND,
Cio(ON)
VCC = 3.3 V,
ron (6)
VCC = 3 V
(1)
(2)
(3)
(4)
(5)
(6)
4
0.7
UNIT
–1.8
V
±1
µA
±1
µA
1
µA
2
mA
30
µA
0.13
0.14
mA/
MHz
2.5
3.5
pF
VI/O = 5.5 V, 3.3 V, or 0
3.5
5
pF
Switch ON,
VIN = VCC or GND,
VI/O = 5.5 V, 3.3 V, or 0
9
11.5
pF
VI = 0,
IO = 30 mA
VI = 1.7 V,
IO = –15 mA
VI = 0,
IO = 30 mA
VI = 2.4 V,
IO = –15 mA
Control input switching at 50% duty cycle
VCC = 2.3 V,
TYP at VCC = 2.5 V
MIN TYP (2) MAX
4
8
4.5
9
4
6
4.5
8
VIN and IIN refer to control inputs. VI, VO, II, and IO refer to data pins.
All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C.
For I/O ports, the parameter IOZ includes the input leakage current.
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
This parameter specifies the dynamic power-supply current associated with the operating frequency of a single control input (see
Figure 2).
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
Ω
SN74CB3Q3345
8-BIT FET BUS SWITCH
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
www.ti.com
SCDS144B – OCTOBER 2003 – REVISED MARCH 2005
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3)
VCC = 3.3 V
± 0.3 V
TO
(OUTPUT)
fOE or fOE (1)
OE or OE
A or B
10
20
MHz
tpd (2)
A or B
B or A
0.12
0.2
ns
ten
OE or OE
A or B
1.5
7.7
1.5
6.5
ns
tdis
OE or OE
A or B
1
6.9
1
6.8
ns
MIN
MAX
MIN
UNIT
MAX
Maximum switching frequency for control input (VO > VCC, VI = 5 V, RL ≥ 1 MΩ, CL = 0)
The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load
capacitance, when driven by an ideal voltage source (zero output impedance).
TYPICAL ron
vs
VI
ron - ON-State Resistance -
16
VCC = 3.3 V
TA = 25°C
IO = -15 mA
14
12
10
8
6
4
2
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
VI - V
Figure 1. Typical ron vs VI
TYPICAL ICC
vs
OE or OE SWITCHING FREQUENCY
12
VCC = 3.3 V
TA = 25 °C
A and B Ports Open
10
8
ICC − mA
(1)
(2)
VCC = 2.5 V
± 0.2 V
FROM
(INPUT)
PARAMETER
6
4
One OE or OE Switching
2
0
0
2
4
6
8
10
12
14
16
18
20
OE or OE Switching Frequency − MHz
Figure 2. Typical ICC vs OE or OE Switching Frequency
5
SN74CB3Q3345
8-BIT FET BUS SWITCH
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
www.ti.com
SCDS144B – OCTOBER 2003 – REVISED MARCH 2005
PARAMETER MEASUREMENT INFORMATION
VCC
Input Generator
VIN
50 Ω
50 Ω
VG1
TEST CIRCUIT
DUT
2 × VCC
Input Generator
S1
RL
VO
VI
50 Ω
50 Ω
VG2
CL
(see Note A)
RL
TEST
VCC
S1
RL
VI
CL
tpd(s)
2.5 V ± 0.2 V
3.3 V ± 0.3 V
Open
Open
500 Ω
500 Ω
VCC or GND
VCC or GND
30 pF
50 pF
tPLZ/tPZL
2.5 V ± 0.2 V
3.3 V ± 0.3 V
2 × VCC
2 × VCC
500 Ω
500 Ω
GND
GND
30 pF
50 pF
0.15 V
0.3 V
tPHZ/tPZH
2.5 V ± 0.2 V
3.3 V ± 0.3 V
GND
GND
500 Ω
500 Ω
VCC
VCC
30 pF
50 pF
0.15 V
0.3 V
V∆
VCC
Output
Control
(VIN)
VCC/2
VCC
VCC/2
VCC/2
0V
tPLH
VOH
Output
VCC/2
VCC/2
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (tpd(s))
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
tPLZ
VCC
VCC/2
VOL + V∆
VOL
tPZH
tPHL
VCC/2
0V
tPZL
Output
Control
(VIN)
Open
GND
Output
Waveform 2
S1 at GND
(see Note B)
tPHZ
VOH
VCC/2
VOH − V∆
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd(s). The tpd propagation delay is the calculated RC time constant of the typical ON-state resistance
of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
H. All parameters and waveforms are not applicable to all devices.
Figure 3. Test Circuit and Voltage Waveforms
6
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN74CB3Q3345DBQR
ACTIVE
SSOP
DBQ
20
2500
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
CB3Q3345
SN74CB3Q3345DGVR
ACTIVE
TVSOP
DGV
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
BU345
SN74CB3Q3345PW
ACTIVE
TSSOP
PW
20
70
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
BU345
SN74CB3Q3345PWR
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
BU345
SN74CB3Q3345RGYR
ACTIVE
VQFN
RGY
20
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BU345
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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