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SN74CBT16214
SCDS008M – MAY 1993 – REVISED JUNE 2015
SN74CBT16214 12-Bit 1-of-3 FET Multiplexer/Demultiplexer
1 Features
3 Description
•
The SN74CBT16214 provides 12 bits of high-speed
TTL-compatible bus switching between three
separate ports. The low ON-state resistance of the
switch allows connections to be made with minimal
propagation delay.
1
•
•
Member of the Texas Instruments Widebus™
Family
5-Ω Switch Connection Between Two Ports
TTL-Compatible Input Levels
The device operates as a 12-bit bus-select switch via
the data-select (S0–S2) terminals.
2 Applications
•
•
•
•
•
•
Analog and Digital Multiplexing and
Demultiplexing
A/D and D/A Conversion
Factory Automation
Consumer Audio
Programmable Logic Circuits
Sensors
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN74CBT16214DGG
TSSOP (56)
8.10 mm × 14.00 mm
SN74CBT16214DL
SSOP (56)
10.35 mm x 18.42 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram (Positive Logic)
1A
12A
S0
1
S1
56
S2
55
2
27
54
1B1
53
1B2
3
1B3
30
12B1
29
12B2
28
12B3
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN74CBT16214
SCDS008M – MAY 1993 – REVISED JUNE 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
5
6.1
6.2
6.3
6.4
6.5
6.6
6.7
5
5
5
6
6
6
7
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
Parameter Measurement Information .................. 8
Detailed Description .............................................. 9
8.1 Overview ................................................................... 9
8.2 Functional Block Diagram ......................................... 9
8.3 Feature Description................................................... 9
8.4 Device Functional Modes.......................................... 9
9
Application and Implementation ........................ 10
9.1 Application Information............................................ 10
9.2 Typical Application ................................................. 10
10 Power Supply Recommendations ..................... 11
11 Layout................................................................... 11
11.1 Layout Guidelines ................................................. 11
11.2 Layout Example .................................................... 12
12 Device and Documentation Support ................. 13
12.1
12.2
12.3
12.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
13
13
13
13
13 Mechanical, Packaging, and Orderable
Information ........................................................... 13
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision L (November 2001) to Revision M
•
2
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................ 1
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5 Pin Configuration and Functions
DGG or DL Package
56-Pin TSSOP or SSOP
Top View
S0
1
56 S1
1A
2
55 S2
1B3
3
54 1B1
2A
4
53 1B2
2B3
5
52 2B1
3A
6
51 2B2
3B3
7
50 3B1
GND
8
49 GND
4A
9
48 3B2
4B3 10
47 4B1
5A 11
46 4B2
5B3 12
45 5B1
6A 13
44 5B2
6B3 14
43 6B1
7A 15
42 6B2
7B3 16
41 7B1
VCC 17
40 7B2
8A 18
39 8B1
GND 19
38 GND
8B3 20
37 8B2
9A 21
36 9B1
9B3 22
35 9B2
10A 23
34 10B1
10B3 24
33 10B2
11A 25
32 11B1
11B3 26
31 11B2
12A 27
30 12B1
12B3 28
29 12B2
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SCDS008M – MAY 1993 – REVISED JUNE 2015
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Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
S0
1
I
1A
2
I/O
Channel 1 A
1B3
3
I/O
Channel 1 B3
2A
4
I/O
Channel 2 A
2B3
5
I/O
Channel 2 B3
3A
6
I/O
Channel 3 A
3B3
7
I/O
Channel 3 B3
GND
8
—
Ground
4A
9
I/O
Channel 4 A
4B3
10
I/O
Channel 4 B3
5A
11
I/O
Channel 5 A
5B3
12
I/O
Channel 5 B3
6A
13
I/O
Channel 6 A
6B3
14
I/O
Channel 6 B3
7A
15
I/O
Channel 7 A
7B3
16
I/O
Channel 7 B3
VCC
17
—
Power supply
8A
18
I/O
Channel 8 A
GND
19
—
Ground
8B3
20
I/O
Channel 8 B3
9A
21
I/O
Channel 9 A
9B3
22
I/O
Channel 9 B3
10A
23
I/O
Channel 10 A
10B3
24
I/O
Channel 10 B3
11A
25
I/O
Channel 11 A
11B3
26
I/O
Channel 11 B3
12A
27
I/O
Channel 12 A
12B3
28
I/O
Channel 12 B3
12B2
29
I/O
Channel 12 B2
12B1
30
I/O
Channel 12 B1
11B2
31
I/O
Channel 11 B2
11B1
32
I/O
Channel 11 B1
10B2
33
I/O
Channel 10 B2
10B1
34
I/O
Channel 10 B1
9B2
35
I/O
Channel 9 B2
9B1
36
I/O
Channel 9 B1
8B2
37
I/O
Channel 8 B2
GND
38
—
Ground
8B1
39
I/O
Channel 8 B1
7B2
40
I/O
Channel 7 B2
7B1
41
I/O
Channel 7 B1
6B2
42
I/O
Channel 6 B2
6B1
43
I/O
Channel 6 B1
5B2
44
I/O
Channel 5 B2
5B1
45
I/O
Channel 5 B1
4B2
46
I/O
Channel 4 B2
4
Select 0
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Pin Functions (continued)
PIN
NAME
I/O
NO.
DESCRIPTION
4B1
47
I/O
Channel 4 B1
3B2
48
I/O
Channel 3 B2
GND
49
I/O
Ground
3B1
50
I/O
Channel 3 B1
2B2
51
I/O
Channel 2 B2
2B1
52
I/O
Channel 2 B1
1B2
53
I/O
Channel 1 B2
1B1
54
I/O
Channel 1 B1
S2
55
I
Select 2
S1
56
I
Select 1
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VCC
VI
MIN
MAX
UNIT
Supply voltage
–0.5
7
V
(2)
–0.5
7
V
Continuous channel current
128
mA
IIK
Input clamp current, (VI < 0)
50
mA
Tstg
Storage temperature
150
°C
(1)
(2)
Input voltage
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
UNIT
±1000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
V
±1500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
VCC
Supply voltage
4
5.5
VIH
High-level control input voltage
2
VIL
Low-level control input voltage
TA
Operating free-air temperature
(1)
–40
UNIT
V
V
0.8
V
85
°C
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application
report, Implications of Slow or Floating CMOS Inputs, SCBA004.
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6.4 Thermal Information
SN74CBT16214
THERMAL METRIC (1)
RθJA
(1)
DGG (TSSOP)
DL (SSOP)
56 PINS
56 PINS
64
56
Junction-to-ambient thermal resistance
UNIT
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
TEST CONDITIONS
MIN
TYP (1)
MAX
UNIT
–1.2
V
VCC = 4.5 V,
II = –18 mA
VCC = 0,
VI = 5.5 V
10
VCC = 5.5 V,
VI = 5.5 V or GND
±1
ICC
VCC = 5.5 V,
IO = 0,
VI = VCC or GND
∆ICC (2)
VCC = 5.5 V,
One input at 3.4 V,
Other inputs at VCC or GND
II
Ci
Control
inputs
Cio(OFF)
VI = 3 V or 0
µA
mA
4
pF
pF
S0, S1, and S2 = GND
7.5
VCC = 4 V,
TYP at VCC = 4 V
VI = 2.4 V,
II = 15 mA
14
20
II = 64 mA
4
7
II = 30 mA
4
7
II = 15 mA
6
12
VCC = 4.5 V
VI = 0
VI = 2.4 V,
(1)
(2)
(3)
3
2.5
VO = 3 V or 0,
ron (3)
µA
Ω
Ω
All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
6.6 Switching Characteristics
over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 2)
PARAMETER
tpd (1)
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4 V
MIN
VCC = 5 V ± 0.5 V
MAX
MIN
MAX
UNIT
A or B
B or A
0.35
0.25
ns
tpd
S
B or A
15.3
5.5
13.9
ns
ten
S
A or B
16
5.1
14.5
ns
tdis
S
A or B
12.1
3.6
11.7
ns
(1)
6
The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load
capacitance, when driven by an ideal voltage source (zero output impedance).
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6.7 Typical Characteristics
over operating free-air temperature range (unless otherwise noted)
30
25
ron
20
15
85°C
25°C
10
−40°C
5
0
0
0.5
1
1.5
2
2.5
3
3.5
4
VI
Figure 1. rON vs. VI, VCC = 5 V
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7 Parameter Measurement Information
7V
S1
500 Ω
From Output
Under Test
Open
GND
CL = 50 pF
(see Note A)
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
500 Ω
3V
Output
Control
LOAD CIRCUIT
1.5 V
1.5 V
0V
tPZL
3V
Input
1.5 V
1.5 V
0V
tPLH
1.5 V
3.5 V
1.5 V
1.5 V
VOL
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOL + 0.3 V
VOL
tPZH
tPHL
VOH
Output
Output
Waveform 1
S1 at 7 V
(see Note B)
tPLZ
tPHZ
VOH
1.5 V
VOH − 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. t PZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 2. Load Circuit and Voltage Waveforms
8
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8 Detailed Description
8.1 Overview
The SN74CBT16214 provides 12 bits of high-speed TTL-compatible bus switching between three separate ports.
The low ON-state resistance of the switch allows connections to be made with minimal propagation delay.
The device operates as a 12-bit bus-select switch via the data-select (S0–S2) terminals.
8.2 Functional Block Diagram
1A
12A
S0
1
S1
56
S2
55
2
27
54
1B1
53
1B2
3
1B3
30
12B1
29
12B2
28
12B3
8.3 Feature Description
The typical RON for each port is 5 Ω, reducing the amount of signal attenuation through the switch from higher
impedance switches. Inputs operate with TTL-compatible voltages.
8.4 Device Functional Modes
Table 1 lists the functional modes for SN74CBT16214.
Table 1. Function Table
INPUTS
S2 S1 S0
INPUT/OUTPUT
A
FUNCTION
L
L
L
Z
Disconnect
L
L
H
B1
A port = B1 port
L
H
L
B2
A port = B2 port
Disconnect
L
H
H
Z
H
L
L
Z
Disconnect
H
L
H
B3
A port = B3 port
H
H
L
B1
A port = B1 port
H
H
H
B2
A port = B2 port
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SN74CBT16214 is typically used to expand a single 12-bit bus to three separate 12-bit busses. Fewer bits
can be used as well if the unused inputs are tied to either ground or VCC.
9.2 Typical Application
S0
Bus
Controller
S1
S2
1
54
56
52
55
50
47
12
45
1A
2A
3A
4A
5A
6A
7A
8A
9A
10A
11A
12A
2
43
4
41
6
39
9
36
11
34
13
32
15
30
18
21
23
25
27
53
51
48
46
44
42
40
37
35
33
31
29
3
5
7
10
12
VCC
14
VCC
17
0.1 PF
16
20
GND
8
22
19
24
38
26
49
28
GND
GND
GND
1B1
2B1
3B1
4B1
5B1
6B1
12
7B1
Device 1
8B1
9B1
10B1
11B1
12B1
1B2
2B2
3B2
4B2
5B2
6B2
12
7B2
Device 2
8B2
9B2
10B2
11B2
12B2
1B3
2B3
3B3
4B3
5B3
6B3
7B3
12
Device 3
8B3
9B3
10B3
11B3
12B3
Figure 3. Typical Application Simplified Schematic
9.2.1 Design Requirements
The 0.1-uF capacitor should be placed as close as possible to the VCC pin of the device.
10
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Typical Application (continued)
9.2.2 Detailed Design Procedure
1. Recommended Input Conditions
– For switch time specifications, see propagation delay times in Switching Characteristics.
– Inputs should remain between 0.5 V and 7 V, regardless of VCC.
– For input voltage level specifications for control inputs, see VIH and VIL in Recommended Operating
Conditions.
2. Input/output current consideration: The SN74CBT16214 does not have internal current drive circuitry and
thus cannot sink or source current. Any current will be passed through the device.
9.2.3 Application Curve
4.5
−40°C
4
25°C
3.5
85°C
3
VO
2.5
2
1.5
1
0.5
0
0
1
2
3
4
5
VI
Figure 4. VO vs VI, VCC = 5 V
10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in the
Electrical Characteristics.
Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a singlesupply, a 0.1-μF bypass capacitor is recommended. If there are multiple pins labeled VCC, then a 0.01-μF or
0.022-μF capacitor is recommended for each VCC because the VCC pins will be tied together internally. For
devices with dual-supply pins operating at different voltages, for example VCC and VDD, a 0.1-µF bypass
capacitor is recommended for each supply pin. It is acceptable to parallel multiple bypass capacitors to reject
different frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor
should be installed as close to the power terminal as possible for best results.
11 Layout
11.1 Layout Guidelines
Reflections and matching are closely related to loop antenna theory, but different enough to warrant their own
discussion. When a PCB trace turns a corner at a 90° angle, a reflection can occur. This is primarily due to the
change of width of the trace. At the apex of the turn, the trace width is increased to 1.414 times its width. This
upsets the transmission line characteristics, especially the distributed capacitance and self–inductance of the
trace — resulting in the reflection. It is a given that not all PCB traces can be straight, and so they will have to
turn corners. Figure 5 shows progressively better techniques of rounding corners. Only the last example
maintains constant trace width and minimizes reflections.
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11.2 Layout Example
BETTER
BEST
2W
WORST
1W min.
W
Figure 5. Trace Example
12
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12 Device and Documentation Support
12.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.2 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
13-Jul-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN74CBT16214DGGR
ACTIVE
TSSOP
DGG
56
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBT16214
Samples
SN74CBT16214DL
ACTIVE
SSOP
DL
56
20
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBT16214
Samples
SN74CBT16214DLR
ACTIVE
SSOP
DL
56
1000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBT16214
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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