SCDS027I − MAY 1995 − REVISED JANUARY 2004
D Standard ’245-Type Pinout
D 5-Ω Switch Connection Between Two Ports
D TTL-Compatible Input Levels
DB, DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
OE
A1
A2
A3
A4
A5
A6
A7
A8
GND
description/ordering information
The SN74CBT3345 provides eight bits of
high-speed TTL-compatible bus switching in a
standard ’245 device pinout. The low on-state
resistance of the switch allows connections to be
made with minimal propagation delay.
The device is organized as one 8-bit switch bank
with dual output-enable (OE and OE) inputs.
When OE is low or OE is high, the switch is on, and
port A is connected to port B. When OE is high and
OE is low, the switch is open, and the
high-impedance state exists between the two
ports.
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
ORDERING INFORMATION
TOP-SIDE
MARKING
Tube
SN74CBT3345DW
Tape and reel
SN74CBT3345DWR
SSOP − DB
Tape and reel
SN74CBT3345DBR
CU345
SSOP (QSOP) − DBQ
Tape and reel
SN74CBT3345DBQR
CBT3345
Tube
SN74CBT3345PW
Tape and reel
SN74CBT3345PWR
SOIC − DW
−40°C
−40
C to 85
85°C
C
ORDERABLE
PART NUMBER
PACKAGE†
TA
TSSOP − PW
CBT3345
CU345
TVSOP − DGV
Tape and reel
SN74CBT3345DGVR
CU345
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
FUNCTION
OE
OE
H
X
A port = B port
X
L
A port = B port
L
H
Disconnect
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2004, Texas Instruments Incorporated
!"# $"%&! '#(
'"! ! $#!! $# )# # #* "#
'' +,( '"! $!#- '# #!#&, !&"'#
#- && $##(
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1
SCDS027I − MAY 1995 − REVISED JANUARY 2004
logic diagram (positive logic)
2
18
A1
A8
B1
9
11
B8
1
OE
19
OE
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C
DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68°C
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
VCC
VIH
Supply voltage
VIL
TA
Low-level control input voltage
High-level control input voltage
MIN
MAX
4.5
5.5
2
Operating free-air temperature
−40
UNIT
V
V
0.8
V
85
°C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
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SCDS027I − MAY 1995 − REVISED JANUARY 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
II
TEST CONDITIONS
VCC = 4.5 V,
VCC = 5.5 V,
II = −18 mA
VI = 5.5 V or GND
VCC = 5.5 V,
VCC = 5.5 V,
IO = 0,
One input at 3.4 V,
Cio(OFF)
VI = 3 V or 0
VO = 3 V or 0,
OE = VCC or OE = GND
ron§
VCC = 4.5 V
All inputs
ICC
∆ICC‡
Control inputs
Ci
Control inputs
MIN
TYP†
VI = VCC or GND
Other inputs at VCC or GND
MAX
UNIT
−1.2
V
±1
µA
50
µA
3.5
mA
3
pF
6
pF
II = 64 mA
II = 30 mA
5
VI = 0
5
7
7
VI = 2.4 V,
II = 15 mA
10
15
Ω
† All typical values are at VCC = 5 V, TA = 25°C.
‡ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
§ Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lower of the voltages of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
tpd¶
ten
FROM
(INPUT)
TO
(OUTPUT)
A or B
B or A
OE or OE
A or B
VCC = 5 V
± 0.5 V
MIN
1
UNIT
MAX
0.25
ns
9.1
ns
tdis
A or B
1
8.7
ns
OE or OE
¶ The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
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3
SCDS027I − MAY 1995 − REVISED JANUARY 2004
PARAMETER MEASUREMENT INFORMATION
7V
500 Ω
From Output
Under Test
S1
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
3V
Output
Control
LOAD CIRCUIT
1.5 V
1.5 V
0V
tPZL
3V
Input
1.5 V
1.5 V
0V
tPLH
1.5 V
3.5 V
1.5 V
tPZH
tPHL
VOH
Output
Output
Waveform 1
S1 at 7 V
(see Note B)
tPLZ
1.5 V
VOL
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH
VOH − 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
4
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN74CBT3345DGVR
ACTIVE
TVSOP
DGV
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CU345
SN74CBT3345DW
ACTIVE
SOIC
DW
20
25
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBT3345
SN74CBT3345DWR
ACTIVE
SOIC
DW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBT3345
SN74CBT3345PW
ACTIVE
TSSOP
PW
20
70
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CU345
SN74CBT3345PWR
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CU345
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of