SN74F174ANSRG4

SN74F174A HEX D-TYPE FLIP-FLOP WITH CLEAR SDFS029B – D2932, MARCH 1987 – REVISED OCTOBER 1993 • • • • • D OR N PACKAGE (TOP VIEW) Contains Six Flip-Flops With Single-Rail Outputs Buffered Clock and Direct Clear Inputs Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators Fully Buffered Outputs for Maximum Isolation From External Disturbances Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs CLR 1Q 1D 2D 2Q 3D 3Q GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 6Q 6D 5D 5Q 4D 4Q CLK description This monolithic, positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with a direct clear (CLR) input. Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output. The SN74F174A is characterized for operation from 0°C to 70°C. FUNCTION TABLE (each flip-flop) INPUTS CLR CLK D OUTPUT Q H L X Q0 H ↑ H H H ↑ L L L X X L logic symbol† CLR CLK 1D 2D 3D 4D 5D 6D 1 R 9 C1 3 2 1D 4 5 6 7 11 10 13 12 14 15 1Q 2Q 3Q 4Q 5Q 6Q † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Copyright  1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–1 SN74F174A HEX D-TYPE FLIP-FLOP WITH CLEAR SDFS029B – D2932, MARCH 1987 – REVISED OCTOBER 1993 logic diagram (positive logic) CLK CLR 1D 9 1 3 1D C1 R 2 1Q Four Identical Channels Not Shown 6D 14 1D C1 R 15 6Q absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 1.2 V to 7 V Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mA to 5 mA Voltage applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input-voltage ratings may be exceeded provided the input-current ratings are observed. recommended operating conditions VCC VIH Supply voltage VIL IIK Low-level input voltage IOH IOL TA Operating free-air temperature 2–2 High-level input voltage MIN NOM MAX 4.5 5 5.5 2 UNIT V V 0.8 V – 18 mA High-level output current –1 mA Low-level output current 20 mA 70 °C Input clamp current 0 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74F174A HEX D-TYPE FLIP-FLOP WITH CLEAR SDFS029B – D2932, MARCH 1987 – REVISED OCTOBER 1993 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK VOH VOL II IIH IIL IOS‡ ICCH MIN VCC = 4.5 V, VCC = 4.5 V, II = – 18 mA IOH = – 1 mA VCC = 4.75 V, VCC = 4.5 V, IOH = – 1 mA IOL = 20 mA VCC = 5.5 V, VCC = 5.5 V, TYP† 2.5 MAX UNIT – 1.2 V 3.4 V 2.7 0.3 0.5 V VI = 7 V VI = 2.7 V 0.1 mA 20 µA VCC = 5.5 V, VCC = 5.5 V, VI = 0.5 V VO = 0 – 0.6 mA – 150 mA VCC = 5.5 V, VCC = 5.5 V, See Note 2 45 mA – 60 30 ICCL See Note 3 39 55 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. NOTES: 2. ICCH is measured with all outputs open, all data inputs and enable input at 4.5 V, and the clock input at 4.5 V after being momentarily grounded. 3. ICCL is measured with all outputs open, all data inputs and enable input at 0 V, and the clock input at 4.5 V after being momentarily grounded. timing requirements VCC = 5 V, TA = 25°C fclock tw tsu Clock frequency Pulse duration MIN MAX MIN MAX 0 100 0 80 CLK high 4 4 CLK low 6 6 CLR low 5 5 4.5 4.5 5 5 Data high or low Setup time before CLK↑ VCC = 4.5 V to 5.5 V, TA = MIN to MAX§ CLR high¶ UNIT MHz ns ns th Hold time after CLK↑ Data high or low 0.5 1 § For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ¶ Inactive-state setup time is also referred to as recovery time. ns switching characteristics (see Note 4) PARAMETER fmax tPLH tPHL FROM (INPUT) CLK TO (OUTPUT) Any Q tPHL CLR Any Q NOTE 4: Load circuits and waveforms are shown in Section 1. POST OFFICE BOX 655303 VCC = 5 V, CL = 50 pF, RL = 500 Ω, TA = 25°C MIN TYP 100 140 2.7 VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX§ MAX MIN 4.5 8 2.7 9 3.4 4.2 10 3.3 11 4.2 6.3 14 4.2 15 • DALLAS, TEXAS 75265 UNIT MAX 80 MHz ns ns 2–3 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74F174AD ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F174A SN74F174ADR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F174A SN74F174ADRE4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F174A SN74F174AN ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN74F174AN (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of