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SN74F32NSR

SN74F32NSR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOP-14

  • 描述:

    IC GATE OR 4CH 2-INP 14SOP

  • 数据手册
  • 价格&库存
SN74F32NSR 数据手册
SN54F32, SN74F32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SDFS044B – MARCH 1987 – REVISED MAY 1999 D SN54F32 . . . J PACKAGE SN74F32 . . . D OR N PACKAGE (TOP VIEW) Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) DIPs 1A 1B 1Y 2A 2B 2Y GND description These devices contain four independent 2-input OR gates. They perform the Boolean functions Y = A + B or Y = A • B in positive logic. The SN54F32 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74F32 is characterized for operation from 0°C to 70°C. 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1A NC VCC 4B SN54F32 . . . FK PACKAGE (TOP VIEW) FUNCTION TABLE (each gate) INPUTS 1 B H X H X H H L L L 1Y NC 2A NC 2B 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4A NC 4Y NC 3B 2Y GND NC 3Y 3A A OUTPUT Y NC – No internal connection logic symbol† 1A 1B 2A 2B 3A 3B 4A 4B 1 ≥1 2 4 3 6 5 1Y 2Y 9 8 10 3Y 12 11 13 4Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. logic diagram, each gate (positive logic) A Y B Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  1999, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54F32, SN74F32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SDFS044B – MARCH 1987 – REVISED MAY 1999 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1.2 V to 7 V Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA to 5 mA Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input voltage ratings may be exceeded provided the input current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero. recommended operating conditions (see Note 3) SN54F32 SN74F32 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IIK Low-level input voltage 0.8 0.8 V Input clamp current –18 –18 mA IOH IOL High-level output current –1 –1 mA Low-level output current 20 20 mA High-level input voltage 2 2 V V TA Operating free-air temperature –55 125 0 70 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VOL II IIH IIL TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, II = –18 mA IOH = –1 mA VCC = 4.75 V, VCC = 4.5 V, IOH = –1 mA IOL = 20 mA VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V VCC = 5.5 V, VCC = 5.5 V, VI = 0.5 V VO = 0 MIN SN54F32 TYP‡ MAX MIN SN74F32 TYP‡ MAX –1.2 2.5 3.4 –1.2 2.5 3.4 0.5 0.3 V V 2.7 0.3 UNIT 0.5 V 0.1 0.1 mA 20 20 µA –0.6 mA –150 mA 6.1 9.2 mA ICCL VI = 0 10.3 15.5 10.3 ‡ All typical values are at VCC = 5 V, TA = 25°C. § Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. ¶ ICCH is measured with one input per gate at 4.5 V and all others grounded. 15.5 mA IOS§ ICCH¶ 2 –0.6 –60 VCC = 5.5 V VCC = 5.5 V, –150 6.1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9.2 –60 SN54F32, SN74F32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SDFS044B – MARCH 1987 – REVISED MAY 1999 switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL FROM (INPUT) TO (OUTPUT) A or B Y POST OFFICE BOX 655303 VCC = 5 V, TA = 25°C SN54F32 SN74F32 MIN TYP MAX MIN MAX MIN MAX 2.2 3.8 5.6 2.2 7.5 2.2 6.6 2.2 3.6 5.3 1.7 7.5 2.2 6.3 • DALLAS, TEXAS 75265 UNIT ns 3 SN54F32, SN74F32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SDFS044B – MARCH 1987 – REVISED MAY 1999 PARAMETER MEASUREMENT INFORMATION From Output Under Test CL (see Note A) Test Point From Output Under Test CL (see Note A) 500 Ω 7V Open 500 Ω S1 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Collector Open 7V Open 7V LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw 3V 1.5 V Input 1.5 V th tsu 3V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION 3V 1.5 V Input 1.5 V 0V tPLH In-Phase Output tPHL 1.5 V 1.5 V VOL tPHL Out-of-Phase Output VOH Output Waveform 1 S1 at 7 V (see Note B) 1.5 V VOH 1.5 V VOL 1.5 V 0V tPZL tPLZ ≈ 3.5 V 1.5 V tPZH tPLH 1.5 V 3V Output Control Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOL + 0.3 V VOL tPHZ 1.5 V VOH – 0.3 V VOH ≈0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns, duty cycle = 50%. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 28-Nov-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-9758801Q2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629758801Q2A SNJ54F 32FK 5962-9758801QCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9758801QC A SNJ54F32J 5962-9758801QDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9758801QD A SNJ54F32W SN54F32J ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN54F32J Samples SN74F32D ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F32 Samples SN74F32DG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F32 Samples SN74F32DR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F32 Samples SN74F32DRE4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F32 Samples SN74F32DRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F32 Samples SN74F32N ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN74F32N Samples SN74F32NE4 ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN74F32N Samples SN74F32NSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 74F32 Samples SNJ54F32FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629758801Q2A SNJ54F 32FK SNJ54F32J ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9758801QC A SNJ54F32J SNJ54F32W ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9758801QD A Addendum-Page 1 Samples Samples Samples Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 28-Nov-2022 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) (3) Device Marking (4/5) (6) SNJ54F32W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
SN74F32NSR 价格&库存

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SN74F32NSR
    •  国内价格 香港价格
    • 1+7.529211+0.77300
    • 10+4.4318110+0.45500
    • 50+2.2110450+0.22700
    • 100+1.11039100+0.11400
    • 500+1.02273500+0.10500
    • 1000+0.886371000+0.09100
    • 2000+0.818182000+0.08400
    • 4000+0.750004000+0.07700

    库存:0

    SN74F32NSR
      •  国内价格 香港价格
      • 1+1.336621+0.16200
      • 10+0.8168310+0.09900

      库存:0

      SN74F32NSR
        •  国内价格 香港价格
        • 1+1.336621+0.16200
        • 10+0.8168310+0.09900

        库存:0

        SN74F32NSR
          •  国内价格 香港价格
          • 1+1.336621+0.16200
          • 10+0.8168310+0.09900

          库存:0