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SN74F74D

SN74F74D

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC14_150MIL

  • 描述:

    IC FF D-TYPE DUAL 1BIT 14SOIC

  • 数据手册
  • 价格&库存
SN74F74D 数据手册
SN54F74, SN74F74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SDFS046A – MARCH 1987 – REVISED OCTOBER 1993 • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs SN54F74 . . . J PACKAGE SN74F74 . . . D OR N PACKAGE (TOP VIEW) 1CLR 1D 1CLK 1PRE 1Q 1Q GND description 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q SN54F74 . . . FK PACKAGE (TOP VIEW) 1CLK NC 1PRE NC 1Q FUNCTION TABLE INPUTS 13 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2D NC 2CLK NC 2PRE 1Q GND NC 2Q 2Q The SN54F74 is characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74F74 is characterized for operation from 0°C to 70°C. 14 2 1D 1CLR NC VCC 2CLR These devices contain two independent positiveedge-triggered D-type flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input may be changed without affecting the levels at the outputs. 1 OUTPUTS PRE CLR CLK D Q L H X X H L H L X X H H† L NC – No internal connection Q L L X X L H† H H ↑ H H H H ↑ L L H H H L X Q0 Q0 † The output levels are not guaranteed to meet the minimum levels for VOH. Furthermore, this configuration is nonstable; that is, it will not persist when PRE or CLR returns to its inactive (high) level. Copyright  1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–1 SN54F74, SN74F74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SDFS046A – MARCH 1987 – REVISED OCTOBER 1993 logic symbol† 4 1PRE 1CLK 1D 1 1CLR 6 9 11 2CLK 1Q R 10 2PRE 1Q C1 2 1D 5 S 3 2Q 12 2D 8 13 2CLR 2Q † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. logic diagram, each flip-flop (positive logic) PRE CLK C C C Q TG C C C C D TG TG TG C C C Q CLR absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 1.2 V to 7 V Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mA to 5 mA Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA Operating free-air temperature range: SN54F74 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74F74 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed. 2–2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54F74, SN74F74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SDFS046A – MARCH 1987 – REVISED OCTOBER 1993 recommended operating conditions SN54F74 VCC VIH Supply voltage VIL IIK Low-level input voltage IOH IOL High-level output current TA Operating free-air temperature High-level input voltage SN74F74 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 2 2 Input clamp current Low-level output current V V 0.8 0.8 V – 18 – 18 mA –1 –1 mA 20 mA 70 °C 20 – 55 UNIT 125 0 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VOL II IIH IIL Data, CLK PRE or CLR TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, II = – 18 mA IOH = – 1 mA VCC = 4.75 V, VCC = 4.5 V, IOH = – 1 mA IOL = 20 mA VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V VCC = 5 5.5 5V V, MIN SN54F74 TYP† MAX MIN SN74F74 TYP† MAX – 1.2 2.5 3.4 – 1.2 2.5 3.4 0.5 0.3 0.1 VI = 0 0.5 5V 0.5 V 0.1 mA µA 20 20 – 0.6 – 0.6 – 1.8 – 1.8 IOS‡ VCC = 5.5 V, VO = 0 – 60 –150 – 60 ICC VCC = 5.5 V, See Note 2 10.5 16 10.5 † All typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. NOTE 2: ICC is measured with D, CLK, and PRE grounded then with D, CLK, and CLR grounded. V V 2.7 0.3 UNIT mA –150 mA 16 mA timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) VCC = 5 V, TA = 25°C SN54F74 SN74F74 ′F74 fclock Clock frequency tw Pulse duration tsu Setup time, time data before CLK↑ Setup time, inactive-state before CLK↑§ th Hold time time, data after CLK↑ MIN MAX MIN MAX MIN MAX 0 100 0 80 0 100 CLK high, PRE or CLR low 4 4 4 CLK low 5 6 5 High 2 3 2 Low 3 4 3 PRE or CLR to CLK 2 3 2 High 1 2 1 Low 1 2 1 UNIT MHz ns ns ns § Inactive-state setup time is also referred to as recovery time. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–3 SN54F74, SN74F74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SDFS046A – MARCH 1987 – REVISED OCTOBER 1993 switching characteristics (see Note 3) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, CL = 50 pF, RL = 500 Ω, TA = 25°C VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX† ′F74 SN54F74 SN74F74 MIN MIN MIN TYP 100 145 3 4.9 6.8 3.8 8.5 3 7.8 3.6 5.8 8 4.4 10.5 3.6 9.2 2.4 4.2 6.1 3.2 8 2.4 PRE or CLR Q or Q tPHL 2.7 6.6 9 3.5 11.5 2.7 † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. NOTE 3: Load circuits and waveforms are shown in Section 1. 7.1 fmax tPLH tPHL tPLH 2–4 CLK Q or Q POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MAX UNIT MAX 80 MAX 100 MHz 10.5 ns ns PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-9759201Q2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629759201Q2A SNJ54F 74FK 5962-9759201QCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9759201QC A SNJ54F74J 5962-9759201QDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9759201QD A SNJ54F74W JM38510/34101B2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 34101B2A Samples JM38510/34101BCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 34101BCA Samples JM38510/34101BDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 34101BDA Samples M38510/34101B2A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 34101B2A Samples M38510/34101BCA ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 34101BCA Samples M38510/34101BDA ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 34101BDA Samples SN54F74J ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN54F74J Samples SN74F74D ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F74 Samples SN74F74DG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F74 Samples SN74F74DR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F74 Samples SN74F74DRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F74 Samples SN74F74N ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN74F74N Samples SN74F74NE4 ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN74F74N Samples Addendum-Page 1 Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74F74NSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 74F74 SNJ54F74FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629759201Q2A SNJ54F 74FK SNJ54F74J ACTIVE CDIP J 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9759201QC A SNJ54F74J SNJ54F74W ACTIVE CFP W 14 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9759201QD A SNJ54F74W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
SN74F74D 价格&库存

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