SN74HC125DR

Product Folder Sample & Buy Technical Documents Support & Community Tools & Software SN54HC125 SN74HC125 SCLS104E – AUGUST 1984 – REVISED DECEMBER 2015 SNx4HC125 Quadruple Bus Buffer Gates With 3-State Outputs 1 Features 3 Description • • The SNx4HC125 device is a quadruple set of bus buffer gates and features independent line drivers with 3-state outputs. The SNx4HC125 is designed for 2-V to 6-V VCC operation. Each output is disabled when the associated output-enable (OE) input is high. 1 • • • • Wide Operating Voltage Range of 2 V to 6 V High-Current 3-State Outputs Interface Directly With System Bus or Can Drive Up to 15 LSTTL Loads Low Power Consumption, 80-µA Maximum ICC Typical tpd = 11 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µA Maximum To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. 2 Applications • • • • • • • • Device Information(1) TV Set-Top Boxes and DVRs E-meters Smart Grids: Transmission Line Monitoring Printers and Computer Peripherals Building Security: Control Panels IP Phones Test and Measurement: Range Readers Smart Grids: Distribution Feeder Protection Relay PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC125N PDIP (14) 18.30 mm × 6.35 mm SN74HC125D SOIC (14) 8.65 mm × 6.00 mm SN74HC125W SO (14) 10.20 mm × 5.30 mm SN74HC125DB SSOP (14) 6.20 mm × 5.30 mm SN74HC125PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC125J CDIP (14) 19.90 mm × 6.90 mm SN54HC125FK LCCC (20) 8.90 mm × 8.44 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Logic Diagram (Positive Logic) 1OE 1A 2OE 2A 1 2 3OE 3 1Y 4 5 3A 4OE 6 2Y 4A 10 9 8 3Y 13 12 11 4Y Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. SN54HC125 SN74HC125 SCLS104E – AUGUST 1984 – REVISED DECEMBER 2015 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 4 4 4 4 5 5 6 6 6 Absolute Maximum Ratings ...................................... ESD Ratings ............................................................ Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics, TA = 25°C ........................ Electrical Characteristics, SN54HC125 .................... Electrical Characteristics, SN74HC125 .................... Switching Characteristics, TA = 25°C, CL = 50 pF .... Switching Characteristics, SN54HC125, CL = 50 pF Switching Characteristics, SN74HC125, CL = 50 pF ............................................................................... 6.11 Switching Characteristics, TA = 25°C , CL = 150 pF ............................................................................... 6.12 Switching Characteristics, SN54HC125, CL = 150 pF ............................................................................... 6.13 Switching Characteristics, SN74HC125, CL = 150 pF ............................................................................... 6.14 Operating Characteristics........................................ 7 7 7 8 8 6.15 Typical Characteristics ............................................ 8 7 8 Parameter Measurement Information .................. 9 Detailed Description ............................................ 10 8.1 8.2 8.3 8.4 9 Overview ................................................................. Functional Block Diagram ....................................... Feature Description................................................. Device Functional Modes........................................ 10 10 10 10 Application and Implementation ........................ 11 9.1 Application Information............................................ 11 9.2 Typical Application ................................................. 11 10 Power Supply Recommendations ..................... 12 11 Layout................................................................... 12 11.1 Layout Guidelines ................................................. 12 11.2 Layout Example .................................................... 12 12 Device and Documentation Support ................. 13 12.1 12.2 12.3 12.4 12.5 12.6 Documentation Support ........................................ Related Links ........................................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 13 13 13 13 13 13 13 Mechanical, Packaging, and Orderable Information ........................................................... 13 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (August 2003) to Revision E Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ................................................................................................ 1 • Removed Ordering Information table. ................................................................................................................................... 1 2 Submit Documentation Feedback Copyright © 1984–2015, Texas Instruments Incorporated Product Folder Links: SN54HC125 SN74HC125 SN54HC125 SN74HC125 www.ti.com SCLS104E – AUGUST 1984 – REVISED DECEMBER 2015 5 Pin Configuration and Functions D, DB, N, NS, J, or PW Package 14-Pin SOIC, SSOP, PDIP, SO, CDIP, or TSSOP Top View 14 2 13 3 12 4 11 5 10 6 9 7 8 1A 1OE NC VCC 4OE 1 VCC 4OE 4A 4Y 3OE 3A 3Y 1Y NC 2OE NC 2A 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 4A NC 4Y NC 3OE 2Y GND NC 3Y 3A 1OE 1A 1Y 2OE 2A 2Y GND FK Package 20-Pin LCCC Top View Pin Functions (1) PIN SOIC, SSOP, PDIP, SO, CDIP, or TSSOP LCCC 1A 2 3 I Input 1OE 1 2 I Output Enable (Active Low) 1Y 3 4 O Output 2A 5 8 I Input 2OE 4 6 I Output Enable (Active Low) 2Y 6 9 O Output 3A 9 13 I Input 3OE 10 14 I Output Enable (Active Low) 3Y 8 12 O Output 4A 12 18 I Input 4OE 13 19 I Output Enable (Active Low) 4Y 11 16 O Output 7 10 — Ground — 1, 5, 7, 11, 15, 17 — Not connected 14 20 — Power NAME GND NC (2) VCC (1) (2) I/O DESCRIPTION See Mechanical, Packaging, and Orderable Information for dimensions NC – No internal connection Copyright © 1984–2015, Texas Instruments Incorporated Product Folder Links: SN54HC125 SN74HC125 Submit Documentation Feedback 3 SN54HC125 SN74HC125 SCLS104E – AUGUST 1984 – REVISED DECEMBER 2015 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) VCC Supply voltage (2) MIN MAX UNIT –0.5 7 V IIK Input clamp current VI < 0 or VI > VCC ±20 mA IOK Output clamp current (2) VO < 0 or VO > VCC ±20 mA IO Continuous output current VO = 0 to VCC ±35 mA ±70 mA Tj Continuous current through VCC or GND Junction temperature –65 150 °C Tstg Storage temperature –65 150 °C (1) (2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 6.2 ESD Ratings VALUE Electrostatic discharge V(ESD) (1) (2) Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) UNIT 2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) V 500 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions See (1) . VCC MIN NOM MAX 2 5 6 Supply voltage VCC = 2 V VIH High-level input voltage VCC = 4.5 V 3.15 V 4.2 VCC = 2 V Low-level input voltage 0.5 VCC = 4.5 V 1.35 VCC = 6 V VI Input voltage VO Output voltage TA (1) Input transition rise and fall time Operating free-air temperature V 1.8 0 0 VCC = 2 V ∆t/∆v V 1.5 VCC = 6 V VIL UNIT VCC V VCC V 1000 VCC = 4.5 V 500 VCC = 6 V 400 SN54HC125 –55 125 SN74HC125 –40 85 ns °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, SCBA004. 6.4 Thermal Information SN74LVC1G06 THERMAL METRIC (1) RθJA (1) 4 Junction-to-ambient thermal resistance D (SOIC) DB (SSOP) N (PDIP) NS (SOP) PW (TSSOP) 14 PINS 14 PINS 14 PINS 14 PINS 14 PINS 86 96 80 76 113 UNIT °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 1984–2015, Texas Instruments Incorporated Product Folder Links: SN54HC125 SN74HC125 SN54HC125 SN74HC125 www.ti.com SCLS104E – AUGUST 1984 – REVISED DECEMBER 2015 6.5 Electrical Characteristics, TA = 25°C over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –20 µA VOH VI = VIH or VIL IOH = –6 mA IOH = –7.8 mA VOL VCC MIN TYP 2V 1.9 1.998 4.5 V 4.4 4.499 6V 5.9 5.999 4.5 V 3.98 4.3 6V 5.48 MAX V 5.8 2V 0.002 0.1 IOL = 20 µA 4.5 V 0.001 0.1 6V 0.001 0.1 IOL = 6 mA 4.5 V 0.17 0.26 6V 0.15 0.26 VI = VIH or VIL IOL = 7.8 mA UNIT V II VI = VCC or 0 6V ±0.1 ±100 nA IOZ VO = VCC or 0 6V ±0.01 ±0.5 µA ICC VI = VCC or 0, 8 µA 10 pF IO = 0 6V 2 V to 6V Ci 3 6.6 Electrical Characteristics, SN54HC125 over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –20 µA VOH VI = VIH or VIL IOH = –6 mA IOH = –7.8 mA VOL VCC MIN 2V 1.9 4.5 V 4.4 6V 5.9 4.5 V 3.7 6V 5.2 MAX V 2V 0.1 IOL = 20 µA 4.5 V 0.1 6V 0.1 IOL = 6 mA 4.5 V 0.4 6V 0.4 VI = VIH or VIL IOL = 7.8 mA UNIT V II VI = VCC or 0 6V ±1000 nA IOZ VO = VCC or 0 6V ±10 µA ICC VI = VCC or 0, 6V 160 µA 2 V to 6V 10 pF IO = 0 Ci Copyright © 1984–2015, Texas Instruments Incorporated Product Folder Links: SN54HC125 SN74HC125 Submit Documentation Feedback 5 SN54HC125 SN74HC125 SCLS104E – AUGUST 1984 – REVISED DECEMBER 2015 www.ti.com 6.7 Electrical Characteristics, SN74HC125 over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –20 µA VOH VI = VIH or VIL IOH = –6 mA IOH = –7.8 mA VOL VCC MIN 2V 1.9 4.5 V 4.4 6V 5.9 4.5 V 3.84 6V 5.34 MAX V 2V 0.1 IOL = 20 µA 4.5 V 0.1 6V 0.1 IOL = 6 mA 4.5 V 0.33 6V 0.33 VI = VIH or VIL IOL = 7.8 mA UNIT V II VI = VCC or 0 6V ±1000 nA IOZ VO = VCC or 0 6V ±5 µA ICC VI = VCC or 0, 6V 80 µA 2 V to 6V 10 pF IO = 0 Ci 6.8 Switching Characteristics, TA = 25°C, CL = 50 pF over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 2) PARAMETER tpd ten FROM (INPUT) TO (OUTPUT) VCC A Y OE tdis Y OE Y tt Any MIN TYP MAX 2V 48 150 4.5 V 14 30 6V 11 26 2V 53 150 4.5 V 14 30 6V 11 26 2V 30 150 4.5 V 15 30 6V 14 26 2V 28 75 4.5 V 8 15 6V 6 13 UNIT ns ns ns ns 6.9 Switching Characteristics, SN54HC125, CL = 50 pF over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 2) PARAMETER tpd ten tdis 6 FROM (INPUT) TO (OUTPUT) VCC 2V 150 A Y 4.5 V 36 6V 25 OE OE Submit Documentation Feedback Y Y MIN MAX 2V 180 4.5 V 36 6V 31 2V 180 4.5 V 36 6V 31 UNIT ns ns ns Copyright © 1984–2015, Texas Instruments Incorporated Product Folder Links: SN54HC125 SN74HC125 SN54HC125 SN74HC125 www.ti.com SCLS104E – AUGUST 1984 – REVISED DECEMBER 2015 Switching Characteristics, SN54HC125, CL = 50 pF (continued) over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V 90 Any 4.5 V 18 6V 15 tt MIN MAX UNIT ns 6.10 Switching Characteristics, SN74HC125, CL = 50 pF over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V 150 A Y 4.5 V 30 tpd ten OE tdis Y OE Y tt Any MIN MAX 6V 26 2V 150 4.5 V 30 6V 26 2V 150 4.5 V 30 6V 26 2V 75 4.5 V 15 6V 13 UNIT ns ns ns ns 6.11 Switching Characteristics, TA = 25°C , CL = 150 pF over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 2) PARAMETER tpd ten FROM (INPUT) TO (OUTPUT) VCC A Y OE Y tt Any MIN TYP MAX 2V 67 150 4.5 V 19 30 6V 15 25 2V 100 135 4.5 V 20 27 6V 17 23 2V 45 210 4.5 V 17 42 6V 13 36 UNIT ns ns ns 6.12 Switching Characteristics, SN54HC125, CL = 150 pF over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 2) PARAMETER tpd ten FROM (INPUT) TO (OUTPUT) VCC 2V 225 A Y 4.5 V 45 OE Y MIN MAX 6V 39 2V 200 4.5 V 40 6V 34 Copyright © 1984–2015, Texas Instruments Incorporated Product Folder Links: SN54HC125 SN74HC125 UNIT ns ns Submit Documentation Feedback 7 SN54HC125 SN74HC125 SCLS104E – AUGUST 1984 – REVISED DECEMBER 2015 www.ti.com Switching Characteristics, SN54HC125, CL = 150 pF (continued) over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V 315 Any 4.5 V 63 6V 53 tt MIN MAX UNIT ns 6.13 Switching Characteristics, SN74HC125, CL = 150 pF over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V 190 A Y 4.5 V 38 tpd ten OE Y tt Any MIN MAX 6V 32 2V 170 4.5 V 34 6V 29 2V 265 4.5 V 53 6V 45 UNIT ns ns ns 6.14 Operating Characteristics TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance per gate No load TYP 45 UNIT pF 6.15 Typical Characteristics 45 40 35 TPD 30 25 20 15 10 5 0 0 1 2 3 4 5 6 VCC at 25ƒC 7 C002 Figure 1. TPD vs VCC at 25°C 8 Submit Documentation Feedback Copyright © 1984–2015, Texas Instruments Incorporated Product Folder Links: SN54HC125 SN74HC125 SN54HC125 SN74HC125 www.ti.com SCLS104E – AUGUST 1984 – REVISED DECEMBER 2015 7 Parameter Measurement Information VCC PARAMETER Test Point From Output Under Test S1 tPZH ten RL CL (see Note A) 1 kΩ tPZL tPHZ tdis S2 RL 1 kΩ CL S1 S2 50 pF or 150 pF Open Closed Closed Open 50 pF tPLZ −− tpd or tt LOAD CIRCUIT 50 pF or 150 pF Open Closed Closed Open Open Open VCC Input 50% 50% 0V tPLH In-Phase Output 50% 10% tPHL 90% VOH 50% 10% V OL tf 90% tr tPHL Out-of-Phase Output 90% tPLH 50% 10% 50% 10% 90% tf VOH VOL tr VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES Output Control (Low-Level Enabling) VCC 50% 50% 0V tPZL tPLZ 10% tPZH Input 50% 10% 90% 90% tr VCC 50% 10% 0 V ≈VCC ≈VCC 50% Output Waveform 1 (See Note B) VOL tPHZ Output Waveform 2 (See Note B) 50% 90% VOH ≈0 V tf VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS NOTES: A. CL includes probe and test-fixture capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. D. The outputs are measured one at a time with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. t PZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 2. Load Circuit and Voltage Waveforms Copyright © 1984–2015, Texas Instruments Incorporated Product Folder Links: SN54HC125 SN74HC125 Submit Documentation Feedback 9 SN54HC125 SN74HC125 SCLS104E – AUGUST 1984 – REVISED DECEMBER 2015 www.ti.com 8 Detailed Description 8.1 Overview The SNx4HC125 offers 4 independent gate buffers capable of sinking or sourcing 6 mA at 5-V VCC. Each buffer also integrates a 3-state output, or high impedance output. To enable the device's 3-state output, set the corresponding OE input to a HIGH logic level. Major benefits of using HC logic include both the technology's flexibility of input VCC (2 V to 6 V) and highspeed capability (11 ns typical tpd). 8.2 Functional Block Diagram 1OE 1A 2OE 2A 1 3OE 2 3 1Y 3A 4 4OE 5 6 2Y 4A 10 9 8 3Y 13 12 11 4Y Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages. 8.3 Feature Description The 3-state outputs enable design choices such as connecting multiple outputs together, as long as the 3-state controls are used correctly. In a typical example, without 3-state outputs, if two outputs were connected to the same input on an adjacent system, and each output was trying to drive a different logic level (one HIGH, one LOW), the device could short-circuit and become damaged. With 3-state output functionality, the outputs can be configured so that when one output is driving an output signal, the others are set to high impedance and prevent any damage to the device. 8.4 Device Functional Modes Table 1 lists the functional modes of the SNx4HC125. Table 1. Function Table INPUTS 10 Submit Documentation Feedback OE A OUTPUT Y L H H L L L H X Z Copyright © 1984–2015, Texas Instruments Incorporated Product Folder Links: SN54HC125 SN74HC125 SN54HC125 SN74HC125 www.ti.com SCLS104E – AUGUST 1984 – REVISED DECEMBER 2015 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The SNx4HC125 can be used to buffer noisy or weak input signals in order to clean up these signals and drive a strong logic level to a processor or other sampling system. 9.2 Typical Application VCC Physical Push Button Microprocessor SN74HC125 (1 gate) Figure 3. Typical Application Diagram 9.2.1 Design Requirements This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads so routing and load conditions should be considered to prevent ringing. 9.2.2 Detailed Design Procedure 1. Recommended Input Conditions – Rise time and fall time specs. See (Δt/ΔV) in the Recommended Operating Conditions table. – Specified high and low levels. See (VIH and VIL) in the Recommended Operating Conditions table. – Inputs are overvoltage tolerant allowing them to go as high as (VI maximum) in the Recommended Operating Conditions table at any valid VCC. 2. Recommend Output Conditions – Load currents should not exceed (IO maximum) per output and should not exceed (continuous current through VCC or GND) total current for the part. These limits are located in the Absolute Maximum Ratings table. – Outputs should not be pulled above VCC. Copyright © 1984–2015, Texas Instruments Incorporated Product Folder Links: SN54HC125 SN74HC125 Submit Documentation Feedback 11 SN54HC125 SN74HC125 SCLS104E – AUGUST 1984 – REVISED DECEMBER 2015 www.ti.com Typical Application (continued) 9.2.3 Application Curve 0.067 0.0665 0.066 tpd/pF (ns/pF) 0.0655 0.065 0.0645 tpd/pF vs. Vcc 0.064 0.0635 0.063 0.0625 0.062 0 1 2 3 4 5 6 7 Vcc (V) C001 Figure 4. tpd/pF vs VCC at 25°C 10 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the Recommended Operating Conditions table. Each VCC pin should have a good bypass capacitor to prevent power disturbance. For devices with a single supply, a 0.1-μF capacitor is recommended and if there are multiple VCC pins then a 0.01-μF or 0.022-μF capacitor is recommended for each power pin. It is ok to parallel multiple bypass caps to reject different frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be installed as close to the power pin as possible for best results. 11 Layout 11.1 Layout Guidelines When using multiple bit logic devices inputs must not ever float. In many cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins must not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified below are the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC whichever make more sense or is more convenient. 11.2 Layout Example VCC Unused Input Input Output Output Unused Input Input Figure 5. Layout Diagram 12 Submit Documentation Feedback Copyright © 1984–2015, Texas Instruments Incorporated Product Folder Links: SN54HC125 SN74HC125 SN54HC125 SN74HC125 www.ti.com SCLS104E – AUGUST 1984 – REVISED DECEMBER 2015 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation For related documentation, see the following: • Implications of Slow or Floating CMOS Inputs, SCBA004. • Introduction to Logic, SLVA700 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY SN54HC125 Click here Click here Click here Click here Click here SN74HC125 Click here Click here Click here Click here Click here 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.4 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.5 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser based versions of this data sheet, refer to the left hand navigation. Copyright © 1984–2015, Texas Instruments Incorporated Product Folder Links: SN54HC125 SN74HC125 Submit Documentation Feedback 13 PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962-87721012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 596287721012A SNJ54HC 125FK 5962-8772101CA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8772101CA SNJ54HC125J SN54HC125J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SN54HC125J SN74HC125D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC125 SN74HC125DBR ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC125 SN74HC125DE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC125 SN74HC125DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 HC125 SN74HC125DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC125 SN74HC125DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC125 SN74HC125DT ACTIVE SOIC D 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC125 SN74HC125N ACTIVE PDIP N 14 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 SN74HC125N SN74HC125NE4 ACTIVE PDIP N 14 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 SN74HC125N SN74HC125NSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC125 SN74HC125NSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC125 SN74HC125NSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC125 SN74HC125PWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 HC125 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 24-Aug-2018 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) SN74HC125PWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC125 SN74HC125PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC125 SN74HC125PWT ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC125 SNJ54HC125FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 596287721012A SNJ54HC 125FK SNJ54HC125J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8772101CA SNJ54HC125J (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of