SN74HC4060−Q1
14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS
SCLS726 − DECEMBER 2011
D
D
D
D
D
D ±4-mA Output Drive at 5 V
D Low Input Current of 1 μA Max
D Allow Design of Either RC- or
Qualified for Automotive Applications
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 80-μA Max ICC
Typical tpd = 14 ns
Crystal-Oscillator Circuits
SN74HC4060−Q1 . . . D PACKAGE
(TOP VIEW)
QL
QM
QN
QF
QE
QG
QD
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
QJ
QH
QI
CLR
CLKI
CLKO
CLKO
description/ordering information
The ’HC4060−Q1 devices consist of an oscillator section and 14 ripple-carry binary counter stages. The
oscillator configuration allows design of either RC- or crystal-oscillator circuits. A high-to-low transition on the
clock (CLKI) input increments the counter. A high level at the clear (CLR) input disables the oscillator (CLKO
goes high and CLKO goes low) and resets the counter to zero (all Q outputs low).
ORDERING INFORMATION
PACKAGE†
TA
−40°C to 125°C
†
SOIC − D
Reel of 2500
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SN74HC4060QDRQ1
HC4060Q
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2011, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
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1
SN74HC4060−Q1
14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS
SCLS726 − DECEMBER 2011
FUNCTION TABLE
(each buffer)
INPUTS
FUNCTION
CLK
CLR
↑
L
No change
↓
L
Advance to next stage
X
H
All outputs L
Logic diagram (positive logic)
R
R
T
T
4
QF
CLR
R
R
T
R
T
6
14
QG
R
T
13
QH
T
R
T
15
QI
R
T
1
QJ
T
2
QL
3
QM
QN
12
R
R
T
CLKI
R
11
9
10
R
T
R
T
R
T
T
CLKO
CLKO
7
QD
Pin numbers shown are for the D package.
5
QE
Absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
ESD rating: Human Body Model (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000 V
Charged Device Model (CDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 V
Machine Model (MM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 V
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
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SN74HC4060−Q1
14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS
SCLS726 − DECEMBER 2011
Recommended operating conditions (see Note 3)
VCC
Supply voltage
VCC = 2 V
VIH
NOM
MAX
2
5
6
3.15
VCC = 6 V
V
0.5
VCC = 4.5 V
Low-level
Low
level input voltage
1.35
VCC = 6 V
VI
Input voltage
VO
Output voltage
0
VCC = 2 V
TA
Operating free-air temperature
VCC
V
VCC
V
1000
VCC = 4.5 V
Input transition rise/fall time
V
1.8
0
Δt/Δv
V
4.2
VCC = 2 V
VIL
UNIT
1.5
VCC = 4.5 V
High-level
High
level input voltage
MIN
500
VCC = 6 V
ns
400
−40
125
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
All outputs
TEST CONDITIONS
VI = VIH or VIL,
VCC
IOH = −20
20 μA
VOH
Q outputs
All outputs
VI = VIH or VIL
VI = VIH or VIL,
IOH = −4 mA
IOH = −5.2 mA
IOL = 20 μA
VOL
Q outputs
VI = VIH or VIL
II
VI = VCC or 0
ICC
VI = VCC or 0,
IOL = 4 mA
IOL = 5.2 mA
IO = 0
Ci
TYP
’HC4060−Q1
MAX
MIN
2V
1.9
1.998
1.9
4.5 V
4.4
4.499
4.4
6V
5.9
5.999
5.9
4.5 V
3.98
4.3
3.7
6V
5.48
5.8
MAX
UNIT
V
5.2
2V
0.002
0.1
0.1
4.5 V
0.001
0.1
0.1
6V
0.001
0.1
0.1
4.5 V
0.17
0.26
0.4
6V
0.15
0.26
0.4
6V
±0.1
±100
±1000
nA
8
160
μA
3
10
10
pF
6V
2 V to 6 V
POST OFFICE BOX 655303
TA = 25°C
MIN
• DALLAS, TEXAS 75265
V
3
SN74HC4060−Q1
14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS
SCLS726 − DECEMBER 2011
Timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
VCC
fclock
Clock frequency
CLKI high or low
tw
Pulse duration
CLR high
tsu
Setup
p time,, CLR inactive before CLKI↓
TA = 25°C
MIN
MAX
’HC4060−Q1
MIN
MAX
2V
5.5
3.7
4.5 V
28
19
6V
33
22
2V
90
135
4.5 V
18
27
6V
15
23
2V
90
135
4.5 V
18
27
6V
15
23
2V
160
240
4.5 V
32
48
6V
27
41
UNIT
MHz
ns
ns
Switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
fmax
tpd
CLKI
tPHL
QD
CLR
Any Q
tt
Anyy
VCC
TA = 25°C
MIN
TYP
’HC4060−Q1
MAX
MIN
2V
5.5
10
3.7
4.5 V
28
45
19
6V
33
53
22
MAX
UNIT
MHz
2V
240
490
735
4.5 V
58
98
147
6V
42
83
125
2V
66
140
210
4.5 V
18
28
42
6V
14
24
36
2V
28
75
110
4.5 V
8
15
22
6V
6
30
19
ns
ns
ns
Operating characteristics, TA = 25°C
PARAMETER
Cpd
4
TEST CONDITIONS
Power dissipation capacitance
No load
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TYP
88
UNIT
pF
SN74HC4060−Q1
14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS
SCLS726 − DECEMBER 2011
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
Test
Point
Reference
Input
0V
CL = 50 pF
(see Note A)
tsu
Data
Input
LOAD CIRCUIT
Input
50%
0V
In-Phase
Output
50%
10%
tPHL
90%
90%
tr
tPHL
Out-of-Phase
Output
90%
VOH
50%
10%
VOL
tf
tPLH
50%
10%
tf
50%
10%
90%
50%
10%
tf
VOLTAGE WAVEFORMS
SETUP AND INPUT RISE AND FALL TIMES
High-Level
Pulse
50%
tr
VOL
50%
VCC
0V
VOH
90%
VCC
50%
10% 0 V
90%
tr
VCC
50%
tPLH
VCC
50%
tw
VCC
Low-Level
Pulse
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
50%
50%
0V
VOLTAGE WAVEFORMS
PULSE DURATIONS
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. For clock inputs, fmax is measured when the input duty cycle is 50%.
D. The outputs are measured one at a time with one input transition per measurement.
E. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SN74HC4060−Q1
14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS
SCLS726 − DECEMBER 2011
CONNECTING AN RC-OSCILLATOR CIRCUIT TO THE ’HC4060−Q1 DEVICE
The ’HC4060−Q1 devices consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator
configuration allows design of either RC- or crystal-oscillator circuits.
When an RC-oscillator circuit is implemented, two resistors and a capacitor are required. The components are
attached to the terminals as shown:
1
2
16
15
3
4
14
13
5
6
12
11
7
10
8
9
R2
R1
C
To determine the values of capacitance and resistance necessary to obtain a specific oscillator frequency (f), use
this formula:
f+
1
R2
) 0.693Ǔ
2(R1)(C)ǒ0.405
R1)R2
If R2 > > R1 (i.e., R2 = 10R1), the above formula simplifies to:
f + 0.455
RC
6
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN74HC4060QDRQ1
ACTIVE
SOIC
D
16
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
HC4060Q
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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