SN74HC42N


         
   SCLS091D − DECEMBER 1982 − REVISED SEPTEMBER 2003 D D D D D Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd = 14 ns ±4-mA Output Drive at 5 V 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 SN54HC42 . . . FK PACKAGE (TOP VIEW) VCC A B C D 9 8 7 2 3 NC 4 5 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 B C NC D 9 6 GND NC 7 8 0 1 2 3 4 5 6 GND D Conditions Also for Applications as 3-Line to 8-Line Decoders 1 0 NC VCC A SN54HC42 . . . J OR W PACKAGE SN74HC42 . . . D, N, OR NS PACKAGE (TOP VIEW) D Low Input Current of 1 µA Max D Full Decoding of Input Logic D All Outputs Are High for Invalid BCD NC − No internal connection description/ordering information These decimal decoders consist of eight inverters and ten 4-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid input logic ensures that all inputs remain off for all invalid input conditions. ORDERING INFORMATION PACKAGE† TA PDIP − N −40°C 85°C −40 C to 85 C −55°C −55 C to 125 125°C C SOIC − D ORDERABLE PART NUMBER Tube of 25 SN74HC42N Tube of 40 SN74HC42D Reel of 2500 SN74HC42DR TOP-SIDE MARKING SN74HC42N HC42 Reel of 250 SN74HC42DT SOP − NS Reel of 2000 SN74HC42NSR HC42 CDIP − J Tube of 25 SNJ54HC42J SNJ54HC42J CFP − W Tube of 150 SNJ54HC42W SNJ54HC42W LCCC − FK Tube of 55 SNJ54HC42FK SNJ54HC42FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2003, Texas Instruments Incorporated   ! " #$%! "  &$'(#! )!%* )$#!" # ! "&%##!" &% !+% !%"  %," "!$%!" "!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)% !%"!/  (( &%!%"*  &)$#!" #&(! ! 0 1 232 (( &%!%" % !%"!%) $(%"" !+%-"% !%)*  (( !+% &)$#!" &)$#! &#%""/ )%" ! %#%""(. #($)% !%"!/  (( &%!%"* POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 

         
   SCLS091D − DECEMBER 1982 − REVISED SEPTEMBER 2003 FUNCTION TABLE INPUTS NO. D C 0 L L L 1 L L L 2 L L H 3 L L 4 L H 5 L 6 L 7 2 OUTPUTS 0 1 2 L L H H H H H H H H H H H L H H H H H H H H L H H L H H H H H H H H H H H H L H H H H H H L L H H H H L H H H H H H L H H H H H H L H H H H H H L H H H H H H L H H H L H H H H H H H H H H L H H 8 H L L L H H H H H H H H L H 9 H L L H H H H H H H H H H L H L H L H H H H H H H H H H H L H H H H H H H H H H H H H H L L H H H H H H H H H H H H L H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H H H H H H H H H Invalid B A POST OFFICE BOX 655303 3 4 • DALLAS, TEXAS 75265 5 6 7 8 9 

         
   SCLS091D − DECEMBER 1982 − REVISED SEPTEMBER 2003 logic diagram (positive logic) 1 0 15 A 2 1 3 2 4 B 3 14 5 4 6 13 5 C 7 9 12 6 7 D 10 8 11 9 Pin numbers shown are for the D, J, N, NS, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 

         
   SCLS091D − DECEMBER 1982 − REVISED SEPTEMBER 2003 recommended operating conditions (see Note 3) SN54HC42 VCC Supply voltage VIH VCC = 2 V VCC = 4.5 V High-level input voltage VCC = 6 V VCC = 2 V VIL VI VO Input voltage NOM MAX 2 5 6 NOM MAX 2 5 6 1.5 3.15 3.15 4.2 4.2 0 VCC = 6 V UNIT V V 0.5 0.5 1.35 1.35 1.8 1.8 VCC VCC VCC = 2 V VCC = 4.5 V Input transition rise/fall time MIN 1.5 0 Output voltage ∆t/∆v MIN VCC = 4.5 V VCC = 6 V Low-level input voltage SN74HC42 0 VCC VCC 0 1000 1000 500 500 400 400 V V V ns TA Operating free-air temperature −55 125 −40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOH VOL TEST CONDITIONS Ci 4 SN74HC42 MIN MIN MAX MAX UNIT 2V 1.9 1.998 1.9 1.9 IOH = −20 µA 4.4 4.499 4.4 4.4 6V 5.9 5.999 5.9 5.9 IOH = −4 mA IOH = −5.2 mA 4.5 V 3.98 4.3 3.7 3.84 6V 5.48 5.8 5.2 5.34 2V 0.002 0.1 0.1 0.1 IOL = 20 µA 4.5 V 0.001 0.1 0.1 0.1 6V 0.001 0.1 0.1 0.1 4.5 V 0.17 0.26 0.4 0.33 6V 0.15 0.26 0.4 0.33 6V ±0.1 ±100 ±1000 ±1000 nA 8 160 80 µA 10 10 10 pF VI = VIH or VIL VI = VIH or VIL VI = VCC or 0 VI = VCC or 0, SN54HC42 4.5 V IOL = 4 mA IOL = 5.2 mA II ICC TA = 25°C MIN TYP MAX VCC IO = 0 6V 2 V to 6 V POST OFFICE BOX 655303 3 • DALLAS, TEXAS 75265 V V 

         
   SCLS091D − DECEMBER 1982 − REVISED SEPTEMBER 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) TA = 25°C TYP MAX SN54HC42 SN74HC42 MIN MIN PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V 65 150 225 190 tpd A, B, C, or D 0−9 4.5 V 18 30 45 38 6V 14 26 38 32 tt Any MIN MAX MAX 2V 28 75 110 95 4.5 V 8 15 22 19 6V 7 13 19 16 UNIT ns ns operating characteristics, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load TYP UNIT 39 pF PARAMETER MEASUREMENT INFORMATION From Output Under Test Test Point Input VCC 50% 50% 0V CL = 50 pF (see Note A) tPLH In-Phase Output LOAD CIRCUIT 50% 10% tPHL 90% 90% tr Input 50% 10% 90% 90% tr tPHL VCC 50% 10% 0 V Out-of-Phase Output 90% tf VOH 50% 10% VOL tf tPLH 50% 10% tf 50% 10% 90% VOH VOL tr VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES NOTES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. C. The outputs are measured one at a time with one input transition per measurement. D. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-86821012A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 596286821012A SNJ54HC 42FK 5962-8682101EA ACTIVE CDIP J 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8682101EA SNJ54HC42J Samples SN54HC42J ACTIVE CDIP J 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN54HC42J Samples SN74HC42D ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC42 Samples SN74HC42DR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC42 Samples SN74HC42DT ACTIVE SOIC D 16 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HC42 Samples SN74HC42N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74HC42N Samples SNJ54HC42FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 596286821012A SNJ54HC 42FK SNJ54HC42J ACTIVE CDIP J 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-8682101EA SNJ54HC42J (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of