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SN74HCT138D

SN74HCT138D

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC16_150MIL

  • 描述:

    IC DECODER/DEMUX 1X3:8 16SOIC

  • 详情介绍
  • 数据手册
  • 价格&库存
SN74HCT138D 数据手册
SN54HCT138, SN74HCT138 SCLS171F – MARCH 1984 – REVISED MARCH 2022 SNx4HCT138 3-Line to 8-Line Decoders/Demultiplexers 1 Features 2 Description • • • • • • • • The ’HCT138 devices are designed for highperformance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible. • Operating voltage range of 4.5 V to 5.5 V Outputs can drive up to 10 LSTTL loads Low power consumption, 80-µA max ICC Typical tpd = 17 ns ±4-mA output drive at 5 V Low input current of 1 µA max Inputs are TTL-Voltage compatible Designed specifically for high-speed memory decoders and data transmission systems Incorporate three enable inputs to simplify cascading and/or data reception Device Information (1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HCT138D SOIC (16) 9.90 mm × 3.90 mm SN74HCT138N PDIP (16) 19.31 mm × 6.35 mm SN74HCT138NS SO (16) 6.20 mm × 5.30 mm SN74HCT138PW TSSOP (16) 5.00 mm × 4.40 mm SN54HCT138J CDIP (16) 24.38 mm × 6.92 mm SNJ54HCT138FK LCCC (20) 8.89 mm × 8.45 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Functional Block Diagram An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN54HCT138, SN74HCT138 www.ti.com SCLS171F – MARCH 1984 – REVISED MARCH 2022 Table of Contents 1 Features............................................................................1 2 Description.......................................................................1 3 Revision History.............................................................. 2 4 Pin Configuration and Functions...................................3 5 Specifications.................................................................. 4 5.1 Absolute Maximum Ratings........................................ 4 (1) 5.2 Recommended Operating Conditions ..................... 4 5.3 Thermal Information....................................................4 5.4 Electrical Characteristics.............................................5 5.5 Switching Characteristics ...........................................5 5.6 Operating Characteristics........................................... 5 6 Parameter Measurement Information............................ 6 7 Detailed Description........................................................7 7.1 Overview..................................................................... 7 7.2 Functional Block Diagram........................................... 7 7.3 Device Functional Modes............................................8 8 Power Supply Recommendations..................................9 9 Layout...............................................................................9 9.1 Layout Guidelines....................................................... 9 10 Device and Documentation Support..........................10 10.1 Documentation Support.......................................... 10 10.2 Receiving Notification of Documentation Updates..10 10.3 Support Resources................................................. 10 10.4 Trademarks............................................................. 10 10.5 Electrostatic Discharge Caution..............................10 10.6 Glossary..................................................................10 11 Mechanical, Packaging, and Orderable Information.................................................................... 10 3 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision E (September 2003) to Revision F (March 2022) Page • Updated the numbering, formatting, tables, figures, and cross-references throughout the doucment to reflect modern data sheet standards............................................................................................................................. 1 2 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HCT138 SN74HCT138 SN54HCT138, SN74HCT138 www.ti.com SCLS171F – MARCH 1984 – REVISED MARCH 2022 4 Pin Configuration and Functions J, W, D, N, NS, or PW Package 16-Pin CDIP, CFP, SOIC, PDIP, SO, TSSOP Top View FK Package 20-Pin LCCC Top View Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HCT138 SN74HCT138 3 SN54HCT138, SN74HCT138 www.ti.com SCLS171F – MARCH 1984 – REVISED MARCH 2022 5 Specifications 5.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) VCC Supply voltage range (2) IIK Input clamp current IOK Output clamp current IO Continuous output current (2) MIN MAX -0.5 7 Junction temperature Tstg Storage temperature (1) (2) V (VI < 0 or VI > VCC) ±20 mA (VO < 0 or VO > VCC) ±20 mA (VO = 0 to VCC) ±25 mA ±50 mA 150 °C 150 °C Continuous current through VCC or GND TJ UNIT -65 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. (1) 5.2 Recommended Operating Conditions SN54HCT138 SN74HCT138 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC Supply voltage VIH High-level input voltage VCC = 4.5 V to 5.5 V VIL Low-level input voltage VCC = 4.5 V to 5.5 V 0.8 V VI Input voltage 0 VCC 0 VCC V VO Output voltage 0 VCC 0 VCC V tt Input transition rise/fall time 500 ns TA Operating free-air temperature 85 °C (1) 2 2 0.8 500 -55 125 -40 V V All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report Implications of Slow or Floating SMOS Inputs, literature number SCBA004. 5.3 Thermal Information THERMAL METRIC RθJA (1) 4 Junction-to-ambient thermal (1) resistance D (SOIC) N (PDIP) NS (SO) PW (TSSOP) 16 PINS 16 PINS 16 PINS 16 PINS UNIT 73 67 64 108 °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application report. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HCT138 SN74HCT138 SN54HCT138, SN74HCT138 www.ti.com SCLS171F – MARCH 1984 – REVISED MARCH 2022 5.4 Electrical Characteristics TEST CONDITIONS(1) PARAMETER IOH = –20 μA VOH High-level output voltage VOL Low-level output voltage II Input hold current VI = VCC or 0 5.5 ICC Supply current VI = VCC or 0. IO = 0 5.5 One input at 0.5 V or 2.4 V, Other inputs at 0 or VCC 5.5 Ci (1) (2) 4.5 IOH = –4 mA IOL = 20 μA 4.5 IOL = 4 mA ΔICC (2) Supply-current change TA = 25°C VCC (V) MAX MIN SN74HCT138 MIN TYP 4.4 4.499 4.4 4.4 3.98 4.3 3.7 3.84 MAX MIN MAX UNIT V 0.001 0.1 0.1 0.1 0.17 0.26 0.4 0.33 ±0.1 ±100 ±1000 ±1000 nA 8 160 80 μA 1.4 2.4 3 2.9 mA 3 10 10 10 pF 4.5 to 5.5 Input capacitance SN54HCT138 V VI = VIH or VIL, unless otherwise noted. This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC. 5.5 Switching Characteristics CL = 50 pF. See Parameter Measurement Information PARAMETER FROM (INPUT) TO (OUTPUT) A, B or C Any Y Enable Any Y VCC (V) tpd tt Y TA = 25°C MIN TYP SN54HCT138 MAX MIN SN74HCT138 MAX MIN MAX 4.5 23 36 54 45 5.5 17 32 49 34 4.5 22 33 50 42 5.5 18 30 45 38 4.5 12 15 22 19 5.5 11 14 20 17 UNIT ns ns 5.6 Operating Characteristics TA = 25°C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS TYP UNIT No load 85 pF Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HCT138 SN74HCT138 5 SN54HCT138, SN74HCT138 www.ti.com SCLS171F – MARCH 1984 – REVISED MARCH 2022 6 Parameter Measurement Information Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tt < 6 ns. For clock inputs, fmax is measured when the input duty cycle is 50%. The outputs are measured one at a time with one input transition per measurement. Test Point From Output Under Test CL(1) (1) CL includes probe and test-fixture capacitance. Figure 6-1. Load Circuit for Push-Pull Outputs 3V Input 1.3V 1.3V 0V tPLH (1) tPHL(1) VOH Output Waveform 1 50% 50% VOL tPLH(1) tPHL(1) VOH Output Waveform 2 50% 50% VOL (1) The greater between tPLH and tPHL is the same as tpd. Figure 6-2. Voltage Waveforms, Propagation Delays for TTL-Compatible Inputs 6 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HCT138 SN74HCT138 www.ti.com SN54HCT138, SN74HCT138 SCLS171F – MARCH 1984 – REVISED MARCH 2022 7 Detailed Description 7.1 Overview The ’HCT138 devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible. The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two active-low (G) and one active-high (G) enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. 7.2 Functional Block Diagram Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HCT138 SN74HCT138 7 SN54HCT138, SN74HCT138 www.ti.com SCLS171F – MARCH 1984 – REVISED MARCH 2022 7.3 Device Functional Modes Table 7-1. Function Table INPUTS ENABLE 8 G1 G2A X X OUTPUTS SELECT G2B C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 H X X X X H H H H H H H H X H X X X H H H H H H H H L X X X X X H H H H H H H H H L L L L L L H H H H H H H H L L L L H H L H H H H H H H L L L H L H H L H H H H H H L L L H H H H H L H H H H H L L H L L H H H H L H H H H L L H L H H H H H H L H H H L L H H L H H H H H H L H H L L H H H H H H H H H H L Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HCT138 SN74HCT138 SN54HCT138, SN74HCT138 www.ti.com SCLS171F – MARCH 1984 – REVISED MARCH 2022 8 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the Recommended Operating Conditions. Each VCC terminal should have a good bypass capacitor to prevent power disturbance. A 0.1-μF capacitor is recommended for this device. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. The 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be installed as close to the power terminal as possible for best results. 9 Layout 9.1 Layout Guidelines When using multiple-input and multiple-channel logic devices inputs must not ever be left floating. In many cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such unused input pins must not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. All unused inputs of digital logic devices must be connected to a logic high or logic low voltage, as defined by the input voltage specifications, to prevent them from floating. The logic level that must be applied to any particular unused input depends on the function of the device. Generally, the inputs are tied to GND or VCC, whichever makes more sense for the logic function or is more convenient. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HCT138 SN74HCT138 9 SN54HCT138, SN74HCT138 www.ti.com SCLS171F – MARCH 1984 – REVISED MARCH 2022 10 Device and Documentation Support TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device, generate code, and develop solutions are listed below. 10.1 Documentation Support 10.1.1 Related Documentation 10.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 10.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 10.4 Trademarks TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners. 10.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 10.6 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 11 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 10 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN54HCT138 SN74HCT138 PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 85504012A ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 85504012A SNJ54HCT 138FK 8550401EA ACTIVE CDIP J 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8550401EA SNJ54HCT138J Samples 8550401FA ACTIVE CFP W 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8550401FA SNJ54HCT138W Samples JM38510/65852BEA ACTIVE CDIP J 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 65852BEA Samples M38510/65852BEA ACTIVE CDIP J 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 JM38510/ 65852BEA Samples SN54HCT138J ACTIVE CDIP J 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 SN54HCT138J Samples SN74HCT138D ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HCT138 Samples SN74HCT138DE4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HCT138 Samples SN74HCT138DG4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HCT138 Samples SN74HCT138DR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 HCT138 Samples SN74HCT138DRE4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HCT138 Samples SN74HCT138DRG4 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HCT138 Samples SN74HCT138DT ACTIVE SOIC D 16 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HCT138 Samples SN74HCT138N ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74HCT138N Samples SN74HCT138NE4 ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74HCT138N Samples SN74HCT138NSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HCT138 Samples SN74HCT138PW ACTIVE TSSOP PW 16 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HT138 Samples SN74HCT138PWR ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 HT138 Samples Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 10-Jun-2022 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74HCT138PWRG4 ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 HT138 SNJ54HCT138FK ACTIVE LCCC FK 20 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 85504012A SNJ54HCT 138FK SNJ54HCT138J ACTIVE CDIP J 16 1 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 8550401EA SNJ54HCT138J (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
SN74HCT138D
物料型号包括SN54HCT138和SN74HCT138,这些是德州仪器生产的3线至8线解码器/解复用器。

器件简介指出这些设备专为高性能内存解码或数据路由应用设计,具有很短的传播延迟时间。

引脚分配在PDF中有详细的图示说明,例如SN74HCT138D的16引脚SOIC封装和SN74HCT138N的16引脚PDIP封装。

参数特性包括工作电压范围4.5V至5.5V、最大80-µA的低功耗、典型17ns的传播延迟时间等。

功能详解强调了这些解码器如何最小化系统解码的影响,并且可以驱动多达10个LSTTL负载。

应用信息涉及高速内存解码器和数据传输系统。

封装信息详细描述了不同封装选项的尺寸和特性,如SOIC、PDIP、TSSOP等。
SN74HCT138D 价格&库存

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