SN74LV05ADBRE4

Sample & Buy Product Folder Support & Community Tools & Software Technical Documents SN74LV05A SCLS391J – APRIL 1998 – REVISED DECEMBER 2014 SN74LV05A Hex Inverters With Open-Drain Outputs 1 Features 2 Applications • • • • • • • • 1 • • • • • 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2500-V Human-Body Model – 200-V Machine Model – 2000-V Charged-Device Model Electronic Points of Sale I/O Modules: Digital PLC/DCS Inputs Motor Drives and Controls Servers Network Switches Tests and Measurements 3 Description The SN74LV05A device contains six independent inverters designed for 2-V to 5.5-V VCC operation. This device performs the Boolean function Y = A. Device Information(1) PART NUMBER SN74LV05A PACKAGE BODY SIZE (NOM) TVSOP (14) 3.60 mm x 4.40 mm SOIC (14) 8.65 mm × 3.91 mm SOP (14) 10.30 mm x 5.30 mm SSOP (14) 6.20 mm x 5.30 mm TSSOP (14) 5.00 mm x 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 4 Simplified Schematic A Y 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN74LV05A SCLS391J – APRIL 1998 – REVISED DECEMBER 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Simplified Schematic............................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 1 2 3 4 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10 7.11 4 4 5 5 5 6 6 6 6 6 7 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Switching Characteristics, VCC = 2.5 V ± 0.2 V ........ Switching Characteristics, VCC = 3.3 V ± 0.3 V ........ Switching Characteristics, VCC = 5 V ± 0.5 V ........... Noise Characteristics ................................................ Operating Characteristics........................................ Typical Characteristics ............................................ Parameter Measurement Information .................. 7 9 Detailed Description .............................................. 8 9.1 9.2 9.3 9.4 Overview ................................................................... Functional Block Diagram ......................................... Feature Description................................................... Device Functional Modes.......................................... 8 8 8 8 10 Application and Implementation.......................... 9 10.1 Application Information............................................ 9 10.2 Typical Application ................................................. 9 11 Power Supply Recommendations ..................... 10 12 Layout................................................................... 11 12.1 Layout Guidelines ................................................. 11 12.2 Layout Example .................................................... 11 13 Device and Documentation Support ................. 11 13.1 13.2 13.3 13.4 Related Links ........................................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 11 11 11 11 14 Mechanical, Packaging, and Orderable Information ........................................................... 11 5 Revision History Changes from Revision I (April 2005) to Revision J Page • Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table, Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1 • Deleted Ordering Information table. ....................................................................................................................................... 1 • MAX operating temperature to 125°C in Recommended Operating Conditions table. .......................................................... 5 2 Submit Documentation Feedback Copyright © 1998–2014, Texas Instruments Incorporated Product Folder Links: SN74LV05A SN74LV05A www.ti.com SCLS391J – APRIL 1998 – REVISED DECEMBER 2014 6 Pin Configuration and Functions SN74LV05A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) 1A 1Y 2A 2Y 3A 3Y GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 6A 6Y 5A 5Y 4A 4Y Pin Functions PIN NO. NAME TYPE DESCRIPTION 1 1A I 1A Input 2 1Y O 1Y Output 3 2A I 2A Input 4 2Y O 2Y Output 5 3A I 3A Input 6 3Y O 3Y Output 7 GND — Ground Pin 8 4Y O 4Y Output 9 4A I 4A Input 10 5Y O 5Y Output 11 5A I 5A Input 12 6Y O 6Y Output 6A Input 13 6A I 14 VCC — Power Pin Submit Documentation Feedback Copyright © 1998–2014, Texas Instruments Incorporated Product Folder Links: SN74LV05A 3 SN74LV05A SCLS391J – APRIL 1998 – REVISED DECEMBER 2014 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) VCC MIN MAX Supply voltage range –0.5 7 UNIT V (2) VI Input voltage range –0.5 7 V VO Voltage range applied to any output in the high-impedance or power-off state (2) –0.5 7 V VO Output voltage range (2) (3) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –20 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current VO = 0 to VCC ±25 mA ±50 mA 150 °C Continuous current through VCC or GND Tstg (1) (2) (3) Storage temperature range –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. This value is limited to 5.5-V maximum. 7.2 ESD Ratings VALUE V(ESD) (1) (2) 4 Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) 2500 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) 2000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Submit Documentation Feedback Copyright © 1998–2014, Texas Instruments Incorporated Product Folder Links: SN74LV05A SN74LV05A www.ti.com SCLS391J – APRIL 1998 – REVISED DECEMBER 2014 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) (1) VCC Supply voltage VCC = 2 V VIH High-level input voltage MIN MAX 2 5.5 Low-level input voltage VI Input voltage VO Output voltage VCC = 2.3 V to 2.7 V VCC × 0.7 VCC = 3 V to 3.6 V VCC × 0.7 VCC = 4.5 V to 5.5 V VCC × 0.7 V 0.5 VCC = 2.3 V to 2.7 V VCC × 0.3 VCC = 3 V to 3.6 V VCC × 0.3 VCC = 4.5 V to 5.5 V Low-level output current Δt/Δv Input transition rise or fall rate TA Operating free-air temperature VCC × 0.3 5.5 0 5.5 V 50 µA VCC = 2.3 V to 2.7 V 2 VCC = 3 V to 3.6 V 6 VCC = 4.5 V to 5.5 V 12 VCC = 2.3 V to 2.7 V 200 VCC = 3 V to 3.6 V 100 VCC = 4.5 V to 5.5 V (1) V 0 VCC = 2 V IOL V 1.5 VCC = 2 V VIL UNIT V mA ns/V 20 –40 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs (SCBA004). 7.4 Thermal Information SN74LV05A THERMAL METRIC (1) D DB DGV NS PW UNIT 14 PINS RθJA Junction-to-ambient thermal resistance 94.9 107.4 130.4 91.4 122.6 RθJC(top) Junction-to-case (top) thermal resistance 56.3 59.9 53.4 49.0 51.3 RθJB Junction-to-board thermal resistance 49.2 54.7 63.5 50.2 64.4 ψJT Junction-to-top characterization parameter 20.7 21.0 7.3 15.3 6.8 ψJB Junction-to-board characterization parameter 48.9 51.2 62.8 49.8 63.8 (1) °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953). 7.5 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA = 25°C MIN TYP –40°C to 85°C MAX MIN –40°C to 125°C MAX MIN MAX UNIT IOL = 50 µA 2 V to 5.5 V 0.1 0.1 0.1 IOL = 2 mA 2.3 V 0.4 0.4 0.4 IOL = 6 mA 3V 0.44 0.44 0.44 IOL = 12 mA 4.5 V 0.55 0.55 0.6 II VI = 5.5 V or GND 0 to 5.5 V ±1 ±1 ±1 µA ICC VI = VCC or GND, 5.5 20 20 20 µA Ioff VI or VO = 0 to 5.5 V 0 5 5 5 µA Ci VI = VCC or GND VOL IO = 0 3.3 V 2.5 pF Submit Documentation Feedback Copyright © 1998–2014, Texas Instruments Incorporated Product Folder Links: SN74LV05A V 5 SN74LV05A SCLS391J – APRIL 1998 – REVISED DECEMBER 2014 www.ti.com 7.6 Switching Characteristics, VCC = 2.5 V ± 0.2 V over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3) PARAMETER tPLH tPHL tPLH tPHL (1) FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE A Y CL = 15 pF A Y CL = 50 pF TA = 25°C MIN TYP –40°C to 85°C –40°C to 125°C MAX MIN MAX MIN MAX 3.6 (1) 10.4 (1) 1 13 1 13.5 5.8 (1) 12.2 (1) 1 15 1 16.5 6.1 15.2 1 18 1 18.5 8.1 16.6 1 19.5 1 21 UNIT ns ns On products compliant to MIL-PRF-38535, this parameter is not production tested. 7.7 Switching Characteristics, VCC = 3.3 V ± 0.3 V over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3) PARAMETER tPLH tPHL tPLH tPHL (1) FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE A Y CL = 15 pF A Y CL = 50 pF TA = 25°C MIN –40°C to 85°C –40°C to 125°C TYP MAX MIN MAX MIN 2.9 (1) 7.1 (1) 1 8.5 1 9 (1) 7.1 (1) 1 8.5 1 9.5 4.7 10.6 1 12 1 12.5 5.8 10.6 1 12 1 13 4 MAX UNIT ns ns On products compliant to MIL-PRF-38535, this parameter is not production tested. 7.8 Switching Characteristics, VCC = 5 V ± 0.5 V over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3) PARAMETER tPLH tPHL tPLH tPHL (1) FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE A Y CL = 15 pF A Y CL = 50 pF TA = 25°C MIN –40°C to 85°C –40°C to 125°C TYP MAX MIN MAX MIN MAX 2.2 (1) 5.5 (1) 1 6.5 1 7 (1) (1) 1 6.5 1 7.5 3.4 7.5 1 8.5 1 9 4.2 7.5 1 8.5 1 9.5 2.9 5.5 UNIT ns ns On products compliant to MIL-PRF-38535, this parameter is not production tested. 7.9 Noise Characteristics (1) VCC = 3.3 V, CL = 50 pF, TA = 25°C SN74LV05A PARAMETER MIN TYP MAX UNIT VOL(P) Quiet output, maximum dynamic VOL 0.55 0.8 V VOL(V) Quiet output, minimum dynamic VOL –0.04 –0.8 V VOH(V) Quiet output, minimum dynamic VOH 3.12 VIH(D) High-level dynamic input voltage VIL(D) Low-level dynamic input voltage (1) V 2.31 V 0.97 V Characteristics are for surface-mount packages only. 7.10 Operating Characteristics TA = 25°C PARAMETER Cpd 6 Power dissipation capacitance TEST CONDITIONS CL = 50 pF, Submit Documentation Feedback f = 10 MHz VCC TYP 3.3 V 2.5 5V 3 UNIT pF Copyright © 1998–2014, Texas Instruments Incorporated Product Folder Links: SN74LV05A SN74LV05A www.ti.com SCLS391J – APRIL 1998 – REVISED DECEMBER 2014 7.11 Typical Characteristics 4 7 3.5 6 TPD in ns 5 2.5 TPD (ns) TPD (ns) 3 2 4 3 1.5 2 1 1 0.5 TPD in ns 0 -100 0 -50 0 50 Temperature (qC) 100 150 0 1 2 3 VCC D001 Figure 1. TPD vs Temperature 4 5 6 D001 Figure 2. TPD vs VCC at 25°C 8 Parameter Measurement Information VCC VCC RL = 1 kΩ From Output Under Test 50% VCC Input Test Point 50% VCC tPHL 0V tPLH ≈VCC CL (see Note A) 50% VCC Output LOAD CIRCUIT FOR OPEN-DRAIN OUTPUTS VOL + 0.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. C. The outputs are measured one at a time, with one input transition per measurement. Figure 3. Load Circuit and Voltage Waveforms Submit Documentation Feedback Copyright © 1998–2014, Texas Instruments Incorporated Product Folder Links: SN74LV05A 7 SN74LV05A SCLS391J – APRIL 1998 – REVISED DECEMBER 2014 www.ti.com 9 Detailed Description 9.1 Overview The SN74LV05A device contains six independent inverters designed for 2-V to 5.5-V VCC operation. This device performs the Boolean function Y = A. The open-drain outputs require pull-up resistors to perform correctly and can be connected to other open-drain outputs to implement active-low, wired-OR or active-high wired-AND functions. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. 9.2 Functional Block Diagram A Y Figure 4. Logic Diagram (Positive Logic) 9.3 Feature Description • • • Wide operating voltage range – Operates from 2 V to 5.5 V Allows down-voltage translation – Inputs accept voltages to 5.5 V Ioff feature – Allows voltages on the inputs and outputs when VCC is 0 V 9.4 Device Functional Modes Table 1. Function Table (Each Inverter) INPUT A 8 OUTPUT Y H L L H Submit Documentation Feedback Copyright © 1998–2014, Texas Instruments Incorporated Product Folder Links: SN74LV05A SN74LV05A www.ti.com SCLS391J – APRIL 1998 – REVISED DECEMBER 2014 10 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 10.1 Application Information SN74LV05A is a low-drive, open-drain CMOS device that can be used for a multitude of buffer type functions. The inputs are 5.5-V tolerant and the outputs are open-drain and 5.5-V tolerant, allowing it to translate up to 5.5 V or down to any other voltage between GND and 5.5 V. 10.2 Typical Application Basic LED Driver Buffer Function VPU VPU Wired OR μC or Logic μC or Logic μC or Logic LV05A LV05A μC or Logic LV05A Figure 5. Typical Application Schematic 10.2.1 Design Requirements This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads, so routing and load conditions should be considered to prevent ringing. 10.2.2 Detailed Design Procedure 1. Recommended Input Conditions – For rise time and fall time specifications, see Δt/ΔV in the Recommended Operating Conditions table. – For specified High and low levels, see VIH and VIL in the Recommended Operating Conditions table. – Inputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC. 2. Recommend Output Conditions – Load currents should not exceed 35 mA per output and 50 mA total for the part. Submit Documentation Feedback Copyright © 1998–2014, Texas Instruments Incorporated Product Folder Links: SN74LV05A 9 SN74LV05A SCLS391J – APRIL 1998 – REVISED DECEMBER 2014 www.ti.com Typical Application (continued) 10.2.3 Application Curves 3.5 VOUT input high VOUT input low 3 2.5 VCC 2 1.5 1 0.5 0 -0.5 0 0.5 1 1.5 2 VOUT 2.5 3 3.5 4 D001 Figure 6. Output at Power Up with 4k Pull-Up 3.3 V 11 Power Supply Recommendations The power supply can be any voltage between the MIN and MAX supply voltage rating located in the Recommended Operating Conditions table. Each VCC pin should have a good bypass capacitor to prevent power disturbance. For devices with a single supply, 0.1 μF is recommended. If there are multiple VCC pins, 0.01 μF or 0.022 μF is recommended for each power pin. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. A 0.1 μF and 1 μF are commonly used in parallel. The bypass capacitor should be installed as close to the power pin as possible for best results. 10 Submit Documentation Feedback Copyright © 1998–2014, Texas Instruments Incorporated Product Folder Links: SN74LV05A SN74LV05A www.ti.com SCLS391J – APRIL 1998 – REVISED DECEMBER 2014 12 Layout 12.1 Layout Guidelines When using multiple bit logic devices, inputs should not float. In many cases, functions or parts of functions of digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used, or when only 3 of the 4-buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified in Figure 7 are rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC, whichever makes more sense or is more convenient. It is acceptable to float outputs unless the part is a transceiver. 12.2 Layout Example Vcc Input Unused Input Output Output Unused Input Input Figure 7. Layout Diagram 13 Device and Documentation Support 13.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY SN74LV05A Click here Click here Click here Click here Click here 13.2 Trademarks All trademarks are the property of their respective owners. 13.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 13.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 1998–2014, Texas Instruments Incorporated Product Folder Links: SN74LV05A 11 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74LV05AD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV05A Samples SN74LV05ADGVR ACTIVE TVSOP DGV 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV05A Samples SN74LV05ADR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV05A Samples SN74LV05ANSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 74LV05A Samples SN74LV05APW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV05A Samples SN74LV05APWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV05A Samples SN74LV05APWT ACTIVE TSSOP PW 14 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV05A Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of