SN74LV07APWRG4

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents SN74LV07A SCES337K – MAY 2000 – REVISED OCTOBER 2014 SN74LV07A Hex Buffers/Drivers With Open-Drain Outputs 1 Features 2 Applications • • • • • 1 • • • • • 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C Outputs are Disabled During Power Up and Power Down With Inputs Tied to VCC Support Mixed-Mode Voltage Operation on All Ports Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model – 200-V Machine Model – 1000-V Charged-Device Model Servers Telecom Infrastructures TV Set-Top Boxes 3 Description These hex buffers/drivers are designed for 2-V to 5.5-V VCC operation. The SN74LV07A device performs the Boolean function Y = A in positive logic. Device Information(1) PART NUMBER PACKAGE SN74LV07A BODY SIZE (NOM) TVSOP (14) 3.60 mm x 4.40 mm SOIC (14) 8.65 mm × 3.91 mm SOP (14) 10.30 mm x 5.30 mm SSOP (14) 6.20 mm x 5.30 mm TSSOP (14) 5.00 mm x 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 4 Simplified Schematic A Y A Y A Y A Y A Y A Y 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN74LV07A SCES337K – MAY 2000 – REVISED OCTOBER 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Simplified Schematic............................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 1 2 3 4 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10 7.11 4 4 4 5 5 5 5 6 6 6 6 Absolute Maximum Ratings ...................................... Handling Ratings....................................................... Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Switching Characteristics, VCC = 2.5 V ± 0.2 V ........ Switching Characteristics, VCC = 3.3 V ± 0.3 V ........ Switching Characteristics, VCC = 5 V ± 0.5 V ........... Noise Characteristics ................................................ Operating Characteristics........................................ Typical Characteristics ............................................ Parameter Measurement Information .................. 7 9 Detailed Description .............................................. 7 9.1 9.2 9.3 9.4 Overview ................................................................... Functional Block Diagram ......................................... Feature Description................................................... Device Functional Modes.......................................... 7 7 7 7 10 Application and Implementation.......................... 8 10.1 Application Information............................................ 8 10.2 Typical Application ................................................. 8 11 Power Supply Recommendations ....................... 9 12 Layout..................................................................... 9 12.1 Layout Guidelines ................................................... 9 12.2 Layout Example ...................................................... 9 13 Device and Documentation Support ................. 10 13.1 13.2 13.3 13.4 Related Links ........................................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 10 10 10 10 14 Mechanical, Packaging, and Orderable Information ........................................................... 10 5 Revision History Changes from Revision J (October 2010) to Revision K Page • Updated document to new TI data sheet format. ................................................................................................................... 1 • Deleted Ordering Information table. ....................................................................................................................................... 1 • Added Handling Ratings table. ............................................................................................................................................... 4 • Changed MAX operating temperature to 125°C in Recommended Operating Conditions table. ......................................... 4 • Added Thermal Information table. .......................................................................................................................................... 5 • Added Typical Characteristics. ............................................................................................................................................... 6 • Added Detailed Description section........................................................................................................................................ 7 • Added Application and Implementation section...................................................................................................................... 8 • Added Power Supply Recommendations and Layout sections.............................................................................................. 9 2 Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: SN74LV07A SN74LV07A www.ti.com SCES337K – MAY 2000 – REVISED OCTOBER 2014 6 Pin Configuration and Functions SN74LV07A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) 1A 1Y 2A 2Y 3A 3Y GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 6A 6Y 5A 5Y 4A 4Y Pin Functions PIN NAME NO. I/O DESCRIPTION 1A 1 I 1A Input 1Y 2 O 1Y Output 2A 3 I 2A Input 2Y 4 O 2Y Output 3A 5 I 3A Input 3Y 6 O 3Y Output 4A 9 I 4A Input 4Y 8 O 4Y Output 5A 11 I 5A Input 5Y 10 O 5Y Output 6A 13 I 6A Input 6Y 12 O 6Y Output GND 7 — Ground Pin VCC 14 — Power Pin Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: SN74LV07A 3 SN74LV07A SCES337K – MAY 2000 – REVISED OCTOBER 2014 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCC MIN MAX Supply voltage range –0.5 7 UNIT V (2) –0.5 7 V –0.5 7 VI Input voltage range VO Voltage range applied to any output in the high-impedance or power-off state (2) IIK Input clamp current VI < 0 –20 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current VO = 0 to VCC –35 mA ±50 mA Continuous current through VCC or GND (1) (2) V Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 7.2 Handling Ratings Tstg Storage temperature range V(ESD) (1) (2) Electrostatic discharge MIN MAX UNIT °C –65 150 Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) 0 2000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) 0 1000 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) (1) VCC Supply voltage VCC = 2 V VIH High level input voltage MIN MAX 2 5.5 Low level input voltage V 1.5 VCC = 2.3 V to 2.7 V VCC × 0.7 VCC = 3 V to 3.6 V VCC × 0.7 VCC = 4.5 V to 5.5 V VCC × 0.7 VCC = 2 V VIL UNIT V 0.5 VCC = 2.3 V to 2.7 V VCC × 0.3 VCC = 3 V to 3.6 V VCC × 0.3 VCC = 4.5 V to 5.5 V VCC × 0.3 V VI Input voltage 0 5.5 VO Output voltage 0 5.5 V 50 µA VCC = 2 V IOL Low level output current Δt/Δv Input transition rise and fall rate VCC = 2.3 V to 2.7 V 2 VCC = 3 V to 3.6 V 8 VCC = 4.5 V to 5.5 V 16 VCC = 2.3 V to 2.7 V 200 VCC = 3 V to 3.6 V 100 VCC = 4.5 V to 5.5 V TA (1) 4 Operating free-air temperature V mA ns/V 20 –40 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs (SCBA004). Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: SN74LV07A SN74LV07A www.ti.com SCES337K – MAY 2000 – REVISED OCTOBER 2014 7.4 Thermal Information SN74LV07A THERMAL METRIC (1) D DB DGV NS PW 14 PINS 14 PINS 14 PINS 14 PINS 14 PINS UNIT RθJA Junction-to-ambient thermal resistance 100.6 112.5 135.2 95.4 128.7 RθJC(top) Junction-to-case (top) thermal resistance 51.8 65.0 57.9 52.9 57.2 RθJB Junction-to-board thermal resistance 54.9 59.9 68.3 51.2 70.7 ψJT Junction-to-top characterization parameter 25.0 25.0 9.2 17.9 9.3 ψJB Junction-to-board characterization parameter 54.7 59.3 67.6 53.8 70.0 (1) °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953). 7.5 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN VOL II –40°C to 125°C SN74LV07A SN74LV07A VCC TYP MAX MIN TYP UNIT MAX IOL = 50 µA 2 V to 5.5 V 0.1 IOL = 2 mA 2.3 V 0.4 0.4 IOL = 8 mA 3V 0.44 0.44 IOL = 16 mA 4.5 V 0.55 0.55 VI = 5.5 V or GND 0 to 5.5 V 0.1 V ±1 ±1 µA IOH VI = VIH, VOH = VCC 5.5 V ±2.5 ±2.5 µA ICC VI = VCC or GND, IO = 0 5.5 V 20 20 µA Ioff VI or VO = 0 to 5.5 V 0 5 5 µA Ci VI = VCC or GND 3.3 V 1.6 1.6 pF 7.6 Switching Characteristics, VCC = 2.5 V ± 0.2 V over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3) FROM (INPUT) TO (OUTPUT) tPLH A Y tPHL A Y tPLH A Y tPHL A Y PARAMETER (1) LOAD CAPACITANCE TA = 25°C MIN CL = 15 pF CL = 50 pF –40°C to 125°C SN74LV07A SN74LV07A UNIT TYP MAX MIN MAX MIN MAX 6.6 (1) 10.4 (1) 1 13 1 14 7.5 (1) 10.4 (1) 1 13 1 14 11.1 15.2 1 18 1 19 9.6 15.2 1 18 1 19 ns ns On products compliant to MIL-PRF-38535, this parameter is not production tested. 7.7 Switching Characteristics, VCC = 3.3 V ± 0.3 V over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3) PARAMETER tPLH (1) FROM (INPUT) TO (OUTPUT) A Y tPHL A Y tPLH A Y tPHL A Y LOAD CAPACITANCE CL = 15 pF CL = 50 pF TA = 25°C MIN SN74LV07A –40°C to 125°C SN74LV07A UNIT TYP MAX MIN MAX MIN MAX 5 (1) 7.1 (1) 1 8.5 1 9.5 (1) (1) 1 8.5 1 9.5 8.2 10.6 1 12 1 13 6.6 10.6 1 12 1 13 5 7.1 ns ns On products compliant to MIL-PRF-38535, this parameter is not production tested. Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: SN74LV07A 5 SN74LV07A SCES337K – MAY 2000 – REVISED OCTOBER 2014 www.ti.com 7.8 Switching Characteristics, VCC = 5 V ± 0.5 V operating free-air temperature range (unless otherwise noted) (see Figure 3) PARAMETER tPLH (1) FROM (INPUT) TO (OUTPUT) A Y tPHL A Y tPLH A Y tPHL A Y LOAD CAPACITANCE TA = 25°C MIN CL = 15 pF UNIT TYP MAX MIN MAX MIN MAX 3.8 5.5 (1) 1 6.5 1 7.2 (1) 5.5 (1) 1 6.5 1 7.2 5.7 7.5 1 8.5 1 9.2 4.5 7.5 1 8.5 1 9.2 3.4 CL = 50 pF –40°C to 125°C SN74LV07A SN74LV07A ns ns On products compliant to MIL-PRF-38535, this parameter is not production tested. 7.9 Noise Characteristics (1) VCC = 3.3 V, CL = 50 pF, TA = 25°C TYP MAX VOL(P) Quiet output, maximum dynamic VOL PARAMETER 0.4 0.8 V VOL(V) Quiet output, minimum dynamic VOL –0.1 –0.8 V VOH(V) Quiet output, minimum dynamic VOH 3.2 VIH(D) High-level dynamic input voltage VIL(D) Low-level dynamic input voltage (1) MIN UNIT V 2.31 V 0.99 V VCC TYP UNIT 3.3 V 2.9 5V 5.3 Characteristics are for surface-mount packages only. 7.10 Operating Characteristics TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance CL = 50 pF, f = 10 MHz pF 7.11 Typical Characteristics 7 5.4 6 5.3 5 5.2 TPD (ns) TPD (ns) TPD in ns 4 3 5.1 5 2 4.9 1 4.8 0 4.7 -100 TPD in ns 0 1 2 3 VCC 4 5 6 D001 Figure 1. TPD vs VCC 6 -50 0 50 Temperature (qC) 100 150 D001 Figure 2. TPD vs Temperature at 3.3 V Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: SN74LV07A SN74LV07A www.ti.com SCES337K – MAY 2000 – REVISED OCTOBER 2014 8 Parameter Measurement Information VCC VCC RL = 1 kΩ From Output Under Test 50% VCC Input Test Point 50% VCC tPHL CL (see Note A) 0V tPLH ≈VCC 50% VCC Output VOL + 0.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES LOAD CIRCUIT FOR OPEN-DRAIN OUTPUTS A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. C. The outputs are measured one at a time, with one input transition per measurement. Figure 3. Load Circuit and Voltage Waveforms 9 Detailed Description 9.1 Overview The outputs of the SN74LV07A device are open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 16 mA at 5-V VCC. Inputs can be driven from 2.5-V, 3.3-V, or 5-V (CMOS) devices. This feature allows the use of the SN74LV07A device as a translator in a mixed-system environment. This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the outputs, thus preventing a damaging current backflow through the device when it is powered down. 9.2 Functional Block Diagram A Y Figure 4. Logic Diagram, Each Buffer/Driver (Positive Logic) 9.3 Feature Description • • • Wide operating voltage range – Operates from 2 V to 5.5 V Allows up or down voltage translation – Inputs and outputs accept voltages to 5.5 V Ioff feature – Allows voltages on the inputs and outputs when VCC is 0 V 9.4 Device Functional Modes Table 1. Function Table (Each Buffer/Driver) INPUT A OUTPUT Y H H L L Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: SN74LV07A 7 SN74LV07A SCES337K – MAY 2000 – REVISED OCTOBER 2014 www.ti.com 10 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 10.1 Application Information The SN74LV07A device is a low drive, open-drain CMOS device that can be used for a multitude of buffer type functions. The inputs are 5.5-V tolerant. The outputs are open drain and 5.5-V tolerant; thus, allowing the device to translate up to 5.5 V or down to any other voltage between GND and 5.5 V. 10.2 Typical Application Buffer Function Basic LED Driver VPU VPU Wired OR uC or Logic uC or Logic LV07A uC or Logic LV07A uC or Logic LV07A Figure 5. Typical Application Schematic 10.2.1 Design Requirements This device uses CMOS technology and is open drain, so it has low output drive only. Care should be taken to avoid bus contention, because it can drive currents that would exceed maximum limits. Parallel output drive can create fast edges into light loads, so routing and load conditions should be considered to prevent ringing. 10.2.2 Detailed Design Procedure 1. Recommended Input Conditions: – For rise time and fall time specifications, see Δt/ΔV in the Recommended Operating Conditions table. – For specified high and low levels, see VIH and VIL in the Recommended Operating Conditions table. – Inputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC. 2. Recommended Output Conditions: – Load currents should not exceed 35 mA per output and 50 mA total for the part. 8 Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: SN74LV07A SN74LV07A www.ti.com SCES337K – MAY 2000 – REVISED OCTOBER 2014 Typical Application (continued) 10.2.3 Application Curves 3.5 3 2.5 VOUT (V) 2 VOUT input high 1.5 VOUT input low 1 0.5 0 0 1 2 3 4 -0.5 VCC (V) Figure 6. Output During Power Up with 4 k Pullup at 3.3 V 11 Power Supply Recommendations The power supply can be any voltage between the MIN and MAX supply voltage rating located in the Recommended Operating Conditions. Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single supply, 0.1 μF is recommended. If there are multiple VCC terminals then 0.01 μF or 0.022 μF is recommended for each power terminal. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. A 0.1 μF and 1 μF are commonly used in parallel. The bypass capacitor should be installed as close to the power terminal as possible for best results. 12 Layout 12.1 Layout Guidelines When using multiple bit logic devices, inputs should not float. In many cases, functions or parts of functions of digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used, or when only 3 of the 4-buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified in Figure 7 are rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC, whichever makes more sense or is more convenient. It is acceptable to float outputs unless the part is a transceiver. 12.2 Layout Example Vcc Unused Input Input Output Unused Input Output Input Figure 7. Layout Diagram Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: SN74LV07A 9 SN74LV07A SCES337K – MAY 2000 – REVISED OCTOBER 2014 www.ti.com 13 Device and Documentation Support 13.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY SN74LV07A Click here Click here Click here Click here Click here 13.2 Trademarks All trademarks are the property of their respective owners. 13.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 13.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 10 Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated Product Folder Links: SN74LV07A PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74LV07AD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV07A Samples SN74LV07ADBR ACTIVE SSOP DB 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV07A Samples SN74LV07ADGVR ACTIVE TVSOP DGV 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV07A Samples SN74LV07ADR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV07A Samples SN74LV07ADRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV07A Samples SN74LV07ANS ACTIVE SO NS 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 74LV07A Samples SN74LV07ANSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 74LV07A Samples SN74LV07APW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV07A Samples SN74LV07APWG4 ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV07A Samples SN74LV07APWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 LV07A Samples SN74LV07APWRG3 ACTIVE TSSOP PW 14 2000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 LV07A Samples SN74LV07APWRG4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV07A Samples SN74LV07APWT ACTIVE TSSOP PW 14 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV07A Samples SN74LV07APWTG4 ACTIVE TSSOP PW 14 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 LV07A Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of