SN74LV4053ATDRQ1

SN74LV4053A-Q1 SCLS521C – AUGUST 2003 – REVISED JUNE 2011 www.ti.com TRIPLE 2-CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER Check for Samples: SN74LV4053A-Q1 FEATURES 1 • • • • • • • • D OR PW PACKAGE (TOP VIEW) Qualified for Automotive Applications ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) 2-V to 5.5-V VCC Operation Supports Mixed-Mode Voltage Operation on All Ports High On-Off Output-Voltage Ratio Low Crosstalk Between Switches Individual Switch Controls Extremely Low Input Current 2Y1 2Y0 3Y1 3-COM 3Y0 INH GND GND VCC 2-COM 1-COM 1Y1 1Y0 A B C DESCRIPTION This triple 2-channel CMOS analog multiplexer/demultiplexer is designed for 2-V to 5.5-V VCC operation. The SN74LV4053A handles both analog and digital signals. Each channel permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. ORDERING INFORMATION (1) PACKAGE (2) TA –40°C to 105°C –40°C to 125°C (1) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING SOIC − D Tape and reel SN74LV4053ATDRQ1 L4053AQ TSSOP – PW Tape and reel SN74LV4053ATPWRQ1 L4053AQ TSSOP – PW Tape and reel SN74LV4053AQPWRQ1 4053AQ1 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. FUNCTION TABLE INPUTS A ON CHANNEL L L 1Y0, 2Y0, 3Y0 L H 1Y1, 2Y0, 3Y0 H L 1Y0, 2Y1, 3Y0 H H 1Y1, 2Y1, 3Y0 L L 1Y0, 2Y0, 3Y1 H L H 1Y1, 2Y0, 3Y1 H H L 1Y0, 2Y1, 3Y1 L H H H 1Y1, 2Y1, 3Y1 H X X X None INH C B L L L L L L L L L H L L 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2011, Texas Instruments Incorporated SN74LV4053A-Q1 SCLS521C – AUGUST 2003 – REVISED JUNE 2011 www.ti.com LOGIC DIAGRAM (POSITIVE LOGIC) 15 14 12 2-COM 1-COM 1Y0 13 1Y1 2 1 5 3 4 2 2Y0 2Y1 3Y0 3Y1 3-COM Copyright © 2003–2011, Texas Instruments Incorporated SN74LV4053A-Q1 SCLS521C – AUGUST 2003 – REVISED JUNE 2011 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VCC –0.5 V to 7 V Supply voltage range (2) –0.5 V to 7 V VI Input voltage range VIO Switch I/O voltage range (2) IIK Input clamp current VI < 0 –20 mA IIOK I/O diode current VIO < 0 –50 mA IT Switch through current VIO = 0 to VCC ±25 mA (3) –0.5 V to VCC + 0.5 V ±50 mA Continuous current through VCC or GND θJA Package thermal impedance (4) Tstg Storage temperature range (1) (2) (3) (4) D package 73°C/W PW package 108°C/W –65°C to 150°C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. This value is limited to 5.5 V maximum. The package thermal impedance is calculated in accordance with JESD 51-7. RECOMMENDED OPERATING CONDITIONS (1) VCC Supply voltage High-level input voltage, control inputs MAX (2) 5.5 2 VCC = 2 V VIH MIN Low-level input voltage, control inputs VI Control input voltage VIO Input/output voltage VCC = 2.3 V to 2.7 V VCC × 0.7 VCC = 3 V to 3.6 V VCC × 0.7 VCC = 4.5 V to 5.5 V VCC × 0.7 Input transition rise or fall rate 0.5 VCC × 0.3 VCC = 3 V to 3.6 V VCC × 0.3 VCC × 0.3 5.5 V 0 VCC V VCC = 2.3 V to 2.7 V 200 VCC = 3 V to 3.6 V 100 TA Operating free-air temperature SN74LV4053ATDRQ1, SN74LV4053ATPWRQ1 TA Operating free-air temperature SN74LV4053AQPWRQ1 (2) V 0 VCC = 4.5 V to 5.5 V (1) V VCC = 2.3 V to 2.7 V VCC = 4.5 V to 5.5 V Δt/Δv V 1.5 VCC = 2 V VIL UNIT ns/V 20 –40 105 –40 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. It is recommended that only digital signals be transmitted at these low supply voltages. Copyright © 2003–2011, Texas Instruments Incorporated 3 SN74LV4053A-Q1 SCLS521C – AUGUST 2003 – REVISED JUNE 2011 www.ti.com ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA = 25°C MIN ron ron(p) IT = 2 mA, VI = VCC or GND, VINH = VIL (see Figure 1) On-state switch resistance IT = 2 mA, VI = VCC or GND, VINH = VIL Peak on-state resistance Δron Difference in on-state resistance between switch IT = 2 mA, VI = VCC or GND, VINH = VIL II Control input current VI = 5.5 V or GND IS(off) TYP MAX TA = -40 to 105°C TA = -40 to 125°C MIN MIN MAX UNIT MAX 2.3 V 41 180 225 225 3V 30 150 190 190 4.5 V 23 75 100 100 2.3 V 139 500 600 600 3V 63 180 225 225 4.5 V 35 100 125 125 2.3 V 2 30 40 40 3V 1.6 20 30 30 4.5 V 1.3 Ω Ω Ω 15 20 20 0 V to 5.5 V ±0.1 ±1 ±2 μA Off-state switch leakage current VI = VCC and VO = GND, or VI = GND and VO = VCC, VINH = VIH (see Figure 2) 5.5 V ±0.1 ±1 ±2 μA IS(on) On-state switch leakage current VI = VCC or GND, VINH = VIL (see Figure 3) 5.5 V ±0.1 ±1 ±2 μA ICC Supply current VI = VCC or GND 5.5 V 20 40 μA CIC Control input capacitance f = 10 MHz 3.3 V 2 pF CIS Common terminal capacitance 3.3 V 8.2 pF COS Switch terminal capacitance 3.3 V 5.6 pF CF Feedthrough capacitance 0.5 pF SWITCHING CHARACTERISTICS VCC = 3.3 V ± 0.3 V, over recommended operating free-air temperature range (unless otherwise noted) tPLH tPHL tPZH tPZL tPHZ tPLZ 4 TA = -40 to 105°C TA = 25°C TA = -40 to 125°C FROM (INPUT) TO (OUTPUT TEST CONDITIONS Propagatio n delay time COM or Yn Yn or COM CL = 50 pF (see Figure 4) 2.9 9 12 14 ns Enable delay time INH COM or Yn CL = 50 pF (see Figure 5) 6.1 20 25 25 ns Disable delay time INH COM or Yn CL = 50 pF (see Figure 5) 8.9 20 25 25 ns PARAMETER MIN TYP MAX MIN MAX MIN UNIT MAX Copyright © 2003–2011, Texas Instruments Incorporated SN74LV4053A-Q1 SCLS521C – AUGUST 2003 – REVISED JUNE 2011 www.ti.com SWITCHING CHARACTERISTICS VCC = 5 V ± 0.5 V, over recommended operating free-air temperature range (unless otherwise noted) tPLH tPHL tPZH tPZL tPHZ tPLZ TA = -40 to 105°C TA = 25°C TA = -40 to 125°C FROM (INPUT) TO (OUTPUT TEST CONDITIONS COM or Yn Yn or COM CL = 50 pF (see Figure 4) 1.8 6 8 10 ns Enable delay time INH COM or Yn CL = 50 pF (see Figure 5) 4.3 14 18 18 ns Disable delay time INH COM or Yn CL = 50 pF (see Figure 5) 6.3 14 18 18 ns PARAMETER Propagation delay time MIN TYP MAX MIN MAX MIN UNIT MAX ANALOG SWITCH CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER Frequency response (switch on) Crosstalk (between any switches)) Crosstalk (control input to signal output) Feedthrough attenuation (switch off) Sine-wave distortion (1) (2) FROM (INPUT) COM or Yn COM or Yn INH COM or Yn COM or Yn TO (OUTPUT) Yn or COM Yn or COM COM or Yn Yn or COM Yn or COM TEST CONDITIONS VCC TA = 25°C MIN TYP CL = 50 pF, RL = 600 Ω, fin = 1 MHz (sine wave) (1) (see Figure 6) 2.3 V 30 3V 35 4.5 V 50 CL = 50 pF, RL = 600 Ω, fin = 1 MHz (sine wave) (see Figure 7 ) 2.3 V –45 3V –45 4.5 V –45 CL = 50 pF, RL = 600 Ω, fin = 1 MHz (square wave) (see Figure 8) 2.3 V 20 3V 35 4.5 V 65 CL = 50 pF, RL = 600 Ω, fin = 1 MHz (2) (see Figure 9) 2.3 V –45 CL = 50 pF, RL = 10 kΩ, fin = 1 kHz (sine wave) (see Figure 10) VI = 2 Vp-p VI = 2.5 Vp-p VI = 4 Vp-p 3V –45 4.5 V –45 2.3 V 0.1 3V 0.1 4.5 V 0.1 MAX UNIT MHz dB mV dB % Adjust fin voltage to obtain 0-dBm output. Increase fin frequency until dB meter reads −3 dB. Adjust fin voltage to obtain 0-dBm input. OPERATING CHARACTERISTICS VCC = 3.3 V, TA = 25°C (unless otherwise noted) PARAMETER Cpd Power dissipation capacitance Copyright © 2003–2011, Texas Instruments Incorporated TEST CONDITIONS CL = 50 pF, f = 10 MHz TYP UNIT 5.3 pF 5 SN74LV4053A-Q1 SCLS521C – AUGUST 2003 – REVISED JUNE 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION = x W – Figure 1. On-State Resistance Test Circuit Figure 2. Off-State Switch Leakage-Current Test Circuit Figure 3. On-State Switch Leakage-Current Test Circuit W Figure 4. Propagation Delay Time, Signal Input to Signal Output 6 Copyright © 2003–2011, Texas Instruments Incorporated SN74LV4053A-Q1 SCLS521C – AUGUST 2003 – REVISED JUNE 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) W W ≈ ≈ ≈ – ≈ Figure 5. Switching Time (tPZL, tPLZ, tPZH, tPHZ), Control to Signal Output m W Figure 6. Frequency Response (Switch On) Copyright © 2003–2011, Texas Instruments Incorporated 7 SN74LV4053A-Q1 SCLS521C – AUGUST 2003 – REVISED JUNE 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) m 600 W W (OFF) 600 W Figure 7. Crosstalk Between Any Two Switches W W Figure 8. Crosstalk Between Control Input and Switch Output m W W Figure 9. Feedthrough Attenuation (Switch Off) 8 Copyright © 2003–2011, Texas Instruments Incorporated SN74LV4053A-Q1 SCLS521C – AUGUST 2003 – REVISED JUNE 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) m m W Figure 10. Sine-Wave Distortion Copyright © 2003–2011, Texas Instruments Incorporated 9 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CLV4053ATPWRG4Q1 ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 L4053AQ SN74LV4053AQPWRQ1 ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 4053AQ1 SN74LV4053ATDRQ1 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 L4053AQ SN74LV4053ATPWRQ1 ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 L4053AQ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of