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SN74LVC157AQPWRQ1

SN74LVC157AQPWRQ1

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    TSSOP16

  • 描述:

    IC MULTIPLEXER 4 X 2:1 16TSSOP

  • 数据手册
  • 价格&库存
SN74LVC157AQPWRQ1 数据手册
SN74LVC157A-Q1 www.ti.com ............................................................................................................................................... SCAS716C – SEPTEMBER 2003 – REVISED APRIL 2008 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER FEATURES 1 • • • • • • • D OR PW PACKAGE (TOP VIEW) Qualified for Automotive Applications ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Operates From 2 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 5.4 ns at 3.3 V Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C A /B 1A 1B 1Y 2A 2B 2Y GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC G 4A 4B 4Y 3A 3B 3Y DESCRIPTION/ORDERING INFORMATION The SN74LVC157A quadruple 2-line to 1-line data selector/multiplexer is designed for 2.7-V to 3.6-V VCC operation. The device features a common strobe (G) input. When G is high, all outputs are low. When G is low, a 4-bit word is selected from one of two sources and is routed to the four outputs. The device provides true data. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. ORDERING INFORMATION (1) PACKAGE (2) TA –40°C to 125°C (1) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING SOIC – D Tape and reel SN74LVC157AQDRQ1 L157AQ1 TSSOP – PW Tape and reel SN74LVC157AQPWRQ1 L157AQ1 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. FUNCTION TABLE INPUTS G A/B A B OUTPUT Y H X X X L L L L X L L L H X H L H X L L L H X H H 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2008, Texas Instruments Incorporated SN74LVC157A-Q1 SCAS716C – SEPTEMBER 2003 – REVISED APRIL 2008 ............................................................................................................................................... www.ti.com LOGIC DIAGRAM (POSITIVE LOGIC) 1A 2 4 1B 2A 3 5 7 2B 3A 6 4A 10 G A/B 3Y 14 12 4B 2Y 11 9 3B 1Y 13 4Y 15 1 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V VO Output voltage range (2) (3) –0.5 VCC + 0.5 IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA Continuous current through VCC or GND θJA Package thermal impedance (4) Tstg Storage temperature range (1) (2) (3) (4) 2 D package 73 PW package 108 –65 150 V °C/W °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the recommended operating conditions table. The package thermal impedance is calculated in accordance with JESD 51. Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC157A-Q1 SN74LVC157A-Q1 www.ti.com ............................................................................................................................................... SCAS716C – SEPTEMBER 2003 – REVISED APRIL 2008 Recommended Operating Conditions (1) MIN MAX 2 3.6 Operating UNIT VCC Supply voltage VIH High-level input voltage VCC = 2.7 V to 3.6 V VIL Low-level input voltage VCC = 2.7 V to 3.6 V 0.8 V VI Input voltage 0 5.5 V VO Output voltage 0 VCC V IOH High-level output current IOL Low-level output current Δt/Δv Input transition rise or fall rate TA Operating free-air temperature (1) Data retention only V 1.5 2 V VCC = 2.7 V –12 VCC = 3 V –24 VCC = 2.7 V 12 VCC = 3 V 24 –40 mA mA 10 ns/V 125 C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC IOH = –100 µA VOH 2.7 V to 3.6 V All inputs 2.2 2.4 IOH = –24 mA 3V 2.2 IOL = 100 µA 2.7 V to 3.6 V 0.2 IOL = 12 mA 2.7 V 0.4 3V 0.55 VI = VCC or GND, IO = 0 ΔICC One input at VCC – 0.6 V, Other inputs at VCC or GND V V 3.6 V ±5 µA 3.6 V 10 µA 2.7 V to 3.6 V 500 µA VI = 5.5 V or GND ICC UNIT VCC – 0.2 3V IOL = 24 mA II MAX 2.7 V IOH = –12 mA VOL MIN Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) FROM (INPUT) PARAMETER TO (OUTPUT) VCC = 2.7 V MIN MAX MIN MAX 6.2 0.8 5.4 8.2 0.8 7 7.8 0.8 6.5 A or B tpd A/B VCC = 3.3 V ± 0.3 V Y G UNIT ns Operating Characteristics TA = 25°C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS VCC = 2.5 V VCC = 3.3 V TYP TYP f = 10 MHz 15 16 Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC157A-Q1 Submit Documentation Feedback UNIT pF 3 SN74LVC157A-Q1 SCAS716C – SEPTEMBER 2003 – REVISED APRIL 2008 ............................................................................................................................................... www.ti.com PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 2.7 V 3.3 V ± 0.3 V VI tr/tf 2.7 V 2.7 V ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ 1.5 V 1.5 V 6V 6V 50 pF 50 pF 500 Ω 500 Ω 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH VM VM VOL tPHL VM VM 0V Output Waveform 1 S1 at VLOAD (see Note B) tPLH tPLZ VLOAD/2 VM tPZH VOH Output VM tPZL tPHL VOH Output VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + V∆ VOL tPHZ VM VOH - V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 4 Submit Documentation Feedback Copyright © 2003–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC157A-Q1 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) CLVC157AQPWRG4Q1 ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 L157AQ1 SN74LVC157AQDRG4Q1 ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 L157AQ1 SN74LVC157AQPWRQ1 ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 L157AQ1 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
SN74LVC157AQPWRQ1 价格&库存

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