SN74LVC543ADWR

SN74LVC543A OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS299H – JANUARY 1993 – REVISED MARCH 2005 FEATURES • • • • • • • • DB, DW, OR PW PACKAGE (TOP VIEW) Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 7 ns at 3.3 V Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC) Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 LEBA OEBA A1 A2 A3 A4 A5 A6 A7 A8 CEAB GND 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC CEBA B1 B2 B3 B4 B5 B6 B7 B8 LEAB OEAB DESCRIPTION/ORDERING INFORMATION This octal registered transceiver is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC543A contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow. The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB places the A latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow for B to A is similar to that of A to B, but uses CEBA, LEBA, and OEBA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. ORDERING INFORMATION PACKAGE (1) TA SOIC – DW –40°C to 85°C SSOP – DB TSSOP – PW (1) ORDERABLE PART NUMBER Tube of 25 SN74LVC543ADW Reel of 2000 SN74LVC543ADWR Reel of 2000 SN74LVC543ADBR Tube of 60 SN74LVC543APW Reel of 2000 SN74LVC543APWR Reel of 250 SN74LVC543APWT TOP-SIDE MARKING LVC543A LC543A LC543A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1993–2005, Texas Instruments Incorporated SN74LVC543A OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS299H – JANUARY 1993 – REVISED MARCH 2005 FUNCTION TABLE (1) INPUTS (1) (2) CEAB LEAB OEAB A OUTPUT B H X X X Z X X H X Z L H L X B0 (2) L L L L L L L L H H A-to-B data flow is shown; B-to-A flow control is the same, except that it uses CEBA, LEBA, and OEBA. Output level before the indicated steady-state input conditions were established LOGIC DIAGRAM (POSITIVE LOGIC) OEBA CEBA LEBA OEAB CEAB LEAB A1 2 23 1 13 11 14 C1 3 1D C1 1D To Seven Other Channels 2 22 B1 SN74LVC543A OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com Absolute Maximum Ratings SCAS299H – JANUARY 1993 – REVISED MARCH 2005 (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V –0.5 6.5 V –0.5 VCC + 0.5 state (2) UNIT VO Voltage range applied to any output in the high-impedance or power-off VO Voltage range applied to any output in the high or low state (2) (3) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA Continuous current through VCC or GND θJA Package thermal impedance (4) Tstg (1) (2) (3) (4) DB package 63 DW package 46 PW package 88 Storage temperature range –65 V °C/W °C 150 Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the recommended operating conditions table. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) VCC Supply voltage Operating Data retention only VCC = 1.65 V to 1.95 V VIH High-level input voltage MIN MAX 1.65 3.6 1.5 Low-level input voltage VI VCC = 2.3 V to 2.7 V 1.7 VCC = 2.7 V to 3.6 V 2 VO Output voltage IOH High-level output current 0.35 × VCC 0.7 VCC = 2.7 V to 3.6 V 0.8 0 5.5 High or low state 0 VCC 3-state 0 5.5 VCC = 1.65 V –4 VCC = 2.3 V –8 VCC = 2.7 V –12 VCC = 3 V –24 VCC = 1.65 V IOL Low-level output current ∆t/∆v Input transition rise or fall rate TA Operating free-air temperature (1) V VCC = 2.3 V to 2.7 V Input voltage V 0.65 × VCC VCC = 1.65 V to 1.95 V VIL UNIT V V V mA 4 VCC = 2.3 V 8 VCC = 2.7 V 12 VCC = 3 V 24 –40 mA 10 ns/V 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 3 SN74LVC543A OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS299H – JANUARY 1993 – REVISED MARCH 2005 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –100 µA VOH 1.65 V to 3.6 V 1.65 V 1.2 IOH = –8 mA 2.3 V 1.7 2.7 V 2.2 3V 2.4 IOH = –24 mA 3V 2.2 IOL = 100 µA 1.65 V to 3.6 V 0.2 IOL = 4 mA 1.65 V 0.45 IOL = 8 mA 2.3 V 0.7 IOL = 12 mA 2.7 V 0.4 3V 0.55 IOL = 24 mA II Control inputs VI = 0 to 5.5 V UNIT VCC – 0.2 IOH = –4 mA IOH = –12 mA VOL MIN TYP (1) MAX VCC V V 3.6 V ±5 µA Ioff VI or VO = 5.5 V 0 ±10 µA IOZ (2) VO = 0 to 5.5 V 3.6 V ±10 µA VI = VCC or GND ICC IO = 0 3.6 V ≤ VI ≤ 5.5 V (3) ∆ICC 10 3.6 V One input at VCC – 0.6 V, Other inputs at VCC or GND 10 2.7 V to 3.6 V 500 µA µA Ci Control inputs VI = VCC or GND 3.3 V 4.5 pF Cio A or B ports VO = VCC or GND 3.3 V 7.5 pF (1) (2) (3) All typical values are at VCC = 3.3 V, TA = 25°C. For I/O ports, the parameter IOZ includes the input leakage current. This applies in the disabled state only. Timing Requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) VCC = 1.8 V ± 0.15 V MIN MAX VCC = 2.5 V ± 0.2 V MIN MAX VCC = 3.3 V ± 0.3 V VCC = 2.7 V MIN MAX MIN UNIT MAX tw Pulse duration (1) (1) 3.3 3.3 ns tsu Setup time, data before LE↑ or CE↑ (1) (1) 1.6 1.6 ns Hold time, data after LE↑ or CE↑ (1) (1) 2.1 2.1 ns th (1) This information was not available at the time of publication. Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER tpd ten tdis (1) 4 FROM (INPUT) A or B LE OE CE OE CE TO (OUTPUT) B or A A or B A or B This information was not available at the time of publication. VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 2.7 V MIN MAX MIN UNIT MIN MAX MIN MAX MAX (1) (1) (1) (1) 8 1 7 (1) (1) (1) (1) 9.5 1.2 8.5 (1) (1) (1) (1) 9.2 1.3 7.7 (1) (1) (1) (1) 9.3 1.3 8 (1) (1) (1) (1) 7.5 1 7 (1) (1) (1) (1) 7.5 1 7 ns ns ns SN74LVC543A OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS299H – JANUARY 1993 – REVISED MARCH 2005 Operating Characteristics TA = 25°C PARAMETER Cpd (1) Power dissipation capacitance Outputs enabled per transceiver Outputs disabled TEST CONDITIONS f = 10 MHz VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V TYP TYP TYP (1) (1) 49 (1) (1) 6 UNIT pF This information was not available at the time of publication. 5 SN74LVC543A OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCAS299H – JANUARY 1993 – REVISED MARCH 2005 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VI tr/tf VCC VCC 2.7 V 2.7 V ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V 1.5 V 2 × VCC 2 × VCC 6V 6V 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH VM VM VOL tPHL VM VM 0V Output Waveform 1 S1 at VLOAD (see Note B) tPLH tPLZ VLOAD/2 VM tPZH VOH Output VM tPZL tPHL VOH Output VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + V∆ VOL tPHZ VM VOH − V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 6 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74LVC543ADBR ACTIVE SSOP DB 24 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LC543A Samples SN74LVC543ADW ACTIVE SOIC DW 24 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVC543A Samples SN74LVC543ADWR ACTIVE SOIC DW 24 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVC543A Samples SN74LVC543APW ACTIVE TSSOP PW 24 60 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LC543A Samples SN74LVC543APWR ACTIVE TSSOP PW 24 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LC543A Samples SN74LVC543APWT ACTIVE TSSOP PW 24 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LC543A Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of