SN74LVCZ245APW

SN74LVCZ245A OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES275G – JUNE 1999 – REVISED AUGUST 2003 D D D D D D D D DB, DW, N, NS, OR PW PACKAGE (TOP VIEW) Operates From 2.7 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 6.3 ns at 3.3 V Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C Ioff and Power-Up 3-State Support Hot Insertion Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC) Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II DIR A1 A2 A3 A4 A5 A6 A7 A8 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE B1 B2 B3 B4 B5 B6 B7 B8 description/ordering information This octal bus transceiver is designed for 2.7-V to 3.6-V VCC operation. The SN74LVCZ245A is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. ORDERING INFORMATION PACKAGE† TA PDIP – N TOP-SIDE MARKING Tube of 20 SN74LVCZ245AN Tube of 25 SN74LVCZ245ADW Reel of 2000 SN74LVCZ245ADWR SOP – NS Reel of 2000 SN74LVCZ245ANSR LVCZ245A SSOP – DB Reel of 2000 SN74LVCZ245ADBR CV245A Tube of 70 SN74LVCZ245APW CV245A Reel of 2000 SN74LVCZ245APWR CV245A Reel of 250 SN74LVCZ245APWT CV245A SOIC – DW –40 C to 85 C –40°C 85°C ORDERABLE PART NUMBER TSSOP – PW SN74LVCZ245AN LVCZ245A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74LVCZ245A OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES275G – JUNE 1999 – REVISED AUGUST 2003 FUNCTION TABLE INPUTS OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation logic diagram (positive logic) DIR 1 19 A1 OE 2 18 B1 To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 V Voltage range applied to any output in the high or low state, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, θJA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74LVCZ245A OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES275G – JUNE 1999 – REVISED AUGUST 2003 recommended operating conditions (see Note 4) VCC VIH Supply voltage VIL VI Low-level input voltage High-level input voltage VCC = 2.7 V to 3.6 V VCC = 2.7 V to 3.6 V Input voltage MIN MAX 2.7 3.6 2 UNIT V V 0.8 V 0 5.5 V High or low state 0 3-state 0 VCC 5.5 V VO Output voltage IOH High-level output current VCC = 2.7 V VCC = 3 V –12 IOL Low-level output current VCC = 2.7 V VCC = 3 V 12 ∆t/∆v Input transition rise or fall rate ∆t/∆VCC TA Power-up ramp rate 150 Operating free-air temperature –40 –24 24 6 mA mA ns/V µs/V 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC 2.7 V to 3.6 V IOH = –100 µA VOH 2.7 V IOH = –12 mA IOH = –24 mA IOL = 100 µA VOL MIN TYP† MAX VCC–0.2 2.2 3V 2.4 3V 2.2 UNIT V 2.7 V to 3.6 V 0.2 V IOL = 12 mA IOL = 24 mA 2.7 V 0.4 3V 0.55 VI = 0 to 5.5 V VI or VO = 5.5 V 3.6 V ±5 µA 0 ±5 µA IOZ‡ VO = 0 to 5.5 V 3.6 V ±5 µA IOZPU VO = 0.5 V to 2.5 V, OE = don’t care 0 to 1.5 V ±5 µA IOZPD VO = 0.5 V to 2.5 V, VI = VCC or GND 3.6 V ≤ VI ≤ 5.5 V§ OE = don’t care 1.5 V to 0 ±5 µA II Ioff Control inputs ICC ∆ICC Ci Control inputs Cio A or B ports IO = 0 100 3.6 V One input at VCC – 0.6 V, Other inputs at VCC or GND 100 2.7 V to 3.6 V VI = VCC or GND VO = VCC or GND 100 µA µA 3.3 V 4 pF 3.3 V 6 pF † All typical values are at VCC = 3.3 V, TA = 25°C. ‡ For I/O ports, the parameter IOZ includes the input leakage current. § This applies in the disabled state only. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN74LVCZ245A OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES275G – JUNE 1999 – REVISED AUGUST 2003 switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) FROM (INPUT) TO (OUTPUT) tpd A or B ten tdis PARAMETER VCC = 2.7 V MIN VCC = 3.3 V ± 0.3 V UNIT MAX MIN MAX B or A 7.3 1.5 6.3 ns OE A or B 9.5 1.5 8.5 ns OE A or B 8.5 1.7 7.5 ns operating characteristics, TA = 25°C TEST CONDITIONS PARAMETER Cpd 4 Outputs enabled Power dissipation capacitance per transceiver POST OFFICE BOX 655303 Outputs disabled • DALLAS, TEXAS 75265 VCC = 3.3 V TYP UNIT 42 f = 10 MHz 3 pF SN74LVCZ245A OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES275G – JUNE 1999 – REVISED AUGUST 2003 PARAMETER MEASUREMENT INFORMATION VCC = 2.7 V AND 3.3 V ± 0.3 V 2 × VCC S1 500 Ω From Output Under Test GND CL = 30 pF (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCC GND Open 500 Ω tw LOAD CIRCUIT VCC VCC Timing Input VCC/2 Input VCC/2 0V VCC/2 0V tsu VOLTAGE WAVEFORMS PULSE DURATION th VCC Data Input VCC/2 VCC/2 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC Output Control (low-level enabling) VCC/2 VCC/2 0V tPLZ tPZL VCC Input VCC/2 VCC/2 0V tPLH VCC/2 VCC VCC/2 VOL + 0.3 V VOL tPHZ tPZH tPHL VOH Output Output Waveform 1 S1 at 2 × VCC (see Note B) VCC/2 VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES Output Waveform 2 S1 at GND (see Note B) VCC/2 VOH VOH – 0.3 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74LVCZ245ADBR ACTIVE SSOP DB 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CV245A SN74LVCZ245ADWR ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVCZ245A SN74LVCZ245ANSR ACTIVE SO NS 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LVCZ245A SN74LVCZ245APW ACTIVE TSSOP PW 20 70 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CV245A SN74LVCZ245APWR ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CV245A SN74LVCZ245APWT ACTIVE TSSOP PW 20 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CV245A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of