SCBS701F − JULY 1997 − REVISED SEPTEMBER 2003
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SN54LVTH16500 . . . WD PACKAGE
SN74LVTH16500 . . . DGG OR DL PACKAGE
(TOP VIEW)
Widebus Family
UBT Transceivers Combine D-Type
Latches and D-Type Flip-Flops for
Operation in Transparent, Latched, or
Clocked Mode
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC)
Support Unregulated Battery Operation
Down to 2.7 V
Typical VOLP (Output Ground Bounce)
VCC.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4)
SN54LVTH16500
SN74LVTH16500
MIN
MAX
MIN
MAX
2.7
3.6
2.7
3.6
UNIT
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
Input voltage
5.5
5.5
V
IOH
IOL
High-level output current
−24
−32
mA
Low-level output current
48
64
mA
∆t/∆v
Input transition rise or fall rate
∆t/∆VCC
TA
Power-up ramp rate
200
Operating free-air temperature
−55
High-level input voltage
2
2
0.8
Outputs enabled
V
0.8
10
10
−40
V
ns/V
µs/V
200
125
V
85
°C
NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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4
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SCBS701F − JULY 1997 − REVISED SEPTEMBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VCC = 2.7 V,
VCC = 2.7 V to 3.6 V,
II = −18 mA
IOH = −100 µA
VCC = 2.7 V,
IOH = −8 mA
IOH = −24 mA
VCC = 3 V
VCC = 2.7 V
VOL
VCC = 3 V
Control inputs
Ioff
II(hold)
A or B ports
MIN
SN74LVTH16500
TYP†
MAX
MIN
−1.2
VCC−0.2
2.4
−1.2
V
V
2
IOH = −32 mA
IOL = 100 µA
2
0.2
0.2
IOL = 24 mA
IOL = 16 mA
0.5
0.5
0.4
0.4
IOL = 32 mA
IOL = 48 mA
0.5
0.5
V
0.55
IOL = 64 mA
VI = VCC or GND
0.55
±1
VI = 5.5 V
VI = 5.5 V
10
10
20
20
VCC = 3.6 V
VI = VCC
VI = 0
1
1
VCC = 0,
VI or VO = 0 to 4.5 V
VI = 0.8 V
VCC = 3 V
UNIT
VCC−0.2
2.4
±1
VCC = 3.6 V,
VCC = 0 or 3.6 V,
II
A or B ports‡
SN54LVTH16500
TYP†
MAX
TEST CONDITIONS
−5
VI = 2 V
VI = 0 to 3.6 V
µA
−5
±100
75
75
−75
−75
µA
µA
IOZPU
VCC = 3.6 V§,
VCC = 0 to 1.5 V, VO = 0.5 V to 3 V,
OE/OE = don’t care
±100∗
± 100
µA
IOZPD
VCC = 1.5 V to 0, VO = 0.5 V to 3 V,
OE/OE = don’t care
±100∗
±100
µA
VCC = 3.6 V,
IO = 0,
VI = VCC or GND
0.19
0.19
ICC
±500
Outputs high
Outputs low
Outputs disabled
∆ICC¶
VCC = 3 V to 3.6 V, One input at VCC − 0.6 V,
Other inputs at VCC or GND
Ci
VI = 3 V or 0
VO = 3 V or 0
Cio
5
5
0.19
0.19
0.2
0.2
4
4
10
10
mA
mA
pF
pF
∗ On products compliant to MIL-PRF-38535, this parameter is not production tested.
† All typical values are at VCC = 3.3 V, TA = 25°C.
‡ Unused pins at VCC or GND
§ This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
¶ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
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$)(2' #+ "!$#((%' '!' ,+#"%$! 0#% (#$'
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5
SCBS701F − JULY 1997 − REVISED SEPTEMBER 2003
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
SN54LVTH16500
VCC = 3.3 V
± 0.3 V
MIN
fclock
tw
tsu
Clock frequency
Pulse duration
MIN
150
MAX
MIN
150
MAX
VCC = 2.7 V
MIN
150
3.3
3.3
3.3
CLK high or low
3.3
3.3
3.3
3.3
A before CLKAB↓
3.1
3.1
2.9
2.9
B before CLKBA↓
3.1
3.1
2.9
2.9
CLK high
1.5
0.6
1.4
0.5
CLK low
3.1
2.5
2.9
2.3
A or B after CLK↓
0.4
0.4
0.4
0.4
A or B after LE↓
1.7
1.7
1.6
1.6
UNIT
MAX
150
3.3
Setup time
Hold time
VCC = 2.7 V
LE high
A or B before LE↓
th
MAX
SN74LVTH16500
VCC = 3.3 V
± 0.3 V
MHz
ns
ns
ns
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
SN54LVTH16500
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 3.3 V
± 0.3 V
MIN
fmax
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
VCC = 2.7 V
MAX
150
B or A
A or B
LEBA or LEAB
A or B
CLKBA or
CLKAB
A or B
OEBA or OEAB
A or B
A or B
OEBA or OEAB
tPLZ
† All typical values are at VCC = 3.3 V, TA = 25°C.
SN74LVTH16500
MIN
MAX
150
MIN
VCC = 2.7 V
TYP†
MAX
150
MIN
150
MHz
3.9
4.1
1.3
2.8
3.7
4
1.2
3.9
4.1
1.3
2.6
3.7
4
1.4
5.5
5.9
1.5
3.8
5.1
5.7
1.4
5.5
5.9
1.5
3.8
5.1
5.7
1.2
5.3
6.1
1.3
3.6
5
5.9
1.2
5.3
6.1
1.3
3.5
5
5.9
1.2
5.1
5.8
1.3
3.6
4.8
5.5
1.2
5.1
5.8
1.3
3.6
4.8
5.5
1.6
6.1
6.6
1.7
4.5
5.8
6.3
1.6
6.1
6.6
1.7
4.1
5.8
6.3
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• DALLAS, TEXAS 75265
UNIT
MAX
1.2
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6
VCC = 3.3 V
± 0.3 V
ns
ns
ns
ns
ns
SCBS701F − JULY 1997 − REVISED SEPTEMBER 2003
PARAMETER MEASUREMENT INFORMATION
6V
S1
500 Ω
From Output
Under Test
GND
CL = 50 pF
(see Note A)
TEST
S1
tPHL/tPLH
tPLZ/tPZL
tPHZ/tPZH
Open
6V
GND
Open
500 Ω
2.7 V
Timing Input
LOAD CIRCUIT
1.5 V
0V
tw
tsu
2.7 V
Input
1.5 V
1.5 V
th
2.7 V
Data Input
1.5 V
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
2.7 V
1.5 V
Input
1.5 V
0V
tPLH
tPHL
VOH
1.5 V
Output
1.5 V
VOL
tPHL
1.5 V
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
0V
tPZL
tPLZ
3V
1.5 V
tPZH
VOH
Output
Output
Waveform 1
S1 at 6 V
(see Note B)
tPLH
1.5 V
2.7 V
Output
Control
Output
Waveform 2
S1 at GND
(see Note B)
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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7
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
SN74LVTH16500DGGR
ACTIVE
TSSOP
DGG
56
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
LVTH16500
SN74LVTH16500DL
ACTIVE
SSOP
DL
56
20
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
LVTH16500
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of