SN74LVTH652DBRE4

  
      


 

 
 
SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003 D Support Mixed-Mode Signal Operation D D D D Bus Hold on Data Inputs Eliminates the (5-V Input and Output Voltages With 3.3-V VCC ) Support Unregulated Battery Operation Down to 2.7 V Typical VOLP (Output Ground Bounce) VCC. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 4) SN54LVTH652 SN74LVTH652 MIN MAX MIN MAX 2.7 3.6 2.7 3.6 UNIT VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage 5.5 5.5 V IOH IOL High-level output current −24 −32 mA Low-level output current 48 64 mA ∆t /∆v Input transition rise or fall rate ∆t/∆VCC TA Power-up ramp rate 200 Operating free-air temperature −55 High-level input voltage 2 2 0.8 Outputs enabled V 0.8 10 10 −40 V ns/V µs/V 200 125 V 85 °C NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.   ')"*%("' #"'#&*' +*"!$# ' & )"*%(2& "* !&1' +(& ") !&2&-"+%&' (*(#&*# !(( ('! "&* +&#)#("' (*& !&1' 1"(- &.( '*$%&' *&&*2& & *1 " #('1& "* !#"''$& && +*"!$# /"$ '"#& POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 
  
      


 

 
 
SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VCC = 2.7 V, VCC = 2.7 V to 3.6 V, II = −18 mA IOH = −100 µA VCC = 2.7 V, IOH = −8 mA IOH = −24 mA VCC = 3 V VOL VCC = 3 V Ioff II(hold) A or B ports SN74LVTH652 TYP† MAX MIN −1.2 VCC−0.2 2.4 −1.2 2 0.2 0.2 IOL = 24 mA IOL = 16 mA 0.5 0.5 0.4 0.4 IOL = 32 mA IOL = 48 mA 0.5 0.5 0.55 ±1 ±1 10 20 20 VCC = 3.6 V VI = VCC VI = 0 1 1 VCC = 0, VI or VO = 0 to 4.5 V VI = 0.8 V −5 VI = 2 V VI = 0 to 3.6 V VCC = 3.6 V§ V 0.55 10 VCC = 3 V V V 2 VI = 5.5 V VI = 5.5 V VCC = 3.6 V, VCC = 0 or 3.6 V, UNIT VCC−0.2 2.4 IOL = 64 mA VI = VCC or GND II A or B ports‡ MIN IOH = −32 mA IOL = 100 µA VCC = 2.7 V Control inputs SN54LVTH652 TYP† MAX TEST CONDITIONS µA −5 ±100 75 75 −75 −75 µA µA ±500 IOZPU VCC = 0 to 1.5 V, VO = 0.5 to 3 V, OE/OE = don’t care ±100∗ ±100 µA IOZPD VCC = 1.5 V to 0, VO = 0.5 to 3 V, OE/OE = don’t care ±100∗ ±100 µA 0.19 0.19 ICC VCC = 3.6 V, IO = 0, VI = VCC or GND 5 5 0.19 0.19 0.2 0.2 Outputs high Outputs low Outputs disabled ∆ICC¶ VCC = 3 V to 3.6 V, One input at VCC − 0.6 V, Other inputs at VCC or GND Ci VI = 3 V or 0 VO = 3 V or 0 4 4 mA mA pF Cio 9 9 pF ∗ On products compliant to MIL-PRF-38535, this parameter is not production tested. † All typical values are at VCC = 3.3 V, TA = 25°C. ‡ Unused terminals at VCC or GND § This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another. ¶ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.   ')"*%("' #"'#&*' +*"!$# ' & )"*%(2& "* !&1' +(& ") !&2&-"+%&' (*(#&*# !(( ('! "&* +&#)#("' (*& !&1' 1"(- &.( '*$%&' *&&*2& & *1 " #('1& "* !#"''$& && +*"!$# /"$ '"#& 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 
  
      


 

 
 
SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 2) SN54LVTH652 VCC = 3.3 V ± 0.3 V MIN fclock tw Clock frequency MAX SN74LVTH652 VCC = 2.7 V MIN MAX 150 Pulse duration, CLK high or low VCC = 3.3 V ± 0.3 V MIN 150 MAX VCC = 2.7 V MIN 150 3.3 3.3 3.3 Data high 1.3 1.6 1.2 1.5 Data low 1.9 2.6 1.6 2.2 1.2 1.2 0.8 0.8 tsu Setup time, A or B before CLKAB↑ or CLKBA↑ th Hold time, A or B after CLKAB↑ or CLKBA↑ MAX 150 3.3 UNIT MHz ns ns ns switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 2) SN54LVTH652 PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 3.3 V ± 0.3 V MIN fmax tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ MAX 150 CLKBA or CLKAB A or B A or B B or A SBA or SAB‡ A or B OEBA A OEBA A OEAB B OEAB B SN74LVTH652 VCC = 2.7 V MIN MAX 150 VCC = 3.3 V ± 0.3 V MIN VCC = 2.7 V TYP† MAX 150 MIN MAX 150 MHz 1.7 5 5.9 1.8 3.1 4.7 5.6 1.7 5 5.9 1.8 3.1 4.7 5.6 1.2 3.7 4.3 1.3 2.3 3.5 4.1 1.2 3.7 4.3 1.3 2.4 3.5 4.1 1.4 5.2 6.3 1.5 3.1 4.9 6 1.4 5.2 6.3 1.5 3.4 4.9 6 1 5.4 6.7 1.1 2.9 5.2 6.5 1 5.4 6.7 1.1 3.1 5.2 6.5 2.2 5.9 6.5 2.3 3.5 5.5 6.1 2.2 5.9 6.3 2.3 3.7 5.5 5.9 1.2 4.9 5.9 1.3 3 4.7 5.7 1.2 4.9 5.9 1.3 3.3 4.7 5.7 1.4 5.8 7 1.5 3.6 5.6 6.7 tPLZ 1.4 5.9 6.6 1.5 3.7 5.6 † All typical values are at VCC = 3.3 V, TA = 25°C. ‡ These parameters are measured with the internal output state of the storage register opposite that of the bus input. UNIT 6.3 ns ns ns ns ns ns ns   ')"*%("' #"'#&*' +*"!$# ' & )"*%(2& "* !&1' +(& ") !&2&-"+%&' (*(#&*# !(( ('! "&* +&#)#("' (*& !&1' 1"(- &.( '*$%&' *&&*2& & *1 " #('1& "* !#"''$& && +*"!$# /"$ '"#& POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 
  
      


 

 
 
SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION 6V S1 500 Ω From Output Under Test Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 6V GND 2.7 V LOAD CIRCUIT 1.5 V Timing Input 0V tw tsu 2.7 V Input 1.5 V 1.5 V th 2.7 V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 2.7 V 1.5 V Input 1.5 V 0V tPHL tPLH VOH 1.5 V Output 1.5 V VOL tPLH tPHL VOH Output 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 2.7 V Output Control Output Waveform 1 S1 at 6 V (see Note B) Output Waveform 2 S1 at GND (see Note B) 1.5 V 1.5 V 0V tPLZ tPZL 3V 1.5 V VOL + 0.3 V VOL tPHZ tPZH 1.5 V VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 2. Load Circuit and Voltage Waveforms 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) SN74LVTH652DBLE OBSOLETE SSOP DB 24 TBD Call TI Call TI -40 to 85 SN74LVTH652DBR ACTIVE SSOP DB 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LXH652 SN74LVTH652DBRE4 ACTIVE SSOP DB 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LXH652 SN74LVTH652DBRG4 ACTIVE SSOP DB 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LXH652 SN74LVTH652DW ACTIVE SOIC DW 24 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH652 SN74LVTH652DWE4 ACTIVE SOIC DW 24 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH652 SN74LVTH652DWG4 ACTIVE SOIC DW 24 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LVTH652 SN74LVTH652PW ACTIVE TSSOP PW 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LXH652 SN74LVTH652PWE4 ACTIVE TSSOP PW 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LXH652 SN74LVTH652PWG4 ACTIVE TSSOP PW 24 60 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LXH652 SN74LVTH652PWLE OBSOLETE TSSOP PW 24 TBD Call TI Call TI -40 to 85 SN74LVTH652PWR ACTIVE TSSOP PW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LXH652 SN74LVTH652PWRE4 ACTIVE TSSOP PW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LXH652 SN74LVTH652PWRG4 ACTIVE TSSOP PW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 LXH652 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. 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OTHER QUALIFIED VERSIONS OF SN74LVTH652 : • Enhanced Product: SN74LVTH652-EP NOTE: Qualified Version Definitions: • Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 12-Aug-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74LVTH652DBR SSOP DB 24 2000 330.0 16.4 8.2 8.8 2.5 12.0 16.0 Q1 SN74LVTH652PWR TSSOP PW 24 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 12-Aug-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVTH652DBR SSOP DB 24 2000 367.0 367.0 38.0 SN74LVTH652PWR TSSOP PW 24 2000 367.0 367.0 38.0 Pack Materials-Page 2 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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