TCAN1046-Q1
TCAN1046-Q1
SLLSF18A – MARCH 2020 – REVISED SEPTEMBER
2020
SLLSF18A – MARCH 2020 – REVISED SEPTEMBER 2020
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TCAN1046-Q1 Automotive Fault-Protected Dual CAN FD Transceiver
with Standby Mode
1 Features
3 Description
•
The TCAN1046-Q1 (TCAN1046) is a dual high-speed
controller area network (CAN) transceiver that meets
the physical layer requirements of the ISO
11898-2:2016 high-speed CAN specification.
•
•
•
•
•
•
•
•
•
•
AEC-Q100: Qualified for automotive applications
– Temperature grade 1: –40°C to 125°C TA
Two independent high-speed CAN FD transceivers
with mode control
Meets the requirements of ISO 11898-2:2016 and
ISO 11898-5:2007 physical layer standards
Support of classical CAN and optimized CAN FD
performance at 2, 5, and 8 Mbps
– Short and symmetrical propagation delays for
enhanced timing margin
– Higher data rates in loaded CAN networks
I/O voltage range supports 1.7 V to 5.5 V
– Support for 1.8-V, 2.5-V, 3.3-V, and 5-V
applications
Protection features:
– Bus fault protection: ±58 V
– Undervoltage protection
– TXD-dominant time-out (DTO)
• Data rates down to 9.2 kbps
– Thermal-shutdown protection (TSD)
Operating modes:
– Normal mode
– Low power standby mode supporting remote
wake-up request
Optimized behavior when unpowered
– Bus and logic pins are high impedance (no load
to operating bus or application)
– Hot-plug capable: power up/down glitch free
operation on bus and RXD output
Junction temperatures from: –40°C to 150°C
Receiver common mode input voltage: ±12 V
Available in SOIC (14) and leadless VSON (14)
packages (4.5 mm x 3.0 mm) with improved
automated optical inspection (AOI) capability
The TCAN1046 supports both classical CAN and
CAN FD networks up to 8 megabits per second
(Mbps). The TCAN1046 has two CAN FD channels
with independent supply, VCC1 and VCC2, and mode
control, STB1 and STB2, pins allowing for true
independent operation of each CAN channel. The
ability to operate each channel independent of one
another is important in applications that require
redundancy or additional CAN FD channels to act as
a back-up in the event of a system failure.
The TCAN1046 includes many protection and
diagnostic features including thermal-shutdown
(TSD), TXD-dominant time-out (DTO), and bus fault
protection up to ±58 V.
Device Information
PACKAGE(1)
PART NUMBER
TCAN1046-Q1
(1)
VIN
BODY SIZE (NOM)
VSON (DMT) (14)
4.50 mm x 3.00 mm
SOIC (D) (14)
8.95 mm x 3.91 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
VIN
VOUT
5V Voltage
Regulator
(e.g. TPSxxxx)
4
VDD
RXD2
CAN FD
Controller
TXD2
14
4
1
11
VCC2
VCC1
GPIO
CANH1
13
STB1
RXD1
TXD1
CANL1
12
System Controller
Optional:
Terminating
Node
TCAN1046-Q1
Dual CAN FD
Transceiver
GPIO
RXD2
CAN FD
Controller
TXD2
8
7
6
Optional:
Filtering,
Transient and
ESD
STB2
RXD2
CANH2
10
TXD2
2 Applications
•
Automotive and Transportation
– Body control modules
– Automotive gateway
– Advanced driver assistance system (ADAS)
– Infotainment
CANL2
9
Optional:
Terminating
Node
Optional:
Filtering,
Transient and
ESD
Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
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© 2020 Texas
Instruments
Incorporated
intellectual
property
matters
and other important disclaimers. PRODUCTION DATA.
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SLLSF18A – MARCH 2020 – REVISED SEPTEMBER 2020
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
Pin Functions.................................................................... 3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Characteristics.............................................. 4
6.5 Supply Characteristics................................................ 5
6.6 Dissipation Ratings..................................................... 5
6.7 Electrical Characteristics.............................................5
6.8 Switching Characteristics............................................7
6.9 Typical Characteristics................................................ 9
7 Parameter Measurement Information.......................... 10
8 Detailed Description......................................................13
8.1 Overview................................................................... 13
8.2 Functional Block Diagram......................................... 14
8.3 Feature Description...................................................15
8.4 Device Functional Modes..........................................18
9 Application and Implementation.................................. 21
9.1 Application Information............................................. 21
9.2 Typical Application.................................................... 21
10 Power Supply Recommendations..............................23
11 Device and Documentation Support..........................25
11.1 Documentation Support.......................................... 25
11.2 Receiving Notification of Documentation Updates.. 25
11.3 Support Resources................................................. 25
11.4 Trademarks............................................................. 25
11.5 Electrostatic Discharge Caution.............................. 25
11.6 Glossary.................................................................. 25
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (March 2020) to Revision A (September 2020)
Page
• First public release of the data sheet .................................................................................................................1
2
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5 Pin Configuration and Functions
TX D1
1
14
STB1
GND1
2
13
CA NH1
VCC1
3
12
CA NL1
RX D1
4
11
STB2
TX D2
5
10
CA NH2
GND2
6
9
CA NL2
VCC2
7
8
RX D2
TX D1
1
14
STB1
GND1
2
13
CA NH1
VCC1
3
12
CA NL1
11
STB2
Th ermal
Pad
RX D1
4
TX D2
5
10
CA NH2
GND2
6
9
CA NL2
VCC2
7
8
RX D2
No t to scale
D Package TCAN1046-Q1, 14 Pin SOIC, Top View
No t to scale
DMT Package TCAN1046-Q1, 14 Pin VSON, Top
View
Pin Functions
Pins
Name
No.
Type
Description
TXD1
1
Digital Input
GND1
2
GND1
CAN transmit data input 1, integrated pull-up
Ground connection, transceiver 1
VCC1
3
Supply
5-V supply voltage, transceiver 1
RXD1
4
TXD2
5
Digital Input
GND2
6
GND2
Ground connection, transceiver 2
VCC2
7
Supply
5-V supply voltage, transceiver 2
RXD2
8
Digital Output CAN receive data output 1, tri-state when VCC < UVVCC
CAN transmit data input 2, integrated pull-up
Digital Output CAN receive data output 2, tri-state when VCC < UVVCC
CANL2
9
Bus IO
Low-level CAN bus 2 input/output line
CANH2
10
Bus IO
High-level CAN bus 2 input/output line
STB2
11
Digital Input
CANL1
12
Bus IO
Low-level CAN bus 1 input/output line
CANH1
13
Bus IO
High-level CAN bus 1 input/output line
STB1
14
Digital Input
Thermal Pad (VSON only)
—
Standby input 2 for mode control, integrated pull-up
Standby input 1 for mode control, integrated pull-up
Electrically connected to GND, connect the thermal pad to the printed circuit board (PCB)
ground plane for thermal relief
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN
MAX
UNIT
VCC1, VCC2
Supply voltage
-0.3
6
V
VBUS
CAN Bus IO voltage CANH1, CANL1 & CANH2, CANL2
–58
58
V
VDIFF
Max differential voltage between CANH1, CANL1 & CANH2, CANL2
–45
45
V
VLogic_Input
Logic input terminal voltage
–0.3
6
V
VRXD
RXD output terminal voltage range (VRXD1, VRXD2)
–0.3
6
V
IO(RXD)
RXD output current (IORXD1, IORXD2)
–8
8
mA
TJ
Operating virtual junction temperature range
–40
150
°C
TSTG
Storage temperature
–65
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
All voltage values, except differential IO bus voltages, are with respect to ground terminal.
6.2 ESD Ratings
Human-body model (HBM), per AEC Q100-002(1)
VESD
Electrostatic discharge
VALUE
UNIT
HBM classification level 3A for
all pins
±3000
V
HBM classification level 3B for
global pins CANH & CANL
±10000
V
±750
V
Charged-device model (CDM), per AEC Q100-011
CDM classification level C5 for all pins
(1)
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
MIN
NOM
MAX
VCC1, VCC2
Supply voltage
4.5
5
5.5
IOH(RXD)
RXD terminal high level output current – IOH(RXD1) & IOH(RXD2)
–2
IOL(RXD)
RXD terminal low level output current – IOL(RXD1) & IOL(RXD2)
TA
Operating ambient temperature
UNIT
V
mA
–40
2
mA
125
℃
6.4 Thermal Characteristics
TCAN1046-Q1
THERMAL METRIC(1)
DMT (VSON)
UNIT
RθJA
Junction-to-ambient thermal resistance
70.6
35.5
℃/W
RθJC(top)
Junction-to-case (top) thermal resistance
33.4
38.1
℃/W
RθJB
Junction-to-board thermal resistance
34.0
13.4
℃/W
ΨJT
Junction-to-top characterization parameter
5.0
1.9
℃/W
ΨJB
Junction-to-board characterization parameter
32.6
13.4
℃/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
–
3.5
℃/W
(1)
4
D (SOIC)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Supply Characteristics
Over recommended operating conditions with TA = -40℃ to 125℃ (unless otherwise noted)
PARAMETER
TYP
MAX
TXD = 0 V, STB = 0 V, RL = 60 Ω, CL =
open
See Figure 7-1
TEST CONDITIONS
45
70
mA
TXD = 0 V, STB = 0 V, RL = 50 Ω, CL =
open
See Figure 7-1
49
80
mA
Recessive
TXD = VCC, STB = 0 V, RL = 50 Ω, CL =
open
See Figure 7-1
4.5
7.5
mA
Dominant with
bus fault
TXD = 0 V, STB = 0 V, CANH = CANL =
±25 V, RL = open, CL = open
See Figure 7-1
130
mA
TXD = STB = VCC, RL = 50 Ω, CL = open
See Figure 7-1
14.5
µA
Dominant
Supply current
Normal mode
Per transceiver
ICC
ICC
Supply current
Standby mode
Per transceiver
UVVCC
Rising under voltage detection on VCC for protected mode
UVVCC
Falling under voltage detection on VCC for protected mode
MIN
3.5
UNIT
4.2
4.4
V
4
4.25
V
6.6 Dissipation Ratings
PARAMETER
TEST CONDITIONS
Average power dissipation
Normal mode
Per transceiver
PD
TTSD
Thermal shutdown temperature(1)
TTSD_HYS
Thermal shutdown hysteresis
(1)
MIN
TYP
MAX
UNIT
VCC = 5 V, TJ= 27°C, RL = 60Ω, TXD input =
250 kHz 50% duty cycle squarewave, CL_RXD =
15 pF
110
mW
VCC = 5 V, TJ= 27°C, RL = 60Ω, TXD input =
250 kHz 50% duty cycle squarewave, CL_RXD =
15 pF
110
mW
VCC = 5 V, TJ= 27°C, RL = 60Ω, TXD input =
250 kHz 50% duty cycle squarewave, CL_RXD =
15 pF
110
mW
VCC = 5.5 V, TA= 125°C, RL = 60Ω, TXD input =
2.5 MHz 50% duty cycle squarewave, CL_RXD =
15 pF
120
mW
VCC = 5.5 V, TA= 125°C, RL = 60Ω, TXD input =
2.5 MHz 50% duty cycle squarewave, CL_RXD =
15 pF
120
mW
VCC = 5.5 V, TA= 125°C, RL = 60Ω, TXD input =
2.5 MHz 50% duty cycle squarewave, CL_RXD =
15 pF
120
mW
170
192
205
°C
10
Specified by design
6.7 Electrical Characteristics
Over recomended operating conditions with TA = -40℃ to 125℃ (unless otherwise noted); CAN electrical
parameters apply to both channels
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
TXD = 0 V, STB = 0 V , 50 Ω ≤ RL ≤ 65 Ω,
CL = open, RCM = open
See Figure 7-2 and Figure 8-3 ,
2.75
4.5
V
0.5
2.25
V
3
V
Driver Electrical Characteristics
VO(DOM)
Dominant output voltage
Normal mode
VO(REC)
Recessive output voltage
Normal mode
CANH
CANL
CANH and CANL
TXD = VCC , STB = 0 V , RL = open (no
load), RCM = open
See Figure 7-2 and Figure 8-3
2
0.5 VCC
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6.7 Electrical Characteristics (continued)
Over recomended operating conditions with TA = -40℃ to 125℃ (unless otherwise noted); CAN electrical
parameters apply to both channels
PARAMETER
TEST CONDITIONS
MIN
0.9
1.1
V/V
–400
400
mV
TXD = 0 V, STB = 0 V , 50 Ω ≤ RL ≤ 65 Ω,
CL = open
See Figure 7-2 and Figure 8-3
1.5
3
V
TXD = 0 V, STB = 0 V , 45 Ω ≤ RL ≤ 70 Ω,
CL = open
See Figure 7-2 and Figure 8-3
1.4
3.3
V
TXD = 0 V, STB = 0 V , RL = 2240 Ω, CL =
open
See Figure 7-2 and Figure 8-3
1.5
5
V
TXD = VCC , STB = 0 V , RL = 60 Ω, CL =
open
See Figure 7-2 and Figure 8-3
–120
12
mV
TXD = VCC , STB = 0 V , RL = open, CL =
open
See Figure 7-2 and Figure 8-3
–50
50
mV
-0.1
0.1
V
-0.1
0.1
V
-0.2
0.2
V
VSYM
Driver symmetry
(VO(CANH) + VO(CANL))/VCC
STB = 0 V , RL = 60 Ω, CSPLIT = 4.7 nF, CL
= open, RCM = open, TXD = 250 kHz, 1
MHz, 2.5 MHz
See Figure 7-2 and Figure 9-2
VSYM_DC
DC output symmetry
(VCC - VO(CANH) - VO(CANL))
STB = 0 V , RL = 60 Ω, CL = open
See Figure 7-2 and Figure 8-3
VOD(DOM)
VOD(REC)
Differential output voltage
Normal mode
Dominant
Differential output voltage
Normal mode
Recessive
CANH - CANL
CANH - CANL
CANH
VO(STB)
Bus output voltage
Standby mode
STB = VCC , RL = open (no load)
See Figure 7-2 and Figure 8-3
CANL
CANH - CANL
IOS(SS_DOM)
IOS(SS_REC)
STB = 0 V , V(CANH) = -15 V to 40 V, CANL
= open, TXD = 0 V
See Figure 7-7 and Figure 8-3
Short-circuit steady-state output current,
dominant
Normal mode
TYP
–115
mA
STB = 0 V , V(CAN_L) = -15 V to 40 V,
CANH = open, TXD = 0 V
See Figure 7-7 and Figure 8-3
Short-circuit steady-state output current,
recessive
Normal mode
STB = 0 V , –27 V ≤ VBUS ≤ 32 V, where
VBUS = CANH = CANL, TXD = VCC
See Figure 7-7 and Figure 8-3
MAX UNIT
115
mA
–5
5
mA
Receiver Electrical Characteristics
6
VIT
Input threshold voltage
Normal mode
STB = 0 V , -12 V ≤ VCM ≤ 12 V
See Figure 7-3, Figure 7-3, and Table 8-5
500
900
mV
VIT(STB)
Input threshold
Standby mode
STB = VCC
See Table 8-5
400
1150
mV
VDOM
Dominant state differential input voltage range
Normal mode
STB = 0 V , -12 V ≤ VCM ≤ 12 V
See Figure 7-3, and Table 8-5
0.9
9
V
VREC
Recessive state differential input voltage range
Normal mode
STB = 0 V , -12 V ≤ VCM ≤ 12 V
See Figure 7-3, and Table 8-5
-4
0.5
V
VDOM(STB)
Dominant state differential input voltage range
Standby mode
STB = VCC , -12 V ≤ VCM ≤ 12 V
See Table 8-5
1.15
9
V
VREC(STB)
Recessive state differential input voltage range
Standby mode
STB = VCC , -12 V ≤ VCM ≤ 12 V
See Table 8-5
-4
0.4
V
VHYS
Hysteresis voltage for input threshold
Normal mode
STB = 0 V , -12 V ≤ VCM ≤ 12 V
See Figure 7-3, and Table 8-5
VCM
Common mode range
Normal and standby modes
See Figure 7-3 and Table 8-5
ILKG(OFF)
Unpowered bus input leakage current
CANH = CANL = 5 V, VCC = GND
CI
Input capacitance to ground (CANH or CANL)
CID
Differential input capacitance
RID
Differential input resistance
RIN
Single ended input resistance
(CANH or CANL)
RIN(M)
Input resistance matching
[1 – (RIN(CANH) / RIN(CANL))] × 100 %
100
–12
TXD = VCC
mV
12
V
5
µA
20
pF
10
pF
TXD = VCC , STB = 0 V , -12 V ≤ VCM ≤ 12
V
40
90
kΩ
20
45
kΩ
V(CAN_H) = V(CAN_L) = 5 V
–1
1
%
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6.7 Electrical Characteristics (continued)
Over recomended operating conditions with TA = -40℃ to 125℃ (unless otherwise noted); CAN electrical
parameters apply to both channels
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
TXD Terminal (CAN Transmit Data Input)
VIH
High-level input voltage
VIL
Low-level input voltage
IIH
High-level input leakage current
0.7 VCC
V
0.3 VCC
V
TXD = VCC = 5.5 V
–2.5
0
1
µA
IIL
Low-level input leakage current
TXD = 0 V, VCC = 5.5 V
–200
-100
–20
µA
ILKG(OFF)
Unpowered leakage current
TXD = 5.5 V, VCC = 0 V
–1
0
1
µA
CI
Input Capacitance
VIN =
0.4×sin(2×π×2×106×t)+2.5
V
5
pF
RXD Terminal (CAN Receive Data Output)
VOH
High-level output voltage
IO = –2 mA,
See Figure 7-3
VOL
Low-level output voltage
IO = +2 mA,
See Figure 7-3
ILKG(OFF)
Unpowered leakage current
RXD = 5.5 V, VCC = 0 V
0.8 VCC
V
–1
0.2 VCC
V
1
µA
0
STB Terminal (Standby Mode Input)
VIH
High-level input voltage
VIL
Low-level input voltage
0.7 VCC
IIH
High-level input leakage current
VCC = STB = 5.5 V
IIL
Low-level input leakage current
VCC = 5.5 V, STB = 0 V
–20
ILKG(OFF)
Unpowered leakage current
STB = 5.5V, VCC = 0 V
–1
V
0.3 VCC
V
2
µA
–2
µA
1
µA
–2
0
6.8 Switching Characteristics
Over recomended operating conditions with TA = -40℃ to 125℃ (unless otherwise noted); Timing parameters
apply to both CAN channels
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Device Switching Characteristics
tPROP(LOOP1)
Total loop delay, driver input (TXD) to receiver
output (RXD), recessive to dominant
Normal mode, RL = 60 Ω, CL = 100 pF,
CL(RXD) = 15 pF
See Figure 7-4
125
210
ns
tPROP(LOOP2)
Total loop delay, driver input (TXD) to receiver
output (RXD), dominant to recessive
Normal mode, RL = 60 Ω, CL = 100 pF,
CL(RXD) = 15 pF
See Figure 7-4
150
210
ns
tMODE
Mode change time, from normal to standby or from
standby to normal
See Figure 7-5
20
µs
tWK_FILTER
Filter time for a valid wake-up pattern
See Figure 8-5
0.5
1.8
µs
tWK_TIMEOUT
Bus wake-up timeout
See Figure 8-5
0.8
6
ms
Driver Switching Characteristics
tpHR
Propagation delay time, high TXD to driver
recessive (dominant to recessive)(1)
tsk(p)
Propagation delay time, low TXD to driver dominant
(recessive to dominant)(1)
STB = 0 V , RL = 60 Ω, CL = 100 pF
See Figure 7-2 and Figure 7-6
Pulse skew (|tpHR - tpLD|)
tR
Differential output signal rise time
tpLD
tF
Differential output signal fall time
tTXD_DTO
Dominant timeout
35
80
115
ns
20
70
120
ns
20
ns
30
ns
50
1.2
ns
4.0
ms
Receiver Switching Characteristics
tpRH
Propagation delay time, bus recessive input to high
output (dominant to recessive)(1)
tpDL
Propagation delay time, bus dominant input to low
output (recessive to dominant)(1)
tR
RXD output signal rise time
STB = 0 V , CL(RXD) = 15 pF
See Figure 7-3
40
90
150
ns
35
65
140
ns
10
ns
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6.8 Switching Characteristics (continued)
Over recomended operating conditions with TA = -40℃ to 125℃ (unless otherwise noted); Timing parameters
apply to both CAN channels
PARAMETER
tF
(1)FD
MIN
RXD output signal fall time
TYP
MAX
10
UNIT
ns
Timing Characteristics
tBIT(BUS)
Bit time on CAN bus output pins
tBIT(TXD) = 500 ns
460
510
ns
tBIT(BUS)
Bit time on CAN bus output pins
tBIT(TXD) = 200 ns
160
210
ns
tBIT(RXD)
Bit time on RXD output pins
tBIT(TXD) = 500 ns
445
515
ns
tBIT(RXD)
Bit time on RXD output pins
tBIT(TXD) = 200 ns
145
215
ns
ΔtREC
Receiver timing symmetry
tBIT(TXD) = 500 ns
-35
15
ns
ΔtREC
Receiver timing symmetry
tBIT(TXD) = 200 ns
-35
15
ns
(1)
8
TEST CONDITIONS
STB = 0 V, RL = 60 Ω, CL = 100 pF,
CL(RXD) = 15 pF
ΔtREC = tBIT(RXD) - tBIT(BUS)
See Figure 7-4
Specified by design and characterization
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6.9 Typical Characteristics
4
3
3.5
2.5
3
VOD(DOM) (V)
VOD(DOM) (V)
2
2.5
2
1.5
1.5
1
1
0.5
0.5
TRX1
TRX2
TRX1
TRX2
0
-40
-25
-10
5
20
35
50
65
80
95
110
Temperature (qC)
0
4.5
125
4.6
4.7
4.8
4.9
Temp = 25°C
RL = 60 Ω
5.2
5.3
16
3.5
14
3
12
2.5
10
ICC (PA)
4
2
6
1
4
0.5
TCAN
RL = 60 Ω
2
TRX1
TRX2
52
59
66
RL (:)
TRX1
TRX2
0
-40
73
-25
-10
5
20
35
50
65
80
95
110
Temperature (qC)
TCAN
Note
VCC = 5 V
5.5
8
1.5
0
45
5.4
Figure 6-2. VOD(DOM) vs VCC Transceiver 1 &
Transceiver 2
Figure 6-1. VOD(DOM) vs Temperature Transceiver 1
& Transceiver 2
VOD(DOM) (V)
5.1
Note
Note
VCC = 5 V
5
VCC (V)
TCAN
125
TCAN
Note
Temp = 25°C
VCC = 5 V
Figure 6-3. VOD(DOM) vs Load Transceiver 1 &
Transceiver 2
RL = 60 Ω
Figure 6-4. ICC Standby vs Temperature
Transceiver 1 & Transceiver 2
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7 Parameter Measurement Information
CANH
TXD
CL
RL
CANL
Figure 7-1. ICC Test Circuit
RCM
CANH
50%
TXD
50%
TXD
CL
RL
VOD
VCM
VCC
VO(CANH)
tpHR
tpLD
CANL
90%
RCM
0V
0.9V
VO(CANL)
VOD
0.5V
10%
tR
tF
Figure 7-2. Driver Test Circuit and Measurement
CANH
1.5V
0.9V
VID
IO
RXD
0.5V
0V
VID
tpDL
tpRH
CANL
CL_RXD
VOH
VO
90%
VO(RXD)
50%
10%
VOL
tF
tR
Figure 7-3. Receiver Test Circuit and Measurement
10
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Table 7-1. Receiver Differential Input Voltage Threshold Test
Input (See Figure 7-3)
Output
VCANH
VCANL
|VID|
-11.5 V
-12.5 V
1000 mV
12.5 V
11.5 V
1000 mV
-8.55 V
-9.45 V
900 mV
9.45 V
8.55 V
900 mV
-8.75 V
-9.25 V
500 mV
9.25 V
8.75 V
500 mV
-11.8 V
-12.2 V
400 mV
12.2 V
11.8 V
400 mV
Open
Open
X
RXD
Low
VOL
High
VOH
TXD
VI
70%
tLOOP2
30%
30%
CANH
0V
VI
TXD
RL
5 x tBIT(TXD)
CL
tBIT(TXD)
CANL
0V
STB
tBIT(BUS)
900mV
500mV
RXD
VDIFF
VO
CL_RXD
RXD
VOH
70%
30%
tBIT(RXD)
VOL
tLOOP1
Figure 7-4. Transmitter and Receiver Timing Test Circuit and Measurement
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CANH
0V
VIH
TXD
CL
RL
STB
CANL
VI
50%
STB
0V
tMODE
RXD
VOH
VO
CL_RXD
RXD
50%
VOL
Figure 7-5. tMODE Test Circuit and Measurement
VIH
CANH
TXD
TXD
RL
CL
0V
VOD
VOD(D)
CANL
0.9V
VOD
0.5V
0V
tTXD_DTO
Figure 7-6. TXD Dominant Timeout Test Circuit and Measurement
CANH
200 s
IOS
TXD
VBUS
IOS
CANL
VBUS
VBUS
0V
or
0V
VBUS
VBUS
Figure 7-7. Driver Short-Circuit Current Test and Measurement
12
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8 Detailed Description
8.1 Overview
The TCAN1046 meets or exceeds the specifications of the ISO 11898-2:2016 high speed CAN (Controller Area
Network) physical layer standard. The device has been certified to the requirements of ISO 11898-2:2016 and
ISO 11898-5:2007 physical layer requirements according to the GIFT/ICT high speed CAN test specification.
The transceiver provides a number of different protection features making it ideal for the stringent automotive
system requirements while also supporting CAN FD data rates up to 8 Mbps.
The TCAN1046 conforms to the following CAN standards:
•
CAN transceiver physical layer standards:
– ISO 11898-2:2016 High speed medium access unit
– ISO 11898-5:2007 High speed medium access unit with low-power mode
– SAE J2284-1: High Speed CAN (HSC) for Vehicle Applications at 125 kbps
– SAE J2284-2: High Speed CAN (HSC) for Vehicle Applications at 250 kbps
– SAE J2284-3: High Speed CAN (HSC) for Vehicle Applications at 500 kbps
– SAE J2284-4: High-Speed CAN (HSC) for Vehicle Applications at 500 kbps with CAN FD Data at 2 Mbps
– SAE J2284-5: High-Speed CAN (HSC) for Vehicle Applications at 500 kbps with CAN FD Data at 5 Mbps
– ARINC 825-4 General Standardization of CAN (Controller Area Network) Bus Protocol For Airborne Use
•
Conformance test requirements:
– ISO 16845-2 Road vehicles – Controller area network (CAN) conformance test plan Part 2: High-speed
medium access unit conformance test plan
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8.2 Functional Block Diagram
VCC1
VCC2
3
7
VCC1
VCC1
TSD
TXD1
13
CANH1
12
CANL1
10
CANH2
9
CANL2
Dominant
time-out
1
VCC1
STB1
14
Mode Select
UVP
VCC1
RXD1
4
Logic Output
MUX
WUP Monitor
Low Power Receiver
VCC2
VCC2
TSD
TXD2
Dominant
time-out
5
VCC2
STB2
11
Mode Select
UVP
VCC2
RXD2
8
Logic Output
MUX
WUP Monitor
Low Power Receiver
2
6
GND1
GND2
Figure 8-1. Block Diagram
14
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8.3 Feature Description
8.3.1 Pin Description
8.3.1.1 TXD1 and TXD2
TXD1 and TXD2 are the logic-level input signals, referenced to VCC, from a CAN controller to the TCAN1046.
8.3.1.2 GND1 and GND2
GND1 and GND2 are ground pins of the transceiver, both must be connect to the PCB ground.
8.3.1.3 VCC1 and VCC2
VCC1 and VCC2 provide the 5-V nominal power supply input to their respective CAN transceiver.
8.3.1.4 RXD1 and RXD2
RXD1 and RXD2 are the logic-level output signals from the TCAN1046 to a CAN controller.
8.3.1.5 CANH1, CANL1, CANH2, and CANL1
These are the CAN high and CAN low differential bus pins. These pins are connected to the CAN transceiver
and the low-voltage WUP CAN receiver.
8.3.1.6 STB1 and STB2 (Standby)
The STB1 and STB2 are input pins used for mode control of the TCAN1046. STB1 and STB2 can be supplied
from either the system processor or from a static system voltage source. If normal mode is the only intended
mode of operation than the STB pins can be tied directly to GND.
8.3.2 CAN Bus States
The CAN bus has two logical states during operation: recessive and dominant. See Figure 8-2 and Figure 8-3 .
A dominant bus state occurs when the bus is driven differentially and corresponds to a logic low on the TXD1,
TXD2, RXD1 and RXD2 pins. A recessive bus state occurs when the bus is biased to VCC/2 via the highresistance internal input resistors R IN) of the receiver and corresponds to a logic high on the TXD1, TXD2, RXD1
and RXD2 pins.
A dominant state overwrites the recessive state during arbitration. Multiple CAN nodes may be transmitting a
dominant bit at the same time during arbitration, and in this case the differential voltage of the bus is greater than
the differential voltage of a single driver.
The TCAN1046 transceiver implements a low-power standby (STB ) mode which enables a third bus state
where the bus pins are weakly biased to ground via the high resistance internal resistors of the receiver. See
Figure 8-2 and Figure 8-3.
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Normal Mode
Standby Mode
Typical Bus Voltage
CANH
VDIFF
VDIFF
CANL
Recessive
Dominant
Recessive
Time, t
Figure 8-2. Bus States
CANH
2.5V
A
RXD
Bias
Unit
B
GND
CANL
A. Normal Mode
B. Standby Mode
Figure 8-3. Simplified Recessive Common Mode Bias Unit and Receiver
8.3.3 TXD Dominant Timeout (DTO)
During normal mode, the only mode where the CAN driver is active, the TXD DTO circuit prevents the local node
from blocking network communication in the event of a hardware or software failure where TXD is held dominant
longer than the timeout period tTXD_DTO. The TXD DTO circuit is triggered by a falling edge on TXD. If no rising
edge is seen before the timeout period of the circuit, tTXD_DTO, the CAN driver is disabled. This frees the bus for
communication between other nodes on the network. The CAN driver is reactivated when a recessive signal is
seen on the TXD pin, thus clearing the dominant time out. The receiver remains active and biased to VCC/2 and
the RXD output reflects the activity on the CAN bus during the TXD DTO fault.
The minimum dominant TXD time allowed by the TXD DTO circuit limits the minimum possible transmitted data
rate of the device. The CAN protocol allows a maximum of eleven successive dominant bits (on TXD) for the
worst case, where five successive dominant bits are followed immediately by an error frame. The minimum
transmitted data rate may be calculated using Equation 1.
Minimum Data Rate = 11 bits / tTXD_DTO = 11 bits / 1.2 ms = 9.2 kbps
16
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Fault is repaired & transmission capability
restored
TXD fault stuck dominant: example PCB failure or bad software
tTXD_DTO
TXD (driver)
Normal CAN communication
CAN Bus Signal
Driver disabled freeing bus for other nodes
%XV ZRXOG EH ³VWXFN GRPLQDQW´ EORFNLQJ FRPPXQLFDWLRQ IRU WKH ZKROH QHWZRUN EXW 7;' '72
prevents this and frees the bus for communication after the time tTXD_DTO.
tTXD_DTO
Communication from other bus node(s)
Communication from repaired node
RXD (receiver)
Communication from local node
Communication from other bus node(s)
Communication from repaired local node
Figure 8-4. Example Timing Diagram for TXD Dominant Timeout
8.3.4 CAN Bus Short Circuit Current Limiting
The TCAN1046 has several protection features that limit the short circuit current when a CAN bus line is shorted.
These include CAN driver current limiting in the dominant and recessive states and TXD dominant state timeout
which prevents permanently having the higher short circuit current of a dominant state in case of a system fault.
During CAN communication the bus switches between the dominant and recessive states, thus the short circuit
current may be viewed as either the current during each bus state or as a DC average current. When selecting
termination resistors or a common mode choke for the CAN design the average power rating, IOS(AVG), should be
used. The percentage dominant is limited by the TXD DTO and the CAN protocol which has forced state
changes and recessive bits due to bit stuffing, control fields, and interframe space. These ensure there is a
minimum amount of recessive time on the bus even if the data field contains a high percentage of dominant bits.
The average short circuit current of the bus depends on the ratio of recessive to dominant bits and their
respective short circuit currents. The average short circuit current may be calculated using Equation 2.
IOS(AVG) = % Transmit x [(% REC_Bits x IOS(SS)_REC) + (% DOM_Bits x IOS(SS)_DOM)] + [% Receive x
IOS(SS)_REC]
(2)
Where:
• IOS(AVG) is the average short circuit current
• % Transmit is the percentage the node is transmitting CAN messages
• % Receive is the percentage the node is receiving CAN messages
• % REC_Bits is the percentage of recessive bits in the transmitted CAN messages
• % DOM_Bits is the percentage of dominant bits in the transmitted CAN messages
• IOS(SS)_REC is the recessive steady state short circuit current
• IOS(SS)_DOM is the dominant steady state short circuit current
This short circuit current and the possible fault cases of the network should be taken into consideration when
sizing the power supply used to generate the transceivers VCC supply.
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8.3.5 Thermal Shutdown (TSD)
If the junction temperature of the TCAN1046 exceeds the thermal shutdown threshold, TTSD, the device turns off
the CAN driver circuitry and blocks the TXD to bus transmission path. The shutdown condition is cleared when
the junction temperature of the device drops below TTSD. The CAN bus pins are biased to VCC/2 during a TSD
fault and the receiver to RXD path remains operational. The TCAN1046 TSD circuit includes hysteresis which
prevents the CAN driver output from oscillating during a TSD fault.
8.3.6 Undervoltage Lockout
The supply pin, VCC, has undervoltage detection that places the TCAN1046 into a protected state. This protects
the bus during an undervoltage event on either supply pin.
Table 8-1. Undervoltage Lockout
VCC
DEVICE STATE
> UVVCC
< UVVCC
(1)
BUS
RXD PIN
Normal
Per TXD
Mirrors bus
Protected
High impedance
Weak pull-down to ground(1)
High impedance
VCC = GND, see ILKG(OFF) in Section 6.7
Once the undervoltage condition is cleared and tMODE has expired the TCAN1046 transitions to normal mode
and the host controller can send and receive CAN traffic again.
8.3.7 Unpowered Device
The TCAN1046 is designed to be an ideal passive or no load to the CAN bus if the device is unpowered. The
bus pins were designed to have low leakage currents when the device is unpowered, so they do not load the
bus. This is critical if some nodes of the network are unpowered while the rest of the of network remains
operational.
The logic pins also have low leakage currents when the device is unpowered, so they do not load other circuits
which may remain powered.
8.3.8 Floating pins
The TCAN1046 has internal pull-ups on critical pins which place the device into known states if the pin floats.
This internal bias should not be relied upon by design though, especially in noisy environments, but instead
should be considered a failsafe protection feature.
When a CAN controller supporting open-drain outputs is used an adequate external pull-up resistor must be
chosen. This ensures that the TXD output of the CAN controller maintains acceptable bit time to the input of the
CAN transceiver. See Table 8-2 for details on pin bias conditions.
Table 8-2. Pin Bias
Pin
Pull-up or Pull-down
Comment
TXD1 and TXD2
Pull-up
Weakly biases TXD1 and TXD2 towards recessive to prevent bus
blockage or TXD DTO triggering
STB1 and STB2
Pull-up
Weakly biases STB1 and STB2 towards low-power standby mode to
prevent excessive system power
8.4 Device Functional Modes
8.4.1 Operating Modes
The TCAN1046 has two main operating modes; normal mode and standby mode. Operating mode selection is
made by applying a high or low level to the STB1 and STB2 pins on the TCAN1046-Q1 device.
18
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Table 8-3. Operating Modes
STB
Device Mode
Driver
Receiver
RXD Pin
High
Low current standby mode with
bus wake-up
Disabled
Low-power receiver and bus
monitor enable
High (recessive) until valid WUP
is received
See section 8.3.3.1
Low
Normal Mode
Enabled
Enabled
Mirrors bus state
8.4.2 Normal Mode
This is the normal operating mode of the TCAN1046. The CAN driver and receiver are fully operational and CAN
communication is bi-directional. The driver is translating a digital input on the TXD1 and TXD2 inputs to a
differential output on the CANH1, CANL1 and CANH2, CANL2 bus pins. The receiver is translating the
differential signal from CANH1, CANL1 and CANH2, CANL2 to a digital output on the RXD1 and RXD2 outputs.
8.4.3 Standby Mode
This is the low-power mode of the TCAN1046. The CAN driver and main receiver are switched off and bidirectional CAN communication is not possible. The low-power receiver and bus monitor circuits are enabled to
allow for RXD wake-up requests via the CAN bus. A wake-up request is output to RXD1 or RXD2 depending on
the channel which received the WUP as shown in Figure 8-5. The local CAN protocol controller should monitor
RXD for transitions (high-to-low) and reactivate the device to normal mode by pulling the STB1 and STB2 pin
low . The CAN bus pins are weakly pulled to GND in this mode; see Figure 8-2 and Figure 8-3.
8.4.3.1 Remote Wake Request via Wake-Up Pattern (WUP) in Standby Mode
The TCAN1046 supports a remote wake-up request on both CAN channels that is used to indicate to the host
controller that the bus is active and the node should return to normal operation.
The device uses the multiple filtered dominant wake-up pattern (WUP) from the ISO 11898-2:2016 standard to
qualify bus activity. Once a valid WUP has been received, the wake request is indicated to the controller by a
falling edge and low period corresponding to a filtered dominant on the RXD1 or RXD2 output of the TCAN1046.
The WUP consists of a filtered dominant pulse, followed by a filtered recessive pulse, and finally by a second
filtered dominant pulse. The first filtered dominant initiates the WUP, and the bus monitor then waits on a filtered
recessive; other bus traffic does not reset the bus monitor. Once a filtered recessive is received the bus monitor
is waiting for a filtered dominant and again, other bus traffic does not reset the bus monitor. Immediately upon
reception of the second filtered dominant the bus monitor recognizes the WUP and drives the RXD1 or RXD2
output low every time an additional filtered dominant signal is received from the bus.
For a dominant or recessive to be considered filtered, the bus must be in that state for more than the tWK_FILTER
time. Due to variability in tWK_FILTER the following scenarios are applicable. Bus state times less than
tWK_FILTER(MIN) are never detected as part of a WUP and thus no wake request is generated. Bus state times
between tWK_FILTER(MIN) and tWK_FILTER(MAX) may be detected as part of a WUP and a wake-up request may be
generated. Bus state times greater than tWK_FILTER(MAX) are always detected as part of a WUP, and thus a wake
request is always generated. See Figure 8-5 for the timing diagram of the wake-up pattern.
The pattern and tWK_FILTER time used for the WUP prevents noise and bus stuck dominant faults from causing
false wake-up requests while allowing any valid message to initiate a wake-up request.
The ISO 11898-2:2016 standard has defined times for a short and long wake-up filter time. The tWK_FILTER timing
for the device has been picked to be within the minimum and maximum values of both filter ranges. This timing
has been chosen such that a single bit time at 500 kbps, or two back-to-back bit times at 1 Mbps triggers the
filter in either bus state. Any CAN frame at 500 kbps or less would contain a valid WUP.
For an additional layer of robustness and to prevent false wake-ups, the device implements a wake-up timeout
feature. For a remote wake-up event to successfully occur, the entire WUP must be received within the timeout
value t ≤ tWK_TIMEOUT. If not, the internal logic is reset and the transceiver remains in its current state without
waking up. The full pattern must then be transmitted again, conforming to the constraints mentioned in this
section. See Figure 8-5 for the timing diagram of the wake-up pattern with wake timeout feature.
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Bus Wake via RXD
Request
Wake Up Pattern (WUP) received in t < tWK_Timeout
Filtered
Dominant
Filtered
Recessive
Waiting for
Filtered
Recessive
Filtered
Dominant
Waiting for
Filtered
Dominant
Bus
Bus VDiff
• tWK_FILTER
• tWK_FILTER
• tWK_FILTER
• tWK_FILTER
RXD
Filtered Dominant RXD Output
Bus Wake Via RXD Requests
Figure 8-5. Wake-Up Pattern (WUP) with tWK_TIMEOUT
8.4.4 Driver and Receiver Function
The digital logic input and output levels for the TCAN1046 are CMOS levels with respect to VCC and are
compatibility with protocol controllers having 5 V I/O levels.
Table 8-4. Driver Function Table
Device Mode
Normal
Standby
(1)
(2)
(3)
TXD Input
Bus Outputs
Driven Bus State(2)
CANH
CANL
Low
High
Low
Dominant
High or open
High impedance
High impedance
Biased recessive(3)
X(1)
High impedance
High impedance
Weak pull-down to ground(3)
X = irrelevant
For bus state and bias see Figure 8-2 and Figure 8-3
See RIN in Section 6.7
Table 8-5. Receiver Function Table Normal and Standby Mode
Device Mode
Normal
Standby
Any
20
CAN Differential Inputs
VID = VCANH – VCANL
Bus State
RXD Pin
VID ≥ 0.9 V
Dominant
Low
0.5 V < VID < 0.9 V
Undefined
Undefined
VID ≤ 0.5 V
Recessive
High
VID ≥ 1.15 V
Dominant
0.4 V < VID < 1.15 V
Undefined
VID ≤ 0.4 V
Recessive
High
Low if a remote wake event
occurred
See Figure 8-5
Open (VID ≈ 0 V)
Open
High
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
9.1 Application Information
9.2 Typical Application
The TCAN1046 transceiver can be used in applications with a host controller or FPGA that includes the link layer
portion of the CAN protocol. Figure 9-1 shows a typical configuration for 5 V controller applications. The bus
termination is shown for illustrative purposes.
VIN
VIN
VOUT
5V Voltage
Regulator
(e.g. TPSxxxx)
4
VDD
GPIO
RXD2
CAN FD
Controller
TXD2
14
4
1
11
VCC2
VCC1
CANH1
13
STB1
RXD1
TXD1
CANL1
12
System Controller
Optional:
Terminating
Node
TCAN1046-Q1
Dual CAN FD
Transceiver
GPIO
RXD2
CAN FD
Controller
TXD2
8
7
6
Optional:
Filtering,
Transient and
ESD
STB2
RXD2
CANH2
10
TXD2
CANL2
9
Optional:
Terminating
Node
Optional:
Filtering,
Transient and
ESD
Figure 9-1. Transceiver Application Using 5 V I/O Connections
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9.2.1 Design Requirements
9.2.1.1 CAN Termination
Termination may be a single 120-Ω resistor at each end of the bus, either on the cable or in a terminating node.
If filtering and stabilization of the common-mode voltage of the bus is desired then split termination may be used,
see Figure 9-2. Split termination improves the electromagnetic emissions behavior of the network by filtering
higher-frequency common-mode noise that may be present on the differential signal lines.
Standard Termination
Split Termination
CANH
CANH
RTERM/2
TCAN Transceiver
RTERM
TCAN Transceiver
CSPLIT
RTERM/2
CANL
CANL
Figure 9-2. CAN Bus Termination Concepts
9.2.2 Detailed Design Procedures
9.2.2.1 Bus Loading, Length and Number of Nodes
A typical CAN application may have a maximum bus length of 40 meters and maximum stub length of 0.3 m.
However, with careful design, users can have longer cables, longer stub lengths, and many more nodes to a
bus. A high number of nodes requires a transceiver with high input impedance such as the TCAN1046.
Many CAN organizations and standards have scaled the use of CAN for applications outside the original ISO
11898-2 standard. They made system level trade off decisions for data rate, cable length, and parasitic loading
of the bus. Examples of these CAN systems level specifications are ARINC 825, CANopen, DeviceNet, SAE
J2284, SAE J1939, and NMEA 2000.
A CAN network system design is a series of tradeoffs. In the ISO 11898-2:2016 specification the driver
differential output is specified with a bus load that can range from 50 Ω to 65 Ω where the differential output must
be greater than 1.5 V. The TCAN1046 is specified to meet the 1.5-V requirement down to 50 Ω and is specified
to meet 1.4-V differential output at 45Ω bus load. The differential input resistance of the TCAN1046 is a minimum
of 40 kΩ. If 100 TCAN1046 transceivers are in parallel on a bus, this is equivalent to a 400-Ω differential load in
parallel with the nominal 60 Ω bus termination which gives a total bus load of approximately 52 Ω. Therefore, the
TCAN1046 theoretically supports over 100 transceivers on a single bus segment. However, for a CAN network
design margin must be given for signal loss across the system and cabling, parasitic loadings, timing, network
imbalances, ground offsets and signal integrity thus a practical maximum number of nodes is often lower. Bus
length may also be extended beyond 40 meters by careful system design and data rate tradeoffs. For example,
CANopen network design guidelines allow the network to be up to 1 km with changes in the termination
resistance, cabling, less than 64 nodes and significantly lowered data rate.
This flexibility in CAN network design is one of the key strengths of the various extensions and additional
standards that have been built on the original ISO 11898-2 CAN standard. However, when using this flexibility
the CAN network system designer must take the responsibility of good network design to ensure robust network
operation.
22
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Node 1
Node 2
Node 3
System Controller
System Controller
System Controller
CAN FD
Controller
CAN FD
Controller
CAN FD
Controller
TCAN1046-Q1
TCAN1044-Q1
TCAN1046V-Q1
Node n
(with termination)
System Controller
CAN FD
Controller
TCAN1046-Q1
RTERM
RTERM
RTERM
RTERM
Figure 9-3. Typical CAN Bus
9.2.3 Application Curves
VCC = 5 V
RL = 60 Ω
Figure 9-4. tPROP(LOOP1) Transceiver 1 &
Transceiver 2
VCC = 5 V
RL = 60 Ω
Figure 9-5. tPROP(LOOP2) Transceiver 1 &
Transceiver 2
10 Power Supply Recommendations
The TCAN1046 dual transceiver is designed to operate with a main VCC1 and VCC2 input voltage supply range
between 4.5 V and 5.5 V. The VCC supply inputs must be well regulated. A decoupling capacitor, typically 100 nF,
should be placed near the CAN transceiver's main VCC1 and VCC2 supply pins.
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Layout
Robust and reliable CAN node design may require special layout techniques depending on the application and
automotive design requirements. Since transient disturbances have high frequency content and a wide
bandwidth, high-frequency layout techniques should be applied during PCB design.
11.1 Layout Guidelines
•
Place the protection and filtering circuitry close to the bus connector, J1, to prevent transients, ESD, and
noise from propagating onto the board. This layout example shows optional transient voltage suppression
(TVS) diodes, D1 and D2, which may be implemented if the system-level requirements exceed the specified
rating of the transceiver. This example also shows optional bus filter capacitors C4, C5, C6, and C8.
Design the bus protection components in the direction of the signal path. Do not force the transient current to
divert from the signal path to reach the protection device.
Decoupling capacitors should be placed as close as possible to the supply pins VCC1 and VCC2 of the
transceiver.
Use at least two vias for supply and ground connections of bypass capacitors and protection devices to
minimize trace and via inductance.
•
•
•
Note
High frequency current follows the path of least impedance and not the path of least resistance.
•
This layout example shows how split termination could be implemented on the CAN node. The termination is
split into two pairs of resistors, R7, R8, R9, and R10, with the center or split tap of the termination connected
to ground via capacitors C3 and C7. Split termination provides common mode filtering for the bus. See
Section 9.2.1.1, Section 8.3.4, and Equation 2 for information on termination concepts and power ratings
needed for the termination resistor(s).
11.2 Layout Example
C4
L1(optional)
R1
TXD1
STB1
R7
R3
C3
GND
D1
GND1
CANH1
VCC1
CANL1
R4
GND
C1
VCC1
R8
C5
R2
RXD1
STB2
TXD2
CANH2
GND2
CANL2
GND
J1
C6
L2(optional)
R9
R5
C2
C7
VCC2
VCC2
RXD2
GND
D2
R6
R10
C8
Not to scale
Figure 11-1. Layout Example
24
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to order now.
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
27-Sep-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TCAN1046DMTRQ1
ACTIVE
VSON
DMT
14
3000
RoHS & Green
NIPDAU | SN
Level-2-260C-1 YEAR
-40 to 125
1046
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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