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TL1431, TL1431M
SLVS062N – DECEMBER 1991 – REVISED OCTOBER 2016
TL1431 Precision Programmable Reference
1 Features
3 Description
•
•
•
•
•
•
The TL1431 device is a precision programmable
reference with specified thermal stability over
automotive, commercial, and military temperature
ranges. The output voltage can be set to any value
between VI(ref) (approximately 2.5 V) and 36 V with
two external resistors (see Figure 25). This device
has a typical output impedance of 0.2 Ω. Active
output circuitry provides a sharp turnon characteristic,
making the device an excellent replacement for Zener
diodes and other types of references in applications
such as onboard regulation, adjustable power
supplies, and switching power supplies.
1
0.4% Initial Voltage Tolerance
0.2-Ω Typical Output Impedance
Fast Turnon (500 ns)
Sink Current Capability (1 mA to 100 mA)
Low Reference Current (REF)
Adjustable Output Voltage (VI(ref) to 36 V)
2 Applications
•
•
•
•
•
Adjustable Voltage and Current Referencing
Secondary Side Regulation in Flyback SMPSs
Zener Replacement
Voltage Monitoring
Comparator With Integrated Reference
The TL1431C is characterized for operation over the
commercial temperature range of 0°C to 70°C. The
TL1431Q is characterized for operation over the full
automotive temperature range of –40°C to 125°C.
The TL1431M is characterized for operation over the
full military temperature range of –55°C to 125°C.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TL1431D
SOIC (8)
3.90 mm × 4.90 mm
TL1431PW
TSSOP (8)
4.40 mm × 3.00 mm
TL1431LP
TO-92 (3)
4.83 mm × 3.68 mm
TL1431MJG
CDIP (8)
9.58 mm x 6.67 mm
TL1431MFK
LCCC (20)
8.89 mm x 8.89 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
Input
VKA
IKA
Vref
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TL1431, TL1431M
SLVS062N – DECEMBER 1991 – REVISED OCTOBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
4
4
4
4
5
6
7
8
Absolute Maximum Ratings ......................................
ESD Ratings – TL1431C, TL1431Q..........................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics – TL1431C........................
Electrical Characteristics – TL1431Q........................
Electrical Characteristics – TL1431M .......................
Typical Characteristics ..............................................
Parameter Measurement Information ................ 10
Detailed Description ............................................ 12
8.1 Overview ................................................................ 12
8.2 Functional Block Diagram ....................................... 12
8.3 Feature Description ................................................ 13
8.4 Device Functional Modes........................................ 14
9
Application and Implementation ........................ 15
9.1 Application Information............................................ 15
9.2 Typical Application .................................................. 15
9.3 System Examples ................................................... 17
10 Power Supply Recommendations ..................... 20
11 Layout................................................................... 20
11.1 Layout Guidelines ................................................. 20
11.2 Layout Example .................................................... 20
12 Device and Documentation Support ................. 21
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
21
21
21
21
21
21
21
13 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
Changes from Revision M (April 2012) to Revision N
Page
•
Added Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section....................................... 1
•
Deleted ORDERING INFORMATION table; see POA at the end of the data sheet .............................................................. 1
•
Changed RθJA for D, LP and PW package from: 97 °C/W to 114.7 °C/W (D), 140 °C/W to 157 °C/W (LP) and 149
°C/W to 172.4 °C/W (PW) in the Thermal Information table. ................................................................................................. 4
•
Changed RθJC(bot) for FK and JG package from: 5.61 °C/W to 9.5 °C/W (FK) and 14.5 °C/W to 9.5 °C/W (JG) in the
Thermal Information table....................................................................................................................................................... 4
Changes from Revision L (October 2007) to Revision M
•
2
Page
Added Ammo option to the LP package in the ORDERING INFORMATION table. .............................................................. 2
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SLVS062N – DECEMBER 1991 – REVISED OCTOBER 2016
5 Pin Configuration and Functions
D Package
8-Pin SOIC
Top View
LP Package
3-Pin TO-92
Top View
CATHODE
1
8
REF
ANODE
2
7
ANODE
ANODE
3
6
ANODE
NC
4
5
NC
CATHODE
ANODE
REF
Not to scale
NC
REF
NC
19
CATHODE
2
20
NC
3
JG or PW Package
8-Pin CDIP or TSSOP
Top View
1
FK Package
20-Pin LCCC
Top View
ANODE terminals are connected internally
NC
4
18
NC
NC
NC
5
17
NC
NC
6
16
NC
NC
7
15
ANODE
NC
8
14
NC
NC
Not to scale
13
ANODE
5
12
6
4
NC
3
NC
11
NC
10
NC
NC
REF
7
NC
8
2
9
1
NC
NC
CATHODE
Not to scale
Pin Functions
PIN
NAME
ANODE
SOIC
CDIP,
TSSOP
TO-92
LCCC
I/O
DESCRIPTION
2, 3, 6, 7
6
2
15
O
Common pin, normally connected to ground
CATHODE
1
1
1
2
I/O
Shunt current/voltage input
REF
8
8
3
20
I
—
1, 3, 4, 5, 6, 7, 8, 9, 10, 11,
12, 13, 14, 16, 17, 18, 19
—
NC
4, 5
2, 3, 4, 5, 7
Threshold relative to common ground
No internal connection
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SLVS062N – DECEMBER 1991 – REVISED OCTOBER 2016
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
Cathode voltage, VKA (2)
UNIT
37
V
Continuous cathode current, IKA
–100
150
mA
Reference input current, II(ref)
–0.05
10
mA
260
°C
150
°C
150
°C
Lead temperature, 1.6 mm (1/16 in) from case for 10 s
Junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to ANODE, unless otherwise noted.
6.2 ESD Ratings – TL1431C, TL1431Q
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
VKA
Cathode voltage
IKA
Cathode current
TA
Operating free-air temperature
MIN
MAX
VI(ref)
36
V
mA
1
100
TL1431C
0
70
TL1431Q
–40
125
TL1431M
–55
125
UNIT
°C
6.4 Thermal Information
TL1431M (2)
TL1431
THERMAL METRIC (1)
LP
(TO-92)
D
(SOIC)
PW
(TSSOP)
JG
(CDIP)
FK
(LCCC)
UNIT
3 PINS
8 PINS
8 PINS
8 PINS
20 PINS
RθJA
Junction-to-ambient thermal
resistance
157
114.7
172.4
—
—
°C/W
RθJC(top)
Junction-to-case (top) thermal
resistance
80.7
59
55.2
69.7
55.5
°C/W
RθJB
Junction-to-board thermal
resistance
—
55.4
100.8
99
54.2
°C/W
ψJT
Junction-to-top characterization
parameter
24.6
12
5
—
—
°C/W
ψJB
Junction-to-board characterization
parameter
136.4
54.8
99
—
—
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal
resistance
—
—
—
21
9.5
°C/W
(1)
(2)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
RθJC based on MIL-STD-883, and RθJB based on JESD51.
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6.5 Electrical Characteristics – TL1431C
at specified free-air temperature and IKA = 10 mA (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
TA = 25°C
2490
2500
2510
TA = 0°C to 70°C
2480
VI(ref)
Reference input voltage
VKA = VI(ref)
(see Figure 13)
VI(dev)
Deviation of reference input voltage
over full temperature range (1)
VKA = VI(ref), TA = 0°C to 70°C
(see Figure 13)
∆VI(ref)
∆VKA
Ratio of change in reference input
voltage to the change in cathode
voltage
ΔVKA = 3 V to 36 V, TA = 0°C to 70°C
(see Figure 14)
II(ref)
Reference input current
R1 = 10 kΩ, R2 = ∞
(see Figure 14)
II(dev)
Deviation of reference input current
over full temperature range (1)
R1 = 10 kΩ, R2 = ∞, TA = 0°C to 70°C
(see Figure 14)
0.2
Imin
Minimum cathode current for regulation VKA = VI(ref), TA = 25°C (see Figure 13)
TA = 25°C
Off-state cathode current
|zKA|
Output impedance (2)
VKA = VI(ref), f ≤ 1 kHz,
IKA = 1 mA to 100 mA, TA = 25°C
(see Figure 13)
(1)
4
20
mV
–1.1
–2
mV/V
1.5
2.5
µA
3
TA = 25°C
Ioff
mV
2520
TA = 0°C to 70°C
VKA = 36 V, VI(ref) = 0
(see Figure 15)
UNIT
1.2
µA
0.45
1
mA
0.18
0.5
TA = 0°C to 70°C
µA
2
0.2
0.4
Ω
The deviation parameters VI(dev) and II(dev) are defined as the differences between the maximum and minimum values obtained over the
rated temperature range. The average full-range temperature coefficient of the reference input voltage αVI(ref) is defined as:
αVI(ref)
=
( ppm
°C (
(
V
V
I(dev)
I(ref)
°
at 25 C
(
6
× 10
Max VI(ref)
TA
VI(dev)
where:
∆TA is the rated operating temperature range of the device.
Min VI(ref)
˙TA
(2)
αVI(ref) is positive or negative, depending on whether minimum VI(ref) or maximum VI(ref), respectively, occurs at the lower temperature.
∆VKA
|zKA| =
∆IKA
The output impedance is defined as:
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by:
|z'| = ∆V
|z | 1 + R1
R2 .
∆I , which is approximately equal to KA
(
(
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6.6 Electrical Characteristics – TL1431Q
at specified free-air temperature and IKA = 10 mA (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
TA = 25°C
2490
2500
2510
TA = –40°C to 125°C
2470
VI(ref)
Reference input voltage
VKA = VI(ref)
(see Figure 13)
VI(dev)
Deviation of reference input voltage
over full temperature range (1)
VKA = VI(ref), TA = –40°C to 125°C
(see Figure 13)
∆VI(ref)
∆VKA
Ratio of change in reference input
voltage to the change in cathode
voltage
ΔVKA = 3 V to 36 V, TA = –40°C to 125°C
(see Figure 14)
II(ref)
Reference input current
R1 = 10 kΩ, R2 = ∞
(see Figure 14)
II(dev)
Deviation of reference input current
over full temperature range (1)
R1 = 10 kΩ, R2 = ∞, TA = –40°C to 125°C
(see Figure 14)
Imin
Minimum cathode current for
regulation
VKA = VI(ref), TA = 25°C (see Figure 13)
Ioff
Off-state cathode current
VKA = 36 V, VI(ref) = 0
(see Figure 15)
|zKA|
Output impedance (2)
VKA = VI(ref), f ≤ 1 kHz,
IKA = 1 mA to 100 mA, TA = 25°C
(see Figure 13)
(1)
TA = 25°C
2530
mV
17
55
mV
–1.1
–2
mV/V
1.5
2.5
TA = –40°C to 125°C
4
TA = 25°C
UNIT
µA
0.5
2
µA
0.45
1
mA
0.18
0.5
TA = –40°C to 125°C
2
0.2
0.4
µA
Ω
The deviation parameters VI(dev) and II(dev) are defined as the differences between the maximum and minimum values obtained over the
rated temperature range. The average full-range temperature coefficient of the reference input voltage αVI(ref) is defined as:
αVI(ref)
=
( ppm
°C (
(
V
V
I(dev)
I(ref)
°
at 25 C
(
6
× 10
Max VI(ref)
TA
VI(dev)
where:
∆TA is the rated operating temperature range of the device.
Min VI(ref)
˙TA
(2)
αVI(ref) is positive or negative, depending on whether minimum VI(ref) or maximum VI(ref), respectively, occurs at the lower temperature.
∆VKA
|zKA| =
∆IKA
The output impedance is defined as:
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by:
|z'| = ∆V
|z | 1 + R1
R2 .
∆I , which is approximately equal to KA
(
6
(
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6.7 Electrical Characteristics – TL1431M
at specified free-air temperature and IKA = 10 mA (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
TA = 25°C
2475
2500
2540
TA = –55°C to 125°C
2460
VI(ref)
Reference input voltage
VKA = VI(ref)
(see Figure 13)
VI(dev)
Deviation of reference input voltage
over full temperature range (1)
VKA = VI(ref), TA = –55°C to 125°C
(see Figure 13)
∆VI(ref)
∆VKA
Ratio of change in reference input
voltage to the change in cathode
voltage
ΔVKA = 3 V to 36 V, TA = –55°C to 125°C
(see Figure 14)
II(ref)
Reference input current
R1 = 10 kΩ, R2 = ∞
(see Figure 14)
II(dev)
Deviation of reference input current
over full temperature range (1)
R1 = 10 kΩ, R2 = ∞, TA = –55°C to 125°C
(see Figure 14)
Imin
Minimum cathode current for
regulation
Ioff
Off-state cathode current
VKA = 36 V, VI(ref) = 0
(see Figure 15)
|zKA|
Output impedance (3)
VKA = VI(ref), f ≤ 1 kHz,
IKA = 1 mA to 100 mA, TA = 25°C
(see Figure 13)
(1)
TA = 25°C
UNIT
mV
2550
17
55 (2)
–1.1
–2
1.5
2.5
TA = –55°C to 125°C
mV
mV/V
µA
5
0.5
3 (2)
µA
VKA = VI(ref), TA = 25°C (see Figure 13)
0.45
1
mA
TA = 25°C
0.18
0.5
TA = –55°C to 125°C
µA
2
0.2
0.4
Ω
The deviation parameters VI(dev) and II(dev) are defined as the differences between the maximum and minimum values obtained over the
rated temperature range. The average full-range temperature coefficient of the reference input voltage αVI(ref) is defined as:
αVI(ref)
=
( ppm
°C (
(
V
V
I(dev)
I(ref)
°
at 25 C
(
6
× 10
Max VI(ref)
TA
VI(dev)
where:
∆TA is the rated operating temperature range of the device.
Min VI(ref)
˙TA
(2)
(3)
αVI(ref) is positive or negative, depending on whether minimum VI(ref) or maximum VI(ref), respectively, occurs at the lower temperature.
On products compliant to MIL-PRF-38535, this parameter is not production tested.
∆VKA
|zKA| =
∆IKA
The output impedance is defined as:
When the device is operating with two external resistors (see Figure 2), the total dynamic impedance of the circuit is given by:
|z'| = ∆V
|z | 1 + R1
R2 .
∆I , which is approximately equal to KA
(
(
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6.8 Typical Characteristics
Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the
various devices.
Table 1. Table Of Graphs
GRAPH
FIGURE
Reference voltage vs Free-air temperature
Figure 1
Reference current vs Fire-air temperature
Figure 2
Cathode current vs Cathode voltage
Figure 3, Figure 4
Off-state cathode current vs Free-air temperature
Figure 5
Ratio of delta reference voltage to delta cathode voltage vs Free-air temperature
Figure 6
Equivalent input-noise voltage vs Frequency
Figure 7
Equivalent input-noise voltage over a 10-second period
Figure 8
Small-signal voltage amplification vs Frequency
Figure 9
Reference impedance vs Frequency
Figure 10
Pulse response
Figure 11
Stability boundary conditions
Figure 12
2.5
2.52
2.51
2.5
2.49
2.48
− 50
2
I I(ref) − Reference Current − µ A
VI(ref) − Reference Voltage − V
VI(ref) = VKA
IKA = 10 mA
0
− 25
25
75
50
100
IKA = 10 mA
R1 = 10 kΩ
R2 = ∞
1.5
1
0.5
0
− 50
125
− 25
TA − Free-Air Temperature − °C
Figure 1. Reference Voltage vs Free-Air Temperature
800
VKA = VI(ref)
TA = 25°C
VKA = VI(ref)
TA = 25°C
600
I KA − Cathode Current − µ A
I KA − Cathode Current − mA
100
50
0
− 50
− 100
−2
−1
0
1
2
3
400
200
0
− 200
−2
VKA − Cathode Voltage − V
−1
0
1
2
3
4
VKA − Cathode Voltage − V
Figure 3. Cathode Current vs Cathode Voltage
8
125
Figure 2. Reference Current vs Free-Air Temperature
150
− 150
−3
0
25
50
75
100
TA − Free-Air Temperature − °C
Figure 4. Cathode Current vs Cathode Voltage
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−0.85
0.35
VKA = 3 V to 36 V
VKA = 36 V
VI(ref) = 0
−0.95
0.3
∆V I(ref) /∆VKA − mV/V
I KA(off) − Off-State Cathode Current − µ A
0.4
0.25
0.2
0.15
−1.05
−1.15
−1.25
0.1
−1.35
0.05
0
−50
− 25
0
25
50
100
75
−1.45
−50
125
− 25
Figure 5. Off-State Cathode Current vs Free-Air Temperature
25
50
75
100
125
Figure 6. Ratio Of Delta Reference Voltage
To Delta Cathode Voltage vs Free-Air Temperature
6
260
5
Vn − Equivalent Input-Noise Voltage − mV
Hz
IO = 10 mA
TA = 25°C
240
Vn − Equivalent Input-Noise Voltage − nV/
0
TA − Free-Air Temperature − °C
TA − Free-Air Temperature − °C
220
200
180
160
140
120
4
3
2
1
0
−1
−2
−3
−4
f = 0.1 to 10 Hz
IKA = 10 mA
TA = 25°C
−5
−6
100
10
100
1k
10 k
100 k
0
2
4
8
6
10
f − Frequency − Hz
t − Time − s
Figure 7. Equivalent Input-Noise Voltage vs Frequency
Figure 8. Equivalent Input-Noise Voltage
Over A 10-S Period
100
IKA = 10 mA
TA = 25°C
IKA = 1 mA to 100 mA
TA = 25°C
50
W
|zka
|z
KA | − Reference Impedance − O
AV − Small-Signal Voltage Amplification − dB
60
40
30
20
10
0
1k
10 k
100 k
1M
10 M
10
1
0.1
1k
f − Frequency − Hz
10 k
100 k
1M
10 M
f − Frequency − Hz
Figure 9. Small-Signal Voltage Amplification vs Frequency
Figure 10. Reference Impedance vs Frequency
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100
TA = 25°C
90
Input
80
I KA − Cathode Current − mA
Input and Output Voltages − V
5
4
3
Output
2
A-VKA = VI(ref)
B-VKA = 5 V
C-VKA = 10 V
D-VKA = 15 V
IKA = 10 mA
TA = 25°C
70
Stable
60
B
Stable
C
50
40
A
30
D
20
1
10
0
0
1
2
3
4
t − Time − µs
5
6
0
0.001
7
0.01
0.1
10
1
CL − Load Capacitance − µF
Figure 11. Pulse Response
The areas under the curves represent conditions that may cause the
device to oscillate. For curves B, C, and D, R2 and V+ are adjusted
to establish the initial VKA and IKA conditions, with CL = 0. VBATT and
CL then are adjusted to determine the ranges of stability.
Figure 12. Stability Boundary Conditions
7 Parameter Measurement Information
VKA
Input
Input
VKA
IKA
IKA
R1
VI(ref)
II(ref)
Figure 13. Test Circuit For V(KA) = Vref
Input
R1 ö
æ
VKA = VI(ref ) ç 1 +
+ I I(ref ) ´ R1
R2 ÷ø
è
VI(ref)
R2
Figure 14. Test Circuit For V(KA) > Vref
19.1 V
VKA
1 kW
Ioff
910 W
2000 µF
VCC
VCC
500 µF
TL1431
(DUT)
+
TLE2027
AV = 10 V/mV
−
16 W
820 W
1 mF
+
16 W
16 W
TLE2027
−
2.2 µF
1 µF
160 kW
33 k W
AV = 2 V/V
0.1 µF
CRO 1 MW
33 k W
VEE
VEE
Copyright © 2016, Texas Instruments Incorporated
Figure 15. Test Circuit For Ioff
10
Figure 16. Test Circuit For 0.1-Hz To 10-Hz
Equivalent Input-Noise Voltage
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Parameter Measurement Information (continued)
Output
I(K)
1 kW
Output
15 kW
230 W
I(K)
9 mF
50 W
+
−
8.25 kW
−
+
GND
GND
Figure 17. Test Circuit For Voltage Amplification
VI
220 W
Figure 18. Test Circuit For Reference Impedance
150 W
Output
IKA
VI
+
Pulse
Generator
f = 100 kHz
CL
VBATT
50 W
−
GND
Test Circuit for Curve A
R1 =
10 kW
IKA
150 W
CL
VI
+
VBATT
R2
−
Test Circuit for Curves B, C, and D
Figure 19. Test Circuit For Pulse Response
Figure 20. Test Circuits For Curves A Through D
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8 Detailed Description
8.1 Overview
The TL1431 device has proven ubiquity and versatility across a wide range of applications, ranging from power
to signal path. This is due to its key components containing an accurate voltage reference and op amp, which
are very fundamental analog building blocks. TL1431 is used in conjunction with its key components to behave
as a single voltage reference, error amplifier, voltage clamp, or comparator with integrated reference. TL1431
can be operated and adjusted to cathode voltages from 2.5 V to 36 V, making this part optimum for a wide range
of end equipments in industrial, auto, telecom, and computing. In order for this device to behave as a shunt
regulator or error amplifier, >1 mA (Imin(max)) must be supplied in to the cathode pin. Under this condition,
feedback can be applied from the Cathode and Ref pins to create a replica of the internal reference voltage.
Various reference voltage options can be purchased with initial tolerances (at 25°C) of 0.4% and 1%. The
TL1431C devices are characterized for operation from 0°C to 70°C, the TL1431Q devices are characterized for
operation from –40°C to 125°C, and the TL1431M devices are characterized for operation from –55°C to 125°C.
8.2 Functional Block Diagram
CATHODE
REF
+
±
VREF
ANODE
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Figure 21. Equivalent Schematic
12
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Functional Block Diagram (continued)
CATHODE
1
800 Ω
REF
800 Ω
8
20 pF
150 Ω
4 kΩ
3.28 kΩ
10 kΩ
2.4 kΩ
20 pF
7.2 kΩ
1 kΩ
800 Ω
ANODE
2, 3, 6, 7
Copyright © 2016, Texas Instruments Incorporated
(1)
All component values are nominal.
(2)
Pin numbers shown are for the D package.
Figure 22. Detailed Schematic
8.3 Feature Description
TL1431 consists of an internal reference and amplifier that outputs a sink current base on the difference between
the reference pin and the virtual internal pin. The sink current is produced by the internal Darlington pair, shown
in Figure 22. A Darlington pair is used in order for this device to be able to sink a maximum current of 100 mA.
When operated with enough voltage headroom (≥ 2.5 V) and cathode current (IKA), TL1431 forces the reference
pin to 2.5 V. However, the reference pin can not be left floating, as it needs IREF ≥ 5 µA (see Electrical
Characteristics – TL1431M). This is because the reference pin is driven into an npn, which needs base current to
operate properly. When feedback is applied from the cathode and reference pins, TL1431 behaves as a Zener
diode, regulating to a constant voltage dependent on current being supplied into the cathode. This is due to the
internal amplifier and reference entering the proper operating regions. The same amount of current needed in the
above feedback situation must be applied to this device in open loop, servo, or error amplifying implementations
in order for it to be in the proper linear region giving TL1431 enough gain. Unlike many linear regulators, TL1431
is internally compensated to be stable without an output capacitor between the cathode and anode. However, if
desired an output capacitor can be used as a guide to assist in choosing the correct capacitor to maintain
stability.
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8.4 Device Functional Modes
8.4.1 Open Loop (Comparator)
When the cathode or output voltage or current of TL1431 is not being fed back to the reference or input pin in
any form, this device is operating in open loop. With proper cathode current (IKA) applied to this device, TL1431
has the characteristics shown in Figure 22. With such high gain in this configuration, TL1431 is typically used as
a comparator. With the reference integrated makes TL1431 the preferred choice when users are trying to monitor
a certain level of a single signal.
8.4.2 Closed Loop
When the cathode or output voltage or current of TL1431 is being fed back to the reference or input pin in any
form, this device is operating in closed loop. The majority of applications involving TL1431 use it in this manner
to regulate a fixed voltage or current. The feedback enables this device to behave as an error amplifier,
computing a portion of the output voltage and adjusting it to maintain the desired regulation. This is done by
relating the output voltage back to the reference pin in a manner to make it equal to the internal reference
voltage, which can be accomplished through resistive or direct feedback.
14
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
As the TL1431 device has many applications and setups, there are many situations that this datasheet cannot
characterize in detail. The linked application notes help the designer make the best choices when using this part.
Understanding Stability Boundary Conditions Charts in TL431, TL432 Data Sheet (SLVA482) provides a deeper
understanding of this devices stability characteristics and aid the user in making the right choices when choosing
a load capacitor. Setting the Shunt Voltage on an Adjustable Shunt Regulator (SLVA445) assists designers in
setting the shunt voltage to achieve optimum accuracy for this device.
9.2 Typical Application
Vo = (1+ R1/R2) Vref
Rsup
Vsup
R1
0.1%
CATHODE
REF
R2
0.1%
Cl
ANODE
Copyright © 2016, Texas Instruments Incorporated
Figure 23. Comparator Application Schematic
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 2 as the input parameters.
Table 2. Design Parameters
PARAMETER
VALUE
Reference initial accuracy
0.4%
Supply voltage
48 V
Cathode current (IK)
50 µA
Output voltage level
2.5 V to 36 V
Load capacitance
1 nF
Feedback resistor values and
accuracy (R1 and R2)
10 kΩ
9.2.2 Detailed Design Procedure
When using TL1431 as a shunt regulator, determine the following:
• Input voltage range
• Temperature range
• Total accuracy
• Cathode current
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•
•
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Reference initial accuracy
Output capacitance
9.2.2.1 Programming Output/Cathode Voltage
To program the cathode voltage to a regulated voltage a resistive bridge must be shunted between the cathode
and anode pins with the mid point tied to the reference pin. This can be seen in Figure 23, with R1 and R2 being
the resistive bridge. The cathode/output voltage in the shunt regulator configuration can be approximated by the
equation shown in Figure 23. The cathode voltage can be more accurately determined by taking in to account
the cathode current with Equation 1.
Vo = (1 + R1 / R2) × VREF – IREF × R1
(1)
For this equation to be valid, TL1431 must be fully biased so that it has enough open loop gain to mitigate any
gain error. This can be done by meeting the Imin specification denoted in Electrical Characteristics – TL1431M.
9.2.2.2 Total Accuracy
When programming the output above unity gain (VKA=VREF), TL1431 is susceptible to other errors that may effect
the overall accuracy beyond VREF. These errors include:
• R1 and R2 accuracies
• VI(dev) – Change in reference voltage over temperature
• ΔVREF / ΔVKA – Change in reference voltage to the change in cathode voltage
• |zKA| – Dynamic impedance, causing a change in cathode voltage with cathode current
Worst case cathode voltage can be determined taking all of the variables in to account.
9.2.2.3 Stability
Though TL1431 is stable with no capacitive load, the device that receives the shunt regulator's output voltage
could present a capacitive load that is within the TL1431 region of stability, shown in Figure 12. Also, designers
may use capacitive loads to improve the transient response or for power supply decoupling. When using
additional capacitance between Cathode and Anode, refer to Figure 12.
9.2.2.4 Start-up Time
As shown in Figure 24, TL1431 has a fast response up to approximately 2 V and then slowly charges to its
programmed value. This is due to the compensation capacitance the TL1431 has to meet its stability criteria.
Despite the secondary delay, TL1431 still has a fast response suitable for many clamp applications.
9.2.3 Application Curve
6
TA = 25°C
Input
Input and Output Voltages − V
5
4
3
Output
2
1
0
0
1
2
3
4
t − Time − µs
5
6
7
Figure 24. TL1431 Start-up Response
16
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9.3 System Examples
Table 3 lists example circuits of the TL1431.
Table 3. Table Of Example Circuits
APPLICATION
FIGURE
Shunt regulator
Figure 25
Single-supply comparator with temperature-compensated threshold
Figure 26
Precision high-current series regulator
Figure 27
Output control of a three-terminal fixed regulator
Figure 28
Higher-current shunt regulator
Figure 29
Crowbar
Figure 30
Precision 5-V, 1.5-A, 0.5% regulator
Figure 31
5-V precision regulator
Figure 32
PWM converter with 0.5% reference
Figure 33
Voltage monitor
Figure 34
Delay timer
Figure 35
Precision current limiter
Figure 36
Precision constant-current sink
Figure 37
R
V(BATT)
V(BATT)
VO
R1
0.1%
VI(ref)
VO
TL1431
R2
0.1%
Von ≈ 2 V
Voff ≈ V(BATT)
Input
TL1431
VIT = 2.5 V
R1 ö
æ
VO = ç 1 +
VI(ref)
R2 ÷ø
è
GND
Copyright © 2016, Texas Instruments Incorporated
R must provide cathode current ≥1 mA to the TL1431 at minimum
V(BATT).
Figure 25. Shunt Regulator
Copyright © 2016, Texas Instruments Incorporated
Figure 26. Single-Supply Comparator
With Temperature-Compensated Threshold
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V(BATT)
V(BATT)
R
In
µA7805
2N2222
Out
VO
30 Ω
2N2222
TL1431
0.01 µF
Common
R1
TL1431
R2
4.7 kΩ
VO
R1
0.1%
R2
0.1%
R1 ö
æ
V = ç1 +
VI(ref )
R2 ÷ø
è
Min V = VI(ref ) + 5 V
R1 ö
æ
VO = ç 1 +
VI(ref)
R2 ÷ø
è
Copyright © 2016, Texas Instruments Incorporated
Copyright © 2016, Texas Instruments Incorporated
R must provide cathode current ≥1 mA to the TL1431 at minimum
V(BATT).
Figure 27. Precision High-Current Series Regulator
R
V(BATT)
VO
Figure 28. Output Control Of A
Three-Terminal Fixed Regulator
V(BATT)
VO
R1
R1
TL1431
C
R2
R2
TL1431
R1 ö
æ
Vtrip = ç 1 +
VI(ref )
R2 ÷ø
è
R1 ö
æ
VO = ç 1 +
VI(ref )
R2 ÷ø
è
Copyright © 2016, Texas Instruments Incorporated
Copyright © 2016, Texas Instruments Incorporated
See the stability boundary conditions in Figure 12 to determine
allowable values for C.
Figure 29. Higher-Current Shunt Regulator
In
V(BATT)
Figure 30. Crowbar
V(BATT)
Out
VO = 5 V
VO = 5 V, 1.5 A, 0.5%
LM317
Rb
8.2 kΩ
Adjust
TL1431
27.4 kΩ
0.1%
243 Ω
0.1%
TL1431
243 Ω
0.1%
27.4 kΩ
0.1%
Copyright © 2016, Texas Instruments Incorporated
Copyright © 2016, Texas Instruments Incorporated
Rb must provide cathode current ≥1 mA to the TL1431.
Figure 31. Precision 5-V, 1.5-A, 0.5% Regulator
18
Figure 32. 5-V Precision Regulator
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R3
12 V
6.8 kΩ
V(BATT)
R4
10 kΩ
5 V +0.5%
−
10 kΩ
0.1%
TL1431
R1B
R1A
VCC
TL1431
+
X
Not
Used
10 kΩ
0.1%
TL1431
TL598
R2A
R2B
æ
R1B ö
Low Limit = ç 1 +
÷ VI(ref)
R2B ø
è
Feedback
Copyright © 2016, Texas Instruments Incorporated
LED on When
Low Limit < V (BATT) < High Limit
æ
R1A ö
High Limit = ç 1 +
÷ VI(ref)
R2 A ø
è
Copyright © 2016, Texas Instruments Incorporated
Select R3 and R4 to provide the desired LED intensity and cathode
current ≥1 mA to the TL1431.
Figure 33. PWM Converter With 0.5% Reference
Figure 34. Voltage Monitor
680 Ω
RCL 0.1%
12 V
V(BATT)
R1
2 kΩ
R
IO
TL1431
TL1431
On
Off
IO =
C
R1 =
Delay = R ´ C ´ II
VI(ref )
RCL
+ I KA
V(BATT)
æ IO ö
ç
÷ + I KA
è hFE ø
Copyright © 2016, Texas Instruments Incorporated
12 V
(12 V) – VI(ref)
Copyright © 2016, Texas Instruments Incorporated
Figure 35. Delay Timer
Figure 36. Precision Current Limiter
V(BATT)
IO
TL1431
RS
0.1%
IO =
VI(ref )
RS
Copyright © 2016, Texas Instruments Incorporated
Figure 37. Precision Constant-Current Sink
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10 Power Supply Recommendations
When using TL1431 as a linear regulator to supply a load, designers typically use a bypass capacitor on the
output/cathode pin. When doing this, be sure that the capacitance is within the stability criteria shown in
Figure 12. To not exceed the maximum cathode current, ensure the supply voltage is current limited. Also, be
sure to limit the current being driven into the Ref pin, as not to exceed it's absolute maximum rating. For
applications shunting high currents, pay attention to the cathode and anode trace lengths, adjusting the width of
the traces to have the proper current density.
11 Layout
11.1 Layout Guidelines
Bypass capacitors must be placed as close to the part as possible. Current-carrying traces need to have widths
appropriate for the amount of current they are carrying; in the case of the TL1431, these currents are low.
11.2 Layout Example
REF
CATHODE
Vsup
1
8
2
7
3
6
4
5
Vin
ANODE
GND
GND
Copyright © 2016, Texas Instruments Incorporated
Figure 38. PW Package Layout Example
20
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation see the following:
• Understanding Stability Boundary Conditions Charts in TL431, TL432 Data Sheet (SLVA482)
• Setting the Shunt Voltage on an Adjustable Shunt Regulator (SLVA445)
12.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 4. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TL1431
Click here
Click here
Click here
Click here
Click here
TL1431M
Click here
Click here
Click here
Click here
Click here
12.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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25-Oct-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
5962-9962001Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629962001Q2A
TL1431MFKB
5962-9962001QPA
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
9962001QPA
TL1431M
TL1431CD
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
1431C
TL1431CDE4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
1431C
TL1431CDG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
1431C
TL1431CDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
1431C
TL1431CDRE4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
1431C
TL1431CDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
1431C
TL1431CKTPR
OBSOLETE
PFM
KTP
2
TBD
Call TI
Call TI
0 to 70
TL1431CLP
ACTIVE
TO-92
LP
3
1000
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
0 to 70
TL1431C
TL1431CLPE3
ACTIVE
TO-92
LP
3
1000
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
0 to 70
TL1431C
TL1431CLPM
OBSOLETE
TO-92
LP
3
TBD
Call TI
Call TI
0 to 70
TL1431CLPME3
ACTIVE
TO-92
LP
3
2000
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
0 to 70
TL1431C
TL1431CLPR
ACTIVE
TO-92
LP
3
2000
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
0 to 70
TL1431C
TL1431CLPRE3
ACTIVE
TO-92
LP
3
2000
Pb-Free
(RoHS)
CU SN
N / A for Pkg Type
0 to 70
TL1431C
TL1431CPWR
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
0 to 70
T1431
TL1431CPWRG4
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
T1431
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
25-Oct-2016
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TL1431MFK
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
TL1431MFK
TL1431MFKB
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629962001Q2A
TL1431MFKB
TL1431MJG
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
TL1431MJG
TL1431MJGB
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
9962001QPA
TL1431M
TL1431QD
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
1431Q
TL1431QDG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
1431Q
TL1431QDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
1431Q
TL1431QDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
1431Q
TL1431QLP
OBSOLETE
TO-92
LP
3
TBD
Call TI
Call TI
-40 to 125
TL1431QLPR
OBSOLETE
TO-92
LP
3
TBD
Call TI
Call TI
-40 to 125
TL1431QPWR
OBSOLETE
TSSOP
PW
8
TBD
Call TI
Call TI
-40 to 125
TL1431QPWRG4
ACTIVE
TSSOP
PW
8
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2000
1431Q
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
25-Oct-2016
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TL1431, TL1431M :
• Catalog: TL1431
• Automotive: TL1431-Q1, TL1431-Q1
• Enhanced Product: TL1431-EP, TL1431-EP
• Military: TL1431M
• Space: TL1431-SP, TL1431-SP
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
25-Oct-2016
• Military - QML certified for Military and Defense Applications
• Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Apr-2016
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TL1431CDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TL1431CPWR
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
TL1431CPWRG4
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
TL1431QDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TL1431QPWRG4
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Apr-2016
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TL1431CDR
SOIC
D
8
2500
340.5
338.1
20.6
TL1431CPWR
TSSOP
PW
8
2000
367.0
367.0
35.0
TL1431CPWRG4
TSSOP
PW
8
2000
367.0
367.0
35.0
TL1431QDR
SOIC
D
8
2500
340.5
338.1
20.6
TL1431QPWRG4
TSSOP
PW
8
2000
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OUTLINE
PW0008A
TSSOP - 1.2 mm max height
SCALE 2.800
SMALL OUTLINE PACKAGE
C
6.6
TYP
6.2
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
6X 0.65
8
1
3.1
2.9
NOTE 3
2X
1.95
4
5
B
4.5
4.3
NOTE 4
SEE DETAIL A
8X
0.30
0.19
0.1
C A
1.2 MAX
B
(0.15) TYP
0.25
GAGE PLANE
0 -8
0.15
0.05
0.75
0.50
DETAIL A
TYPICAL
4221848/A 02/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
8X (0.45)
SYMM
1
8
(R0.05)
TYP
SYMM
6X (0.65)
5
4
(5.8)
LAND PATTERN EXAMPLE
SCALE:10X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4221848/A 02/2015
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
8X (0.45)
SYMM
(R0.05) TYP
1
8
SYMM
6X (0.65)
5
4
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
4221848/A 02/2015
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
MECHANICAL DATA
MPSF001F – JANUARY 1996 – REVISED JANUARY 2002
KTP (R-PSFM-G2)
PowerFLEX PLASTIC FLANGE-MOUNT PACKAGE
0.080 (2,03)
0.070 (1,78)
0.243 (6,17)
0.233 (5,91)
0.228 (5,79)
0.218 (5,54)
0.050 (1,27)
0.040 (1,02)
0.010 (0,25) NOM
0.130 (3,30) NOM
0.215 (5,46)
NOM
0.247 (6,27)
0.237 (6,02)
Thermal Tab
(See Note C)
0.287 (7,29)
0.277 (7,03)
0.381 (9,68)
0.371 (9,42)
0.100 (2,54)
0.090 (2,29)
0.032 (0,81) MAX
Seating Plane
0.090 (2,29)
0.180 (4,57)
0.004 (0,10)
0.005 (0,13)
0.001 (0,02)
0.031 (0,79)
0.025 (0,63)
0.010 (0,25) M
0.010 (0,25) NOM
Gage Plane
0.047 (1,19)
0.037 (0,94)
0.010 (0,25)
2°–ā6°
4073388/M 01/02
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
The center lead is in electrical contact with the thermal tab.
Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
Falls within JEDEC TO-252 variation AC.
PowerFLEX is a trademark of Texas Instruments.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
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