User's Guide
SLLU201 – July 2014
TLK111EVM
This user guide details the characteristics, operation, and use of the Industrial Ethernet TLK111EVM
(EVM). The EVM enables Texas Instruments customers to quickly design and market systems using the
TLK111. This document also includes schematic diagrams, a printed-circuit board (PCB) layout, board
assembly and board marking drawings, and a bill of materials (BOM).
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7
8
9
Contents
Features ....................................................................................................................... 3
Description .................................................................................................................... 3
Applications ................................................................................................................... 3
System Description .......................................................................................................... 3
Design Features ............................................................................................................. 4
General Block Diagram ..................................................................................................... 5
6.1
Power Supply Options ............................................................................................. 5
6.2
Serial Management and MAC Interfaces ........................................................................ 5
6.3
MDI Modes .......................................................................................................... 6
6.4
LED Options ......................................................................................................... 6
6.5
Bootstrap Options/Jumpers........................................................................................ 6
6.6
Clock Options ....................................................................................................... 6
Power Supply Modes ........................................................................................................ 6
7.1
Default Configuration ............................................................................................... 6
Serial Management and MII/RMII Interfaces ............................................................................. 7
8.1
Serial Management for Standalone TLK111EVM .............................................................. 7
8.2
MII Interface ......................................................................................................... 8
8.3
RMII Interface ....................................................................................................... 9
MDI Modes .................................................................................................................. 10
9.1
Default Configuration – Separate Magnetic and RJ45 Connector .......................................... 10
9.2
Fiber Transceiver Operation ..................................................................................... 10
9.3
Integrated Magnetic with RJ45 Connector ..................................................................... 12
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11
12
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15
9.4
Transformerless Operation .......................................................................................
Clock Options ...............................................................................................................
10.1 Default Configuration .............................................................................................
10.2 25M OSC Configuration ..........................................................................................
10.3 External Clock Supplied to TLK11x .............................................................................
Schematics ..................................................................................................................
Layout ........................................................................................................................
Board Assembly ............................................................................................................
Board Marking (Silk) .......................................................................................................
Bill of Materials (BOM) .....................................................................................................
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24
List of Figures
1
General Block Diagram ..................................................................................................... 5
2
MDIO/MDC Interface Block Diagram ...................................................................................... 7
3
MII Interface Block Diagram ................................................................................................ 8
4
RMII Interface Block Diagram .............................................................................................. 9
5
Separate Magnetic with RJ45 Block Diagram .......................................................................... 10
6
Optic Transceiver Block Diagram ........................................................................................ 11
7
Integrated Magnetic with RJ45 Block Diagram ......................................................................... 12
8
Transformerless Operation Block Diagram ............................................................................. 13
9
25M OSC Modifications
10
11
12
13
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16
17
18
19
20
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22
...................................................................................................
Schematic (1 of 5) ..........................................................................................................
Schematic (2 of 5) ..........................................................................................................
Schematic (3 of 5) ..........................................................................................................
Schematic (4 of 5) ..........................................................................................................
Schematic (5 of 5) ..........................................................................................................
Layer 1 – Signal ............................................................................................................
Layer 2 – GND ..............................................................................................................
Layer 3 – Power ............................................................................................................
Layer 4 – Signal ............................................................................................................
Layer 1 – Components Side Assembly..................................................................................
Layer 4 – Print Side Assembly ...........................................................................................
Layer 1 – Components Side Silk .........................................................................................
Layer 4 – Print Side Silk ...................................................................................................
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List of Tables
1
2
2
............................................................................................................. 4
Bill of Materials ............................................................................................................. 24
Design Features
TLK111EVM
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Features
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1
Features
•
•
•
•
•
2
Low power consumption:
– Single supply < 275 mW
– Dual supply < 200 mW
Programmable power back off, reducing PHY power up to 20% in systems with shorter cables
Error-free 100Base-T operation up to 150 meters under typical conditions
Error-free 10Base-T operation up to 300 meters under typical conditions
Variable I/O voltage range: 1.8 V to 3.3 V
Description
The Industrial Ethernet TLK111EVM enables Texas Instruments customers to quickly design and market
systems using the TLK111 device. Customers are encouraged to use a design similar to the EVM circuit
to expedite their product development. TLK111EVM can be operated using only single voltage (5-V DC
jack, J82). On default configuration, all other voltages are on-board regulated and internally produced.
The EVM kit contains:
• TLK111EVM unit
• Printed copy of this user's guide
3
Applications
•
•
4
Industrial networks and factory automation
Motor and motion control
System Description
Ethernet simple and effective design has made it the most popular networking solution at the physical and
data link levels. With high-speed options and a variety of media types to choose from, Ethernet is efficient
and flexible. These factors and the low cost of Ethernet hardware have made Ethernet an attractive option
for industrial networking applications. Also, the opportunity to use open protocols such as TCP/IP-overEthernet networks offers the possibility of a level of standardization and interoperability. The result has
been an ongoing shift toward the use of Ethernet for industrial control and automation applications.
Ethernet is increasingly replacing proprietary communications.
The TLK111EVM reference design enables Texas Instruments customers to quickly design and release to
market systems using TI industrial Ethernet PHY transceiver devices. The TLK111EVM has been
designed in a small (2.6 in × 3.7 in) form factor which makes it easy to fit into any of the present products.
The reference design platform demonstrates the advanced performance of the TLK111 Ethernet PHY
transceiver devices. The design supports 10/100 Base-T and is compliant with IEEE 802.3 standard. The
reference design operates from a single power supply (5 V with on-board regulator) or from a dual power
supply (1.55V supplied from external source). On single supply option, only 5-V jack (J82) is connected
(default mode of operation), while all other voltages required for the Ethernet PHY transceiver are onboard regulated and internally generated within the device.
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Design Features
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Design Features
Table 1. Design Features
Feature
Description
Ethernet PHY
The TLK111 Ethernet PHY features:
● Industrial temperature rating: –40°C to +85°C
● Configurable PHY addresses – jumpers and resistor strapping options, supporting address space 00-31h
(5bits, default address 0x1).
● MII or RMII – jumper strapping option.
Power
consumption
Single Supply < 275 mW
Dual Supply < 200 mW
Power supply
The device is designed for power-supply flexibility and can operate with a single 3.3-V power supply.
Possible power input options include:
● 5 V from external DC jack connector and on-board regulator to generate 3.3 V
● 3.3-V DC input through the serial connectors (J11/J13) and internally regulate the 1.55-V supply.
● Both 3.3-V DC and 1.55-V DC supplied through the serial connectors (J11/J13)
MAC Controller
interface
● 40-pin header to allow customers to plug their own MAC to the TLK111EVM, using DC wires, and using these
as a MAC interface.
Clock
● 25-MHz crystal with internal oscillator (default)
● 2x 50 pin serial connectors to accommodate all MII/RMII interface signals
● Operation with 25-MHz OSC
● External clock supported through pin 37 of J12 header.
Status LEDs
AFE supported
Three LEDs (configured as PU or PD )
● Default operation, separate magnetic, Pulse HX1198FNL
● Integrated magnetic, Pulse J3011G21DNLT
● Transformerless operation
● Fiber operation, Avago HFBR-58036AQZ
4
TLK111EVM
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General Block Diagram
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6
General Block Diagram
Sled
5-V
Jack
3.3-V
Regulator
MII/
R
(Som MII BU
S
e Op
tions
)
3.3 V
INT
VOLTAGE
25/50-MHz CLK OUT
1.55 V
LEDs
LED ACT/COL
1.55 V
LED SPEED
LED LINK
25/50-MHz crystal or oscillator
TLK11x
DUT
Boot Resistors/
Jumpers
JTAG
RESET
Magnetics Pulse HX1198
RJ45
Figure 1. General Block Diagram
6.1
Power Supply Options
The TLK111EVM power is supplied by feeding 5 V to the DC jack. This option uses the on-board 3.3-V
regulator and uses the TLK in single-supply mode.
6.2
Serial Management and MAC Interfaces
The TLK111EVM supports a few options for serial management (MDIO/MDC) and for MII/RMII as MAC
Interfaces. The easiest option is to connect the MDIO/MDC pins (35/33 pins) on the 40-pin header (J12)
and one GND pin to an Ethernet MAC. This option allows read/write registers, activating force
transmission and configuring loops to the TLK. Another option is to connect the entire MII interface to an
Ethernet MAC, allowing full testing of the TLK with a working system.
RMII interface to the MAC is also possible in the same way, but needs to share a 50M clock with the
MAC. Sharing a 50M clock is done by connecting the Ext 25/50M pin (pin 37) of the 40-pin header (J12)
to the same clock source of the MAC. Some modifications to the TLK111EVM are required in order to
share the 50M clock.
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General Block Diagram
6.3
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MDI Modes
The TLK111EVM supports the following MDI options:
1. Default RJ45 with standalone magnetic (Pulse HX1198FNL)
2. RJ45 with integrated magnetic (Pulse J3011G21DNLT, not mounted)
3. Fiber transceiver operation (Avago HFBR-5803, not mounted)
4. Transformerless operation
All modes are configured by connecting the required resistors and components to the TLK111EVM.
6.4
LED Options
TLK111 supports three LEDs, for link/speed/act indications.
The TLK LEDs can operate as current source (when connected to pull-down) or current sink (when
connected to pull-up).
6.5
Bootstrap Options/Jumpers
Some TLK111 configurations are done through bootstrap options; using selection with jumpers or using
resistors population.
The TLK111EVM supports the following jumper configurations:
• PHY_ID0
• PHY_ID1
• PHY_ID2
• AMDIX Disable
• MII/RMII Mode
• AN_EN
• AN_0
• AN_1
The TLK111EVM supports the following resistor configurations:
• PHY_ID3
• PHY_ID4
• LED Mode
6.6
Clock Options
The TLK111EVM can support few clock options:
• 25 MHz from crystal is the default configuration.
• 25 MHz from OSC can be configured by board modifications.
• External clock can be supplied by 40-pin header (J12).
7
Power Supply Modes
7.1
Default Configuration
When using default configuration, only 5V should be connected to the TLK111EVM, allowing on-board
regulator to supply the required 3.3V supplies to the TLK, which is using its internal LDO to supply the
1.55V.
6
TLK111EVM
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Serial Management and MII/RMII Interfaces
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8
Serial Management and MII/RMII Interfaces
8.1
Serial Management for Standalone TLK111EVM
Minimal operation with TLK111EVM would be to just connect MDIO/MDC and GND pins to a MAC with
MDIO/MDC capabilities. This allows the user to read/write registers and configure the TLK111 to the
different loopback modes and activate the TLK111 for basic testing.
This mode doesn’t allow full MII interface – transferring packets between the MAC and TLK111. For such
operation all MII signals should be connected (see MII Interface Connection for Standalone TLK111EVM
section).
8.1.1
Serial Management – Block Diagram
For using MDIO/MDC interface on the TLK111EVM, no changes are required. Simply connect pins 31 and
33 of J12 (40-pin header) to the MAC and one GND pin should be enough.
Note – for stable registers reading more than one GND connection should be shared between the boards.
Sled
5-V
Jack
3.3-V
Regulator
MII/R
(Som MII BU
S
e Op
tions
)
3.3 V
INT
VOLTAGE
25/50-MHz CLK OUT
1.55 V
LEDs
LED ACT/COL
1.55 V
LED SPEED
LED LINK
25/50-MHz crystal or oscillator
Boot Resistors/
Jumpers
TLK11x
DUT
JTAG
RESET
Magnetics Pulse HX1198
RJ45
Figure 2. MDIO/MDC Interface Block Diagram
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Serial Management and MII/RMII Interfaces
8.2
8.2.1
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MII Interface
MII Interface Connection for Standalone TLK111EVM
TLK111EVM can be connected to any MAC system, by routing the MII signals to the 40-pin header (J12).
In this mode full system testing can be done, with transferring packets between the MAC and the TLK111.
8.2.2
MII Interface – Block Diagram
No changes are required to use the MII interface on the TLK111EVM with any MAC system. Simply
connect the relevant pins of J12 (40-pin header) to the MAC and GND pins.
NOTE: For operation, more than one GND connection should be shared between the boards.
&XVWRPHU¶V0$&
MII/RMII
BUS
MII/R
M
II
Sled
5-V
Jack
40-Pin Header
3.3-V
Regulator
BUS
MII/R
MII
3.3 V
INT
VOLTAGE
25/50-MHz CLK OUT
1.55 V
LEDs
LED ACT/COL
1.55 V
LED SPEED
LED LINK
25-MHz crystal or oscillator
TLK11x
DUT
Boot Resistors/
Jumpers
JTAG
RESET
Magnetics Pulse HX1198
RJ45
Figure 3. MII Interface Block Diagram
8
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8.3
8.3.1
RMII Interface
RMII Interface Connection for Standalone TLK111EVM
TLK111EVM can be connected to any MAC system, buy routing the RMII signals to the 40-pin header
(J12). In this mode full system testing can be done by transferring packets between the MAC and the
TLK111
8.3.2
RMII – Block Diagram
To use the RMII interface on the TLK111EVM with any MAC system, a few changes are required to route
the shared clock to the TLK111:
• Connect 0R to R78
• Disconnect R71 and R72
• Connect the shared 50M clock to Ext 25/50M pin (pin 37) of 40-pin header (J12) and to the MAC
Besides the previous changes, simply connect the relevant pins of J12 (40-pin header) to the MAC and
GND pins.
NOTE: For operation, more than one GND connection should be shared between the boards.
Please also refer to the TLK111 datasheet (SLLSEF8) for RMII working mode and
requirements on the shared clock (50 MHz) and strap pin (RX_DV).
50-MHz Oscillator
&XVWRPHU¶V0$&
RMII
BUS
R
Sled
MII
5-V
Jack
40-Pin Header
3.3-V
Regulator
BUS
RMII
3.3 V
INT
VOLTAGE
50-MHz CLK OUT
1.55 V
1.55 V
LEDs
LED ACT/COL
TLK11x
DUT
LED SPEED
LED LINK
Boot Resistors/
Jumpers
JTAG
RESET
Magnetics Pulse HX1198
RJ45
Figure 4. RMII Interface Block Diagram
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MDI Modes
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MDI Modes
9.1
Default Configuration – Separate Magnetic and RJ45 Connector
The TLK111EVM supports MDI options. The default configuration is for the TLK111 to use RJ45 with
standalone magnetic (Pulse HX1198FNL).
For this working mode, no changes are required to the TLK111EVM (default configuration).
Sled
5-V
Jack
3.3-V
Regulator
MII/
R
(Som MII BU
S
e Op
tions
)
3.3 V
INT
VOLTAGE
25/50-MHz CLK OUT
1.55 V
1.55 V
LEDs
LED ACT/COL
LED SPEED
LED LINK
25/50-MHz crystal or oscillator
TLK11x
DUT
Boot Resistors/
Jumpers
JTAG
RESET
Magnetics Pulse HX1198
RJ45
Figure 5. Separate Magnetic with RJ45 Block Diagram
9.2
Fiber Transceiver Operation
The TLK111 supports Fiber mode. Please follow datasheet recommendations on how to configure the
TLK111 for fiber mode.
Working with Fiber transceiver (Avago HFBR-5803, not mounted) is possible on the TLK111EVM.
The footprint for the Fiber transceiver option can be found on the bottom of the TLK111EVM.
In order to work with integrated magnetic, the following modifications to the TLK111EVM are required:
• Connect 0R to the following resistors:
10
TLK111EVM
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MDI Modes
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•
•
•
•
•
•
•
•
•
– R323, R324, R321, R322, R116
Connect 130R to the following resistors:
– R337, R339, R394, R396, R398
Connect 82R to the following resistors:
– R338, R340, R395, R397, R399
Connect 100 nF to the following capacitors:
– C17, C18, C251, C253, C254
Connect 10 nF to C231
Mount L14 and L15 with Ferrite-Bead 120R, 800 mA, 0805
Disconnect the following resistors:
– R112, R113, R114, R115 (0R)
– R11, R12 (49.9R)
– Remove T1 (separate magnetic)
Disconnect the following capacitors:
– C23, C24
Connect U24 – Avago HFBR-5803 Fiber transceiver
Remove T1 (separate magnetic)
Sled
5-V
Jack
MII/R
(som MII BU
S
e op
tions
)
3.3-V
Regulator
3.3 V
INT
VOLTAGE
25/50-MHz CLK OUT
1.55 V
LEDs
LED ACT/COL
1.55 V
TLK111
DUT
LED SPEED
LED LINK
25/50-MHz crystal or oscillator
Boot Resistors/
Jumpers
JTAG
RESET
Optic Transceiver
Figure 6. Optic Transceiver Block Diagram
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MDI Modes
9.3
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Integrated Magnetic with RJ45 Connector
The TLK111EVM can operate using RJ45 with integrated magnetic (Pulse J3011G21DNLT, not mounted).
The footprint for the integrated magnetic option is found on the bottom of the TLK111EVM.
In order to work with integrated magnetic, the following modifications are required to the TLK111EVM:
• Connect 0R to the following resistors:
– R104, R81, R94, R95
– R107, R108, R109, R110
• Connect 100 nF to the following capacitors:
– C11, C12
• Disconnect the following resistors:
– R112, R113, R114, R115
– R101, R103, R34, R69
• Connect J1 – Pulse J3011G21DNLT integrated magnetic.
• U2 (RJ45 connector) must be removed before trying to solder J1.
Sled
5-V
Jack
3.3-V
Regulator
MII/R
(som MII BU
S
e op
tions
)
3.3 V
INT
VOLTAGE
25/50-MHz CLK OUT
1.55 V
LEDs
LED ACT/COL
1.55 V
LED SPEED
LED LINK
25/50-MHz crystal or oscillator
TLK11x
DUT
Boot Resistors/
Jumpers
JTAG
RESET
RJ45
with Integrated
Magnetic
Figure 7. Integrated Magnetic with RJ45 Block Diagram
12
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MDI Modes
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9.4
Transformerless Operation
The TLK111EVM supports transformerless operation, with no magnetic on the MDI path, but with
capacitors instead. For more details on transformerless operation, refer to TLK110 Ethernet PHY
Transformerless Operation (SLLA327).
In order to work in transformerless mode, the following modifications are required to the TLK111EVM:
• Connect 0R to the following resistors:
– R107, R108, R109, R110
• DIsconnect the following resistors:
– R112, R113, R114, R115
– R101, R103, R34, R69
• Connect 33 nF to the following capacitors:
– C20, C21, C22, C27
Sled
5-V
Jack
3.3-V
Regulator
MII/
R
(som MII BU
S
e op
tions
)
3.3 V
INT
VOLTAGE
25/50-MHz CLK OUT
1.55 V
LEDs
LED ACT/COL
1.55 V
LED SPEED
LED LINK
25/50-MHz crystal or oscillator
TLK11x
DUT
Boot Resistors/
Jumpers
JTAG
RESET
RJ45
Figure 8. Transformerless Operation Block Diagram
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Clock Options
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Clock Options
10.1 Default Configuration
The TLK111EVM supports a few clock options, with default configuration of 25 MHz from crystal. In this
mode an external crystal resonator is connected across pins XI and XO.
The crystal must be 25 MHz ±50ppm-tolerance crystal reference.
10.2 25M OSC Configuration
The TLK11x can also operate with 25M external CMOS-level oscillator source connected to pin XI only.
Please refer to the datasheet for OSC requirement specifications.
In
•
•
•
order to operate with 25M OSC, the following modifications are required:
U5 OSC should be mounted – Epson, SG-211SCE (d) 25 MHz (footprint SMT 2 × 2.5)
0R should be mounted to R1 resistor location
Disconnect the following resistors: R71, R72
Figure 9. 25M OSC Modifications
10.3 External Clock Supplied to TLK11x
External clock can be supplied to the TLK11x by using the 40-pin header (J12).
The external clock must meet the TLK11x datasheet requirements and to be within 25 MHz ±50ppmtolerance.
The following changes are required to route the external clock to the TLK11x:
• Connect 0R to R78
• Disconnect the following resistors: R71, R72
• External clock (25M/50M) should be connected to Ext 25/50M pin (pin 37) of 40-pin header (J12)
14
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Schematics
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11
Schematics
Figure 10 through Figure 14 illustrate the TLK11x schematics.
7
8
6
5
4
3
2
1
TOP
TLK CONFIGURATION
F
POWER SUPPLY
TLK111 DUT
3V3
AVDD_3V3
IOVDD
RESET_N
AVDD_3V3
IOVDD
COL
CRS
LED_ACT
LED_LINK
LED_SPEED
RXD0
RXD1
RXD2
RXD3
RX_DV
RX_ER
3V3
3_3V_PS
COL
AVDD33
VDDIO
CRS
RESET_N
LED_ACT
LED_LINK
LED_SPEED
25_50M_EXT
EMB_1V5_1
EMB_1V5_2
EXT_PWRDWN_CONTROL
25M_50M_EXT
MDC
EMB_1V5_1
MDIO
EMB_1V5_2
RDM_B
EXT_PWRDWN
RDP_B
RXD0
RXD1
E
RXD2
TLK111_DUT
RXD3
RX_CLK
RX_DV
ROOM=TLK111_DUT
RX_ER
TDM_A
TDP_A
TXD0
TXD1
TXD2
TXD3
TX_CLK
TX_EN
JTAG_TCK
D
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRSTN
COL
CRS
LED_ACT
LED_LINK
LED_SPEED
MDC
MDIO
RDM_B
RDP_B
RXD0
RXD1
RXD2
RXD3
RX_CLK
RX_DV
RX_ER
TDM_A
TDP_A
TXD0
TXD1
TXD2
TXD3
TX_CLK
TX_EN
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRSTN
F
COL
CRS
LED_ACT
LED_LINK
LED_SPEED
TLK_CONFIGURATION_PINS
RXD0
RXD1
RXD2
RXD3
RX_DV
RX_ER
ROOM=CONFIGURATIONS
3V3_PS
E
MAGNETICS
LED_SPEED
FXSD
LED_ACT
LED_LINK
RDM_B
RDP_B
TDM_A
TDP_A
3V3
LED_ACT
LED_LINK
RDM_B
MAGNETICS_AFE
RDP_B
TDM_A
ROOM=MAG_DUT
TDP_A
3V3_CT_INPUT
D
ERM8-025-05.0-S-DV-TR
ERM8-025-05.0-S-DV-TR
IGNORE
IGNORE
2
R19
33
1
02
1
1
2
R24
33
1
2
R29
33
1
2
R31
33
R21
33
1
2
1
2
R20
33
1
R27
1
R18
1
2 R25
1
33
R28
2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
IOVDD_EMB
EMB_MDIO
EMB_MDC
EMB_RESET_N
2
R73
A14
A16
A18
A20
A22
1
RX_CLK
R22
0
2
C
RX_ER
RX_DV
CRS
COL
RXD0
RXD1
RXD2
RXD3
1
0
EMB_RX_CLK
EMB_RX_ERR
EMB_RX_DV
EMB_CRS
EMB_COL
EMB_RXD0
EMB_RXD1
EMB_RXD2
EMB_RXD3
2
33
2
33
2
33
AVDD_3V3
1
R23
IGNORE
0
2
3V3_AVDD_EMB
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
J11
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
A07
A09
A11
A13
A15
A17
A19
A21
A23
A27
1
2
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRSTN
2
0 1
1
2 R64
0
2
R32
0 1
1
2 R65
0
0
R55
0 2
R119 1
0 2
R121 1
R120 1
0 2
R102 IGNORE
R61
1
25_50M_EXT
2
R31
R171
R301
1
3V3_EMB
B08
B10
B12
B14
B16
B18
B20
B22
B24
LED_ACT
LED_SPEED
LED_LINK
0
EMB_TXD3
EMB_TXD2
EMB_TXD1
EMB_TXD0
EMB_TX_EN
EMB_TX_CLK
R33
0
R21
233
1
R15
233
1
R26
2
33
EXT_PWRDWN_CONTROL
TXD3
TXD2
2 TXD1
33
TXD0
2
33 TX_EN
TX_CLK
2
33
ERM8-025-DV
1
3V3
3V3
P1
P3
P5
B
1
F1
VIA
VIA
VIA
1
1
M203
1
M202
VIA
M201
1
M200
IGNORE
1
IGNORE
1
FID
FID
F3
IGNORE
1
FID
R78 0
2
IGNORE
25_50M_H
33
35
37
39
7
P8
P11
P12
P13
P14
P15
P16
1
B41
1
C
B27
B29
B31
B33
B35
B37
2 B39
R105 0 IGNORE 25_50M_EXT
R58
2
3V3_AVDD_EMB
0
AVDD_3V3
IGNORE
1
PIN_1
JTAG_TRSTN_2
2
3
PIN_3
JTAG_TMS_4
4
P18
5
PIN_5
P19
P20
7
PIN_7
P21
J12P22
P23
P24
9
PIN_9
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
P35
P36
P37
P38
P39
P40
B
mtlw-105-23-gd-260
JTAG_TCK_6
6
JTAG_TDO_8
8
JTAG_TDI_10
10
JTAG_TRSTN
GND
JTAG_TMS
TP30MIL19
TP30MIL21
JTAG_TCK
TP30MIL
1
1
JTAG_TDO
TP30MIL
1
1
JTAG_TDI
IGNORE
34
36
38
40
TEXAS
INSTRUMENTS
FID IGNORE
THIS DOCUMENT CONTAINS INFORMATION PROPRIETARY
TO TEXAS INSTRUMENTS - DSP SYSTEMS ISRAEL
USE OR DISCLOSURE WITHOUT THE WRITTEN PERMISSION
IS EXPRESSLY FORBIDDEN.
COPYRIGHT (C) TI 2006
FID IGNORE
5
B07
B09
B11
B13
B15
B17
B19
B21
B23
P1
FID IGNORE
6
IOVDD
2
0
ERM8-025-DV
F6
1
R57
CONNECTOR_B
DATE:
8
3V3_EMB
1
IOVDD_EMB
P6
P10
F5
1
2
0
J13
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
P4
P9
F4
1
F2
R56
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
P2
P7
P17
A
IGNORE
Header_2x20
CONNECTOR_A
25_50M_EXT
B28
B30
B32
B34
B36
B38
B40
B42
2
IGNORE
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
EMB_1V5_1
EMB_1V5_2
EMB_1V5_1
EMB_1V5_2
\1\
R16 33
R90
1
MDIO
MDC
RESET_N
IOVDD
\1\
3V3
POWER_SUPPLY
4
Wed May 07 20:26:27 2014
3
ASSY NAME:
TLK111CusSledEVM
EDGE NUMBER: 6541754
ENGINEER:
PART NO:
REV: 1
PCB-52001
DRW PAGE:
DESIGN PAGE:
2
A
SADAN NOAM
1
OF 1
1
OF 5
1
Figure 10. Schematic (1 of 5)
SLLU201 – July 2014
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15
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8
7
6
5
4
3
2
1
POWER SUPPLY
F
F
5V INPUT
DC_JACK 5V
5V_SUPPLY
J82
E
E
POWER_JACK_RAPC712X
5V_SUPPLY
+
2
1
R91
750
K
K
A
LD18
A
2
2
2
C183
220 UF
1
1
C182
100 PF
2
C90
1 NF
1
C89
10 NF
1
C82
10 UF
2
GND2
GND
1
VIN
D
D
3.3V_PS
3V3
LP3964_LDO
VIN
U4
VOUT
3
1
C
3V3
2
OUT
4
R4
1
R62
2
IOVDD
A
2
2
402
OUT
0
K
C4
33 UF
SENSE
1
SD
5
1
1
0
GND
2
1
1
C1
68 UF
0
R88
LD1
2
2
10 K
1
2
5V_SUPPLY
R59
R60
C
1
R63
2
AVDD_3V3
OUT
0
B
B
TEXAS
INSTRUMENTS
A
THIS DOCUMENT CONTAINS INFORMATION PROPRIETARY
TO TEXAS INSTRUMENTS - DSP SYSTEMS ISRAEL
USE OR DISCLOSURE WITHOUT THE WRITTEN PERMISSION
COPYRIGHT (C) TI 2006
IS EXPRESSLY FORBIDDEN.
DATE:
8
7
6
5
4
Wed May 07 20:26:28 2014
3
TLK111CusSledEVM
ASSY NAME:
EDGE NUMBER: 6541754
ENGINEER:
PART NO:
REV: 1
PCB-52001
DRW PAGE:
DESIGN PAGE:
2
A
SADAN NOAM
1
OF 1
2
OF 5
1
Figure 11. Schematic (2 of 5)
16
TLK111EVM
SLLU201 – July 2014
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Schematics
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4
3
2
TLK111 DUT
1
EMB_1V5_2
EMB_1V5_1
2
2
1
2
0
1
PFBOUT
PFBOUT
2IGNORE
1
F
2
1
C55
100 NF
2
0
1
C13
3 PF
R106
1
CLOSE TO PIN 18
PFBIN1
2
1
R79
IN
C54
100 NF
CLOSE TO PIN 37
PFBIN2
0
0
R77
IN
IN
F
IGNORE
5
R80
6
IGNORE
7
8
EMB_1V5_1
EMB_1V5_2
VDDIO
IGNORE
OUT
JUMPER
J15
3_3V_PS
OUT
OUT
25MHZ OSCILATOR
OUT
U5
ST_1
25M_REF
1
1
OUTPUT_3
GND_2
R68
4.7 K
R1
CLKOUT_OUTPUT_P25
RX_ER
RX_ER/MDIX_EN_OUTPUT_P41
COL
COL/PHYAD0_OUTPUT_P42
RXD0
RXD_0/PHYAD1_OUTPUT_P43
RXD1
RXD_1/PHYAD2_OUTPUT_P44
PFBIN1_INPUT_P18
RXD2
RXD_2/PHYAD3_OUTPUT_P45
TDP_BIDIR_P17
TDP_A
TDM_BIDIR_P16
TDM_A
SW/STRAP_P21
SOFTCOM
RESERVED_P20
RESERVED
RXD3
VDDIO
IGNORE
TLK111
AGND_POWER_P15
RDP_BIDIR_P14
RDP_B
POWER_PAD_POWER_P49
RDM_BIDIR_P13
RDM_B
2
1
C60
100 PF
2
1
2
C59
1 NF
2
1
C33
100 PF
2
1
2
C32
1 NF
C31
10 NF
1
2
RESET_N
OUT
3_3V_PS
OUT
3_3V_PS
OUT
OUT
MDIO
1
R74
2.2 K
R99
2.2 K
2
RESERVED
JTAG_TDI_BIDIR_P12
JTAG_TRSTN_BIDIR_P11
JTAG_TDO_BIDIR_P9
JTAG_TMS_BIDIR_P10
J_TDO
J_TMS
PWRDNN/INT_BIDIR_P7
JTAG_TCK_OUTPUT_P8
J_TCK
TXD_3_INPUT_P6
TXD_1_INPUT_P4
TXD_2_INPUT_P5
TX_EN_INPUT_P2
2
0
TX_CLK_OUTPUT_P1
R67
2
D
IOVDD_POWER_P48
TXD_0_INPUT_P3
1
IN
2
0
R82
2.2 K
PFBIN1
IOGND_POWER_P47
25M_50M_EXT
R66
JUMPER
J14
CLOSE TO PIN 23
AGND_POWER_P19
RXD_3/PHYAD4_OUTPUT_P46
2
IGNORE
2
C53
AVDD33
\1\
R96
4.87 K
1
AVDD33_POWER_P22
1
100 NF
PFBOUT
2
RBIAS
RBIAS_INPUT_P24
PFBOUT_OUTPUT_P23
SG-211SCE (D) 25MHZ-X1G0036210159XX
1
1
CLKOUT
LED_ACT
LED_SPEED
LED_LINK
LED_LINK/AN0_OUTPUT_P28
LED_SPEED/AN1_OUTPUT_P27
MDIO_BIDIR_P30
RESET_N_INPUT_P29
MDC_INPUT_P31
XO_OUTPUT_P33
LED_ACT/COL/AN_EN_OUTPUT_P26
CRS/CRS_DV/LED_CFG_OUTPUT_P40
IOVDD_POWER_P32
XI_INPUT_P34
CRS
2
0
DGND_POWER_P36
RX_DV/MII_MODE_OUTPUT_P39
1
OUT
RX_CLK_OUTPUT_P38
RX_DV
1
2
OUT
RX_CLK
1
C52
OUT
D
PFBIN2_INPUT_P37
10 UF
OUT
PFBIN2
TP30MIL2
TP30MIL
RBIAS
1
OUT
VDD_4
RESET_N
MDC
OUT
IOGND_POWER_P35
1
2
C51
33 PF
MDIO
P2
ATS250BSM-1E
XTAL1
XTAL
P1
TLK111PT
U1
2
1
C48
E
TLK-111000R
1 M
33 PF
2
2
10 UF
1
R72
0
2
2
1
R70
1
10 UF
1
E
C57
C30
0
C58
10 NF
2
1
OUT
OUT
OUT
R71
OUT
\1\
1
J_TDI
1
J_TRSTN
C
2
R87
1
R98
2.2 K
0
1
SOFTCOM
IGNORE
2
R84
IGNORE
2
R83
0
IGNORE
2
IGNORE
JTAG_TDI
OUT
1
R97
2.2 K
0
JTAG_TRSTN
OUT
2
1
OUT
JTAG_TDO
2
2
1
C29
100 PF
2
C28
1 NF
1
1
C6
10 NF
1
2
C5
10 UF
JTAG_TCK
3_3V_PS
IN
OUT
3_3V_PS
1
TXD3
2
TXD2
1
OUT
3_3V_PS
TXD0
0 IGNORE R86
OUT
TX_EN
JTAG_TMS
OUT
TX_CLK
TXD1
OUT
OUT
2
OUT
0 IGNORE R85
2
2
OUT
1
C41
100 PF
2
C40
1 NF
1
C
1
C39
10 NF
IGNORE
B
B
VDDIO
VDDIO
3_3V_PS
2
R75
2.2 K
1
2
1
C50
100 PF
2
C47
1 NF
1
2
1
C45
10 NF
1
2
C43
10 UF
1
IN
1
R117
0
R76
2.2 K
2
EXT_PWRDWN
IN
IGNORE
2
IGNORE
AVDD33
AVDD33
2
TEXAS
INSTRUMENTS
1
C49
100 PF
2
C46
1 NF
1
1
1
C44
10 NF
2
2
C42
10 UF
IN
A
THIS DOCUMENT CONTAINS INFORMATION PROPRIETARY
TO TEXAS INSTRUMENTS - DSP SYSTEMS ISRAEL
USE OR DISCLOSURE WITHOUT THE WRITTEN PERMISSION
IS EXPRESSLY FORBIDDEN.
COPYRIGHT (C) TI 2006
DATE:
8
7
6
5
4
Wed May 07 20:26:33 2014
3
ASSY NAME:
TLK111CusSledEVM
EDGE NUMBER: 6541754
ENGINEER:
PART NO:
REV: 1
PCB-52001
DRW PAGE:
DESIGN PAGE:
2
A
SADAN NOAM
1
OF 1
3
OF 5
1
Figure 12. Schematic (3 of 5)
SLLU201 – July 2014
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5
C2
3 PF
1
1
2
IGNORE
1
IN
R94
12
11
3
5
4
7
6
8
21
9
10
2
IN
R95
2
11
0
C3
1
2
IGNORE
IN
2
R89
R13
2
TDP_A
IN
1
2
1
C24
1 UF
2
1
IGNORE
R10
2
49.9
OPTIONAL
6
TDM_A
IN
RDP_B
IN
RDM_B
IN
8
2
1
IGNORE
9
10
C34
3 PF
2
IGNORE
1
L3
2
E
OPTIONAL
1
1
2
C25
100 NF
33 NH
OPTIONAL
IGNORE
IGNORE
1
RDP_BOT
C35
3 PF
OPTIONAL
1
TDM_BOT
2
49.9
2
0
1
33 NH
5
4
CT_INPUT
RDM_BOT
C23
100 NF
L2
OPTIONAL 3 PF
3
R9
1
2
IGNORE
7
R81
330
IGNORE
E
2
33 NH
1
J1
12
1
2
IGNORE
1
LED_LINK
1
2
IGNORE
1
C12
100 NF
C11
100 NF
0
OPTIONAL
1
IGNORE
1313
1414
LED_ACT
L1
1
2
OPTIONAL
RJ45_INTEGRATED
CONNECTOR
J3011G21DNLT
IGNORE
1
3V3_CT_INPUT
F
CT_INPUT
R104
330
2
1
FOR INTEGRATER MAGNETI OPERATION,
POPULATE ALL NON-OPTIONAL ITEMS ON THIS SECTION AND REMOVE U2 (RJ45)
CT_INPUT
3
MAGNETICS
INTEGRATED MAGNETIC
F
4
0
6
CT_INPUT
7
8
1
2
33 NH
IGNORE
2
2
R14
2
1
0
L4
2
TDP_BOT
R11
49.9
1
IGNORE
C26
1 UF
2
1
R12
2
49.9
OPTIONAL
TRANSFORMER-LESS
D
1
R107
IGNORE
1
R108
D
FOR TRANSFORMER-LESS OPERATION,
POPULATE R107-R110 AND C20-C22 AND C27, AND REMOVE R112-R115 AND R34, R69, R101, R103
2
0
IGNORE
2
0
1
IGNORE
0
R110
IGNORE
2
FIBER
2
FOR FIBER OPERATION, POPULATE ALL NON-OPTIONAL ITEMS ON THIS SECTION AND REMOVE U2 (RJ45)
FOR COPPER OPERATION, DO NOT POPULATE ALL ITEMS ON THIS SECTION
2
2
130
R398
IGNORE1
2
R396
130
130
R394
1
1
IGNORE
RX_VEE_PIN_9
IGNORE
2
IGNORE
1
2
1
IGNORE
C253
100 NF
IGNORE
B
IGNORE
C254
100 NF
2
+
2
RD_PIN_2
TX_VEE_PIN_1
IGNORE
IGNORE
2
130
130
2
1
2
C15
1 UF
VCC_PIN_5
NRD_PIN_3
1
C8
10 NF
C19
4700PF
2
1
1
TEXAS
INSTRUMENTS
C16
4700PF
2
1
IGNORE
THIS DOCUMENT CONTAINS INFORMATION PROPRIETARY
TO TEXAS INSTRUMENTS - DSP SYSTEMS ISRAEL
USE OR DISCLOSURE WITHOUT THE WRITTEN PERMISSION
IS EXPRESSLY FORBIDDEN.
COPYRIGHT (C) TI 2006
DATE:
7
2
BEAD
SD_PIN_4
1
2
1
C14
100 NF
2
1
2
C10
1 UF
1
C9
100 NF
IGNORE
IGNORE
8
VCC_PIN_6
IGNORE
FERRITE
2
1
R111
1 M
2
A
1
FXRD_M
FXRD_P
1
2
R8 75
2
0
L15
IGNORE
SD
2
2
1
2
R6 75
R322
BEAD
\1\
2 IGNORE
0
1
NTD_PIN_7
2
FERRITE
L14
PLACE CAPACITORS,
INDUCTORS AND RESISTORS
CLOSE TO TRNACEIVER
2
C7
10 NF
1
R5 75
1
R7 75
B
1
R321
\1\ 1
1
RDP_B
FXTD_M
1
OUT
RDM_B
100 NF
C18
C251
100 NF
RX_P8
HX1198FNL
MAGNETICS
IGNORE
IGNORE
2
RX_P9
0
R116 0 IGNORE
1
2
IGNORE
RX_P7
RX_P10
R324
FXSD
hfbr-5803
AFBR-5803AQZ
82
TDM_A_MAG
RDP_B_MAG
CHB
RDM_B_MAG
U24
TD_PIN_8
7
C231
10 UF
RX_P6
FIBER TRANSCEIVER
1
R399
NC_P5
2
C
FXTD_P
1
2
NC_P4
NC_P12
2
1
CHA
TX_P3
NC_P13
C17
100 NF
IGNORE
2
IGNORE
TX_P2
TX_P14
0
1
R397 82
TDP_A_MAG
TX_P1
TX_P15
RX_P11
R323
2
TX_P16
TDM_A
2
1
R69 0
T1
2 IGNORE
1
1
HX1198FNLT
0
TDP_A
IGNORE
0
1
2
R101
49.9
1
1
R395 82
0
2
2
IGNORE
R34
1
R340 82
2
2
GND_PIN10
R103
1
2
3
4
5
6
7
8
IGNORE
I/0_PIN1
I/0_PIN2
I/0_PIN3
I/0_PIN4
I/0_PIN5
I/0_PIN6
I/0_PIN7
I/0_PIN8
1
10
1-406541-1
GND_PIN9
R338 82
U2
9
2
2
49.9
RJ45_CONNECTOR
R339
R335
1
IGNORE
R328
1
IGNORE
IGNORE
1
1
CT_INPUT
CT_INPUT
R337
2
0
R115
2
0
1
2
1
R114
2
0
0
1
R113
1
C
R112
2
0
IGNORE
2
C22
33 NF
1
IGNORE
2
C21
33 NF
1
IGNORE
C20
33 NF
1
C27
33 NF
1
IGNORE
2
1
R109
6
5
4
Wed May 07 20:26:28 2014
3
ASSY NAME:
TLK111CusSledEVM
EDGE NUMBER: 6541754
ENGINEER:
PART NO:
REV: 1
PCB-52001
DRW PAGE:
DESIGN PAGE:
2
A
SADAN NOAM
1
OF 1
4
OF 5
1
Figure 13. Schematic (4 of 5)
18
TLK111EVM
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7
8
6
5
4
3
2
1
CONFIGURATION PINS
F
F
1
3V3_PS
IN
R40
2.2 K
IGNORE
1
2
CFG_PHY_ID [4]
RXD3
IN
R41
2.2 K
IGNORE
\1\
2
CFG_PHY_ID [3]
RXD2
IN
J5
JUMPER
CFG_PHY_ID [2]
R37
RXD1
1
2
IN
\1\
2.2 K
J6
CFG_PHY_ID [1]
R38
1
2
RXD0
IN
JUMPER
E
E
2.2 K
\1\
CFG_PHY_ID [0]
R39
COL
1
2
IN
J7
R35
1
2
\1\
CFG_CROSSOVR
RX_ER
IN
JUMPER
2.2 K
2.2 K
\1\
J8
JUMPER
D
J10
R36
1
D
JUMPER
MII/RMII
RX_DV
IN
2
2.2 K
LED_MODE_CONFIGURATION
CRS
1
IN
R51
2.2 K
2
IGNORE
3V3_PS
3V3_PS
3V3_PS
C
C
2
R53
1
2.2 K
LD2
IN3
K
A
R45
1
2
IN
J9
1
R42
2
470
R43
1
A
A
R54
1
LD6
1
K
LD3
CFG_ANEG_SPD_0
LED_LINK
2
IN
470
R50
2
A
J4
K
IN3
A
1
1
LD7
R52
R46
2
470
R47
2.2 K
A
LD5
2.2 K
THIS DOCUMENT CONTAINS INFORMATION PROPRIETARY
TO TEXAS INSTRUMENTS - DSP SYSTEMS ISRAEL
USE OR DISCLOSURE WITHOUT THE WRITTEN PERMISSION
IS EXPRESSLY FORBIDDEN.
COPYRIGHT (C) TI 2006
DATE:
6
5
K
2
TEXAS
INSTRUMENTS
7
2
470
1
2
A
8
R49
1
LD4
K
470
2
2.2 K
B
K
IN3
IN2
CFG_ANEG_SPD_1
LED_SPEED
IN2
470
2
2.2 K
3xjumper
IN2
J3
LED_ACT
R48
1
IN1
IN1
CFG_ANEG_MODE
IN
2
2.2 K
3xjumper
IN1
R44
1
3xjumper
4
Wed May 07 20:26:28 2014
3
B
TLK111CusSledEVM
ASSY NAME:
EDGE NUMBER: 6541754
ENGINEER:
PART NO:
REV: 1
PCB-52001
DRW PAGE:
DESIGN PAGE:
2
A
SADAN NOAM
1
OF 1
5
OF 5
1
Figure 14. Schematic (5 of 5)
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TLK111EVM
Copyright © 2014, Texas Instruments Incorporated
19
Layout
12
www.ti.com
Layout
Figure 15 through Figure 20 illustrate the PCB layout drawings for the TLK111EVM.
Figure 15. Layer 1 – Signal
Figure 16. Layer 2 – GND
20
TLK111EVM
SLLU201 – July 2014
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Copyright © 2014, Texas Instruments Incorporated
Layout
www.ti.com
Figure 17. Layer 3 – Power
Figure 18. Layer 4 – Signal
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TLK111EVM
Copyright © 2014, Texas Instruments Incorporated
21
Board Assembly
13
www.ti.com
Board Assembly
Figure 19 and Figure 20 show the board assembly for the TLK111EVM.
F3
9
1
2
40
J12
P1
M203
2
10
1
M200
39
R31
R65
R64
R61
R55
C90
A
J82
C182
R18
C89
R21
U1
K
R29
R59
R79
C30
C183
R1
XTAL1
R60
C1
R78
R70
R105R102
R19
+
C31
C51
TP30MIL2
R16
R73
R5
R74
C57 C52
C13
C7
A K
C32
R90
R89
C47
C56
R77
R71
C45
R72
R96
C58
R6
LD1
R24
C33
C53
C59
LD18
R4
R51
C54
C60
C10
R13
R27
37
36
2425
R91
U4
C55
R107
C9
R99
R80
R106
R112R323
C23
1
C24
R103
C82
C2
R20
C20
C16
R28
R25
48
R9
R101
12
13
C27
16
2
L1
R40
R41
R108
R113R324
C43
C3
R10
R34
T1
C50
C34
L2
R11 R12
R69
L3
R109
C21
U2
1
R114R321
C22
8
7
C35
R32
R30
R17
R26
R2
R22
C49
L4
F1
R23
R110
R115R322
R120
R33
R3
R85
R87
R86
R83
C46
R84
C14
C25
C26
C44
R15
C42
R121
R117 R76
R75
TP30MIL21
C15
PCB EDGE
R14
R8
R98
R97
R7
C8
R119
C19
C4
C48
R63
C6
R50
R88
U5
1
R68
C40
R62
C41
C28
R54
C5
ALD7 K
R58
C29
ALD6 K
R52
R53
C39
R57
R67
R56
R37
R38
J14
R39
1
1
R35
R42
1
A
LD3 K
R36
R45
1
ALD2 K
R43
F2
R44
R66
J5
1
J7
1
J6
J8
1
1
J10
1
J4
M201
2
2
2
TP30MIL19
J15
R46
J3
A
LD5 K
1
R49
J9
A
LD4 K
R47
R48
R82
M202
Figure 19. Layer 1 – Components Side Assembly
F6
R111
R81
1
2
J11
49
50
J1
C12
F5
R95
F4
C231
R340
R339
1
R337
J13
R399
L15
49
50
C251
1
2
R398
R116
R338
C254
U24
L14
AREA
PLUG
PROCESS
R104
C11
C253
R397
R94
R396
R335 C18
R328 C17
9
R394
R395
Figure 20. Layer 4 – Print Side Assembly
22
TLK111EVM
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Board Marking (Silk)
www.ti.com
14
Board Marking (Silk)
Figure 21 and Figure 22 show the board markings for the TLK111EVM.
Figure 21. Layer 1 – Components Side Silk
Figure 22. Layer 4 – Print Side Silk
SLLU201 – July 2014
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TLK111EVM
Copyright © 2014, Texas Instruments Incorporated
23
Bill of Materials (BOM)
15
www.ti.com
Bill of Materials (BOM)
Table 2. Bill of Materials
S.#
Ref Des
Qty
JEDEC_TYPE
VENDOR
Vendor Part #
Value
BOM_Ignore
Digi-key Number
PCB
1
2
U5
1
SMT2X2_5
EPSON
SG-211SCE (d) 25 MHzX1G0036210159xx
?
3
J3, J4, J9
3
JUMPERX3
Samtec
TSW-103-07-G-S
?
CONN HEADER 3POS 0.100" T/H GOLD
SAM1029-03-ND
4
C52
1
C1210
Samsung
CL32A106KPINNNE
10 UF
CAP CER 10UF 10V 10% X5R 1210
1276-3311-2-ND
5
C2, C3, C13, C34, C35
5
C0603
Samsung
CL10C030BB8NNNC
3 PF
IGNORE
CAP CER 3PF 50V NPO 0603
1276-2125-2-ND
6
C20-C22, C27
4
C0603
KEMET
C0603C333J3RACTU
33 NF
IGNORE
CAP CER 33NF 25V 5% X7R 0603
399-9068-2-ND
7
C4
1
C1206
Nichicon
F930G336KAA
33 UF
CAP TANT 33µF 4V 10% 1206
489-8141-2-ND
8
C56, C251, C253, C254
4
C0603
SAMSUNG
CL10B104KO8NNNC
100 NF
CAP CER 100NF 16V 10% X7R 0603
1276-1005-2-ND
9
C53-C55
3
C0603
SAMSUNG
CL10B104KO8NNNC
100 NF
CAP CER 100NF 16V 10% X7R 0603
1276-1005-2-ND
10
C5, C30, C42, C43,
C57, C82
6
C1206
TDK
C3216X7R1V106M160AC
10 UF
CAP CER 10µF 35V 20% X7R 1206
4458034-2-ND
11
C90
1
C0603
SAMSUNG
CL10C102JB8NNNC
1 NF
CAP CER 1NF 50V 5% NPO 0603
1276-1091-2-ND
12
C89
1
C0603
SAMSUNG
CL10B103KB8NCNC
10 NF
CAP CER 10NF 50V 10% X7R 0603
1276-1921-2-ND
13
C1
1
C1206
Nichicon
F930J686KAA
68 UF
CAP TANT 68µF 6.3V 10% 1206
493-6546-2-ND
14
C16
1
C1812
AVX
1812GC472KAT1A
4700PF
CAP CER 4700PF 2KV 10% X7R 1812
478-3003-2-ND
15
C19
1
C1812
AVX
1812GC472KAT1A
4700PF
CAP CER 4700PF 2KV 10% X7R 1812
478-3003-2-ND
16
C48,C51
2
C0603
SAMSUNG
CL10C330FB8NNNC
33 PF
CAP CER 33PF 50V 1% NPO 0603
1276-2262-2-ND
17
C29, C33, C41, C49,
C50, C60, C182
7
C0402
Yageo
CC0402JRNPO9BN101
100 PF
CAP CER 100PF 50V 5% NPO 0402
311-1024-2-ND
18
C10, C15, C24, C26
4
C0603
Samsung
CL10B105KQ8NNNC
1 UF
CAP CER 1µF 6V3 10% X7R 0603
1276-1024-2-ND
19
C11, C12, C17, C18
4
C0402
SAMSUNG
CL05B104KP5NNNC
100 NF
CAP CER 0.1µF 10V 0.1% X7R 0402
1276-1002-2-ND
20
C9, C14, C23, C25
4
C0402
SAMSUNG
CL05B104KP5NNNC
100 NF
CAP CER 0.1µF 10V 0.1% X7R 0402
1276-1002-2-ND
21
C28, C32, C40,
C46, C47, C59
6
C0402
Kemet
C0402C102J3RACTU
1 NF
CAP CER 1NF 25V 5% X7R 0402
399-7752-2-ND
22
C6-C8, C31, C39,
C44, C45, C58
8
C0402
Kemet
C0402C103J5RACTU
10 NF
CAP CER 10NF 50V 5% X7R 0402
399-7758-2-ND
23
J1
1
CON_RJ45_J3011
Pulse
J3011G21DNL
?
IGNORE
RJ45 CAT5 8 POS RA Female with integrated
magnetic
553-1763-2-ND
24
L14, L15
2
L0805
Samsung
CIM21J121NE
120 OHM
IGNORE
FERRITE CHIP 120Ω 800MA 0805
1276-6333-2-ND
25
XTAL1
1
HC49SM_I
CTS
ATS250BSM-1E
?
CRYSTAL 25.0MHz 18PF SMD
CTX1213CT-ND
26
P1
1
HDR_2X5
SAMTEC
MTLW-105-23-GD-260
?
27
J12
1
CON_SAMTEC_XXC020DFDNRC
SAMTEC
TSW-120-07-G-D
?
28
U24
1
CON_AGILENT_HFBR-5803-SC
Avago
HFBR-5803AQZ
?
29
T1
1
SM16
PULSE
HX1198FNLT
?
30
L1-L4
4
L0603
Bourns Inc.
CI160808-33NJ
33 NH
31
J5-J8, J10, J14
6
JMP02
SAMTEC
TSW-102-07-G-S
?
32
J15
1
JMP02
SAMTEC
TSW-102-07-G-S
?
33
LD1-LD7, LD18
8
LED0805
Everlight
QTLP630C4TR
?
24
SV601036-001
Description
1
TLK111CusSeldEVM
IGNORE
IGNORE
IGNORE
IGNORE
IGNORE
IGNORE
IGNORE
IGNORE
TLK111EVM
3.3V CMOS SMD OSCILLATOR WITH
STANDBY, 25MHz,
20ppm -40-+85
HEADER 2×5 MALE 2.6MM
HEADER 2×20 MALE 2.54MM 0.100
SAM1028-20-ND
Fast Ethernet Optical Transceiver
516-2346-ND
10/100 BASE-T MAGNETICS
553-2209-2-ND
INDUCTOR MULTI LAYER CHIP 33NH
CI160808-33NJTR-ND
CONN HEADER 2POS 0.100" SGL GOLD
SAM1029-02-ND
CONN HEADER 2POS 0.100' SGL GOLD
SAM1029-02-ND
LED GREEN WATER CLR 08050 SMD T/R
1080-1411-2-ND
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Bill of Materials (BOM)
www.ti.com
Table 2. Bill of Materials (continued)
S.#
Ref Des
JEDEC_TYPE
VENDOR
Vendor Part #
Value
34
U4
Qty
1
SOT-223-5
TI
LP3964EMP-3.3/NOPBTR-ND
?
35
C231
1
C6032
VISHAY SPRAGUE
293D106X9025C2TE3
10 UF
36
C183
1
7343
Kemet
T491D227K006AT
37
J82
1
CON3
SWITCHCRAFT
38
R60
1
R0603
39
R83-R87, R116, R117
7
40
R32, R55, R61, R64,
R65, R73, R90, R119R121
10
41
R1, R22, R23, R33, R56R58, R67, R77, R78,
R80, R94, R95, R102,
R105, R107-R110, R321R324
42
BOM_Ignore
Description
Digi-key Number
IC REG LDO 3.3 0.8A SOT223-5
LP3964EMP-3.3/NOPBTR-ND
CAP TANT 10µF 25V 10% 2312
718-1050-2-ND
220 UF
CAP TANT 220µF 6V3 10% 2917
399-8378-2-ND
RAPC712X
?
CONN POWERJACK MINI R/A PCMT
SC237-ND
Samsung ElectroMechanics America,
Inc
RC1608J103CS
10 K
RES 10kΩ 1/10W 5% 0603
1276-5086-2-ND
R0402
YAGEO
RC0402JR-070R
0
RES 0.0 Ω 1/16W JUMP 0402 SMD
311-0.0JRTR-ND
R0402
YAGEO
RC0402JR-070R
0
RES 0.0 Ω 1/16W JUMP 0402 SMD
311-0.0JRTR-ND
23
R0603
Yageo
RC0603JR-070RL
0
RES 0.0 Ω 1/10W JUMP 0603 SMD
311-0.0GRTR-ND
R13, R14, R34, R59,
R62, R63, R66, R69,
R71, R72, R79, R88,
R89, R101, R103, R106,
R112-R115
20
R0603
Yageo
RC0603JR-070RL
0
RES 0.0 Ω 1/10W JUMP 0603 SMD
311-0.0GRTR-ND
43
R2, R3, R15-R21, R24R31
17
R0402
YAGEO
RC0402FR-0733RL
33
RES 33.0 Ω 1/16W 1% 0402 SMD
311-33.0LRTR-ND
44
R5-R8
4
R0603
YAGEO
RC0603FR-0775RL
75
RES 75.0 Ω 1/10W 1% 0603 SMD
311-75.0HRTR-ND
45
R338, R340, R395,
R397, R399
5
R0603
YAGEO
RC0603FR-0782RL
82
IGNORE
RES 82.0 Ω 1/10W 1% 0603 SMD
311-82.0HRTR-ND
46
R337, R339, R394,
R396, R398
5
R0603
YAGEO
RC0603FR-07130RL
130
IGNORE
RES 130 Ω 1/10W 1% 0603 SMD
311-7130HRTR-ND
47
R4
1
R0603
YAGEO
RC0603FR-07402RL
402
RES 402 Ω 1/10W 1% 0603 SMD
311-402HRTR-ND
48
R42, R45, R46, R49,
R50, R54
6
R0603
YAGEO
RC0603FR-07470RL
470
RES 470 Ω 1/10W 1% 0603 SMD
311-470HRTR-ND
49
R91
1
R0603
YAGEO
RC0603FR-07750RL
750
RES 750 Ω 1/10W 1% 0603 SMD
311-750HRTR-ND
50
R9-R12
4
R0402
YAGEO
RC0402FR-0749R9L
49.9
RES 49.9 Ω 1/16W 1% 0402 SMD
311-49.9LRTR-ND
51
R328, R335
2
R0402
YAGEO
RC0402FR-0749R9L
49.9
IGNORE
RES 49.9 Ω 1/16W 1% 0402 SMD
311-49.9LRTR-ND
52
R81, R104
2
R0603
Samsung ElectroMechanics America,
Inc.
RC1608J331CS
330
IGNORE
RES 330 Ω 1/10W 5% 0603
1276-5050-2-ND
53
R35-R39, R43, R44,
R47, R48, R52, R53,
R74, R75, R82, R97,
R99
16
R0402
YAGEO
RC0402FR-072K2L
2.2 K
RES 2.20kΩ 1/16W 1% 0402 SMD
311-2.20KLRTR-ND
54
R40, R41, R51, R76,
R98
5
R0402
YAGEO
RC0402FR-072K2L
2.2 K
RES 2.20kΩ 1/16W 1% 0402 SMD
311-2.20KLRTR-ND
55
R96
1
R0603
Yageo
RC0603FR-074K87L
4.87 K
RES 4.87kΩ 1/10W 1% 0603 SMD
311-4.87KHRTR-ND
56
R68
1
R0603
BOURNS
CR0603-JW-472GLF
4.7 K
RES 4.7kΩ 1/10W 5% 0603 SMD
CR0603-JW-472GLFTR-ND
57
R111
1
R0402
YAGEO
RC0402FR-071ML
1M
RES 1.00MΩ 1/16W 1% 0402 SMD
311-1.0MLRTR-ND
58
R70
1
R0402
YAGEO
RC0402FR-071ML
1M
RES 1.00MΩ 1/16W 1% 0402 SMD
311-1.0MLRTR-ND
59
U2
1
CON_RJ45_TE_1-406541-1
TE Connectivity
1-406541-1
?
CONN MOD JACK R/A 8P8C SHIELDED
A97716-ND
IGNORE
IGNORE
IGNORE
IGNORE
IGNORE
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Copyright © 2014, Texas Instruments Incorporated
25
Bill of Materials (BOM)
www.ti.com
Table 2. Bill of Materials (continued)
S.#
Ref Des
Qty
JEDEC_TYPE
VENDOR
Vendor Part #
Value
60
J11, J13
2
CON_SAMTEC_ERM8-05-S-DVTR
Samtec
ERM8-025-05.0-S-DV-TR
?
Connector, 2x50 way Plug 0.8mm board to
board socket strip, Male
61
U1
1
QFP50P900X900X120-49
TI
TLK111PTR
?
IC ETHERNET PHY 10/100 48LQFP
TLK111PTR-ND
62
TP30MIL19, TP30MIL21
2
TH
SAMTEC
HMTSW-101-07-TM-S-240
?
HMTSW-101-07-TM-S-240-ND
63
TP30MIL2
1
TH
SAMTEC
HMTSW-101-07-TM-S-240
?
TESTPOINT_TH_0.9mm
_pad_1.7MM
TOTAL
26
BOM_Ignore
IGNORE
Description
Digi-key Number
HMTSW-101-07-TM-S-240-ND
240
TLK111EVM
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Copyright © 2014, Texas Instruments Incorporated
ADDITIONAL TERMS AND CONDITIONS, WARNINGS, RESTRICTIONS, AND DISCLAIMERS FOR
EVALUATION MODULES
Texas Instruments Incorporated (TI) markets, sells, and loans all evaluation boards, kits, and/or modules (EVMs) pursuant to, and user
expressly acknowledges, represents, and agrees, and takes sole responsibility and risk with respect to, the following:
1.
User agrees and acknowledges that EVMs are intended to be handled and used for feasibility evaluation only in laboratory and/or
development environments. Notwithstanding the foregoing, in certain instances, TI makes certain EVMs available to users that do not
handle and use EVMs solely for feasibility evaluation only in laboratory and/or development environments, but may use EVMs in a
hobbyist environment. All EVMs made available to hobbyist users are FCC certified, as applicable. Hobbyist users acknowledge, agree,
and shall comply with all applicable terms, conditions, warnings, and restrictions in this document and are subject to the disclaimer and
indemnity provisions included in this document.
2. Unless otherwise indicated, EVMs are not finished products and not intended for consumer use. EVMs are intended solely for use by
technically qualified electronics experts who are familiar with the dangers and application risks associated with handling electrical
mechanical components, systems, and subsystems.
3. User agrees that EVMs shall not be used as, or incorporated into, all or any part of a finished product.
4. User agrees and acknowledges that certain EVMs may not be designed or manufactured by TI.
5. User must read the user's guide and all other documentation accompanying EVMs, including without limitation any warning or
restriction notices, prior to handling and/or using EVMs. Such notices contain important safety information related to, for example,
temperatures and voltages. For additional information on TI's environmental and/or safety programs, please visit www.ti.com/esh or
contact TI.
6. User assumes all responsibility, obligation, and any corresponding liability for proper and safe handling and use of EVMs.
7. Should any EVM not meet the specifications indicated in the user’s guide or other documentation accompanying such EVM, the EVM
may be returned to TI within 30 days from the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE
EXCLUSIVE WARRANTY MADE BY TI TO USER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR
STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. TI SHALL
NOT BE LIABLE TO USER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES RELATED TO THE
HANDLING OR USE OF ANY EVM.
8. No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or
combination in which EVMs might be or are used. TI currently deals with a variety of customers, and therefore TI’s arrangement with
the user is not exclusive. TI assumes no liability for applications assistance, customer product design, software performance, or
infringement of patents or services with respect to the handling or use of EVMs.
9. User assumes sole responsibility to determine whether EVMs may be subject to any applicable federal, state, or local laws and
regulatory requirements (including but not limited to U.S. Food and Drug Administration regulations, if applicable) related to its handling
and use of EVMs and, if applicable, compliance in all respects with such laws and regulations.
10. User has sole responsibility to ensure the safety of any activities to be conducted by it and its employees, affiliates, contractors or
designees, with respect to handling and using EVMs. Further, user is responsible to ensure that any interfaces (electronic and/or
mechanical) between EVMs and any human body are designed with suitable isolation and means to safely limit accessible leakage
currents to minimize the risk of electrical shock hazard.
11. User shall employ reasonable safeguards to ensure that user’s use of EVMs will not result in any property damage, injury or death,
even if EVMs should fail to perform as described or expected.
12. User shall be solely responsible for proper disposal and recycling of EVMs consistent with all applicable federal, state, and local
requirements.
Certain Instructions. User shall operate EVMs within TI’s recommended specifications and environmental considerations per the user’s
guide, accompanying documentation, and any other applicable requirements. Exceeding the specified ratings (including but not limited to
input and output voltage, current, power, and environmental ranges) for EVMs may cause property damage, personal injury or death. If
there are questions concerning these ratings, user should contact a TI field representative prior to connecting interface electronics including
input power and intended loads. Any loads applied outside of the specified output range may result in unintended and/or inaccurate
operation and/or possible permanent damage to the EVM and/or interface electronics. Please consult the applicable EVM user's guide prior
to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During
normal operation, some circuit components may have case temperatures greater than 60°C as long as the input and output are maintained
at a normal ambient operating temperature. These components include but are not limited to linear regulators, switching transistors, pass
transistors, and current sense resistors which can be identified using EVMs’ schematics located in the applicable EVM user's guide. When
placing measurement probes near EVMs during normal operation, please be aware that EVMs may become very warm. As with all
electronic evaluation tools, only qualified personnel knowledgeable in electronic measurement and diagnostics normally found in
development environments should use EVMs.
Agreement to Defend, Indemnify and Hold Harmless. User agrees to defend, indemnify, and hold TI, its directors, officers, employees,
agents, representatives, affiliates, licensors and their representatives harmless from and against any and all claims, damages, losses,
expenses, costs and liabilities (collectively, "Claims") arising out of, or in connection with, any handling and/or use of EVMs. User’s
indemnity shall apply whether Claims arise under law of tort or contract or any other legal theory, and even if EVMs fail to perform as
described or expected.
Safety-Critical or Life-Critical Applications. If user intends to use EVMs in evaluations of safety critical applications (such as life support),
and a failure of a TI product considered for purchase by user for use in user’s product would reasonably be expected to cause severe
personal injury or death such as devices which are classified as FDA Class III or similar classification, then user must specifically notify TI
of such intent and enter into a separate Assurance and Indemnity Agreement.
RADIO FREQUENCY REGULATORY COMPLIANCE INFORMATION FOR EVALUATION MODULES
Texas Instruments Incorporated (TI) evaluation boards, kits, and/or modules (EVMs) and/or accompanying hardware that is marketed, sold,
or loaned to users may or may not be subject to radio frequency regulations in specific countries.
General Statement for EVMs Not Including a Radio
For EVMs not including a radio and not subject to the U.S. Federal Communications Commission (FCC) or Industry Canada (IC)
regulations, TI intends EVMs to be used only for engineering development, demonstration, or evaluation purposes. EVMs are not finished
products typically fit for general consumer use. EVMs may nonetheless generate, use, or radiate radio frequency energy, but have not been
tested for compliance with the limits of computing devices pursuant to part 15 of FCC or the ICES-003 rules. Operation of such EVMs may
cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may
be required to correct this interference.
General Statement for EVMs including a radio
User Power/Frequency Use Obligations: For EVMs including a radio, the radio included in such EVMs is intended for development and/or
professional use only in legally allocated frequency and power limits. Any use of radio frequencies and/or power availability in such EVMs
and their development application(s) must comply with local laws governing radio spectrum allocation and power limits for such EVMs. It is
the user’s sole responsibility to only operate this radio in legally acceptable frequency space and within legally mandated power limitations.
Any exceptions to this are strictly prohibited and unauthorized by TI unless user has obtained appropriate experimental and/or development
licenses from local regulatory authorities, which is the sole responsibility of the user, including its acceptable authorization.
U.S. Federal Communications Commission Compliance
For EVMs Annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant
Caution
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause
harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
Changes or modifications could void the user's authority to operate the equipment.
FCC Interference Statement for Class A EVM devices
This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules.
These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the
instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to
cause harmful interference in which case the user will be required to correct the interference at its own expense.
FCC Interference Statement for Class B EVM devices
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules.
These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment
generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause
harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If
this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and
on, the user is encouraged to try to correct the interference by one or more of the following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and receiver.
• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
• Consult the dealer or an experienced radio/TV technician for help.
Industry Canada Compliance (English)
For EVMs Annotated as IC – INDUSTRY CANADA Compliant:
This Class A or B digital apparatus complies with Canadian ICES-003.
Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the
equipment.
Concerning EVMs Including Radio Transmitters
This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this
device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired
operation of the device.
Concerning EVMs Including Detachable Antennas
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain
approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should
be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication.
This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum
permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain
greater than the maximum gain indicated for that type, are strictly prohibited for use with this device.
Canada Industry Canada Compliance (French)
Cet appareil numérique de la classe A ou B est conforme à la norme NMB-003 du Canada
Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité de
l'utilisateur pour actionner l'équipement.
Concernant les EVMs avec appareils radio
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est
autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout
brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain
maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à
l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente
(p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante.
Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel
d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans
cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2014, Texas Instruments Incorporated
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Important Notice for Users of EVMs Considered “Radio Frequency Products” in Japan
EVMs entering Japan are NOT certified by TI as conforming to Technical Regulations of Radio Law of Japan.
If user uses EVMs in Japan, user is required by Radio Law of Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and
Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of
Japan,
Use EVMs only after user obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to EVMs, or
Use of EVMs only after user obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect
to EVMs. Also, do not transfer EVMs, unless user gives the same notice above to the transferee. Please note that if user does not
follow the instructions above, user will be subject to penalties of Radio Law of Japan.
http://www.tij.co.jp
【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 本開発キットは技術基準適合証明を受けておりません。 本製品の
ご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。
日本テキサス・インスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
http://www.tij.co.jp
Texas Instruments Japan Limited
(address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan
IMPORTANT NOTICE
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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DLP® Products
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Logic
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