Product
Folder
Order
Now
Tools &
Software
Technical
Documents
Support &
Community
TLV313-Q1, TLV2313-Q1
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
TLVx313-Q1 Low-Power, Rail-to-Rail In/Out, 750-µV Typical Offset,
1-MHz Operational Amplifier for Cost-Sensitive Systems
1 Features
•
•
1
•
•
•
•
•
•
•
•
•
•
Qualified for Automotive Applications
AEC-Q100 Qualified With the Following Results
– Device Temperature Grade 1: –40°C to
+125°C
Ambient Operating Temperature Range
– Device HBM ESD Classification Level 3A
– Device CDM ESD Classification Level C6
Precision Amplifier for Cost-Sensitive Systems
Low IQ: 65 µA/ch
Wide Supply Range: 1.8 V to 5.5 V
Low Noise: 26 nV/√Hz at 1 kHz
Gain Bandwidth: 1 MHz
Rail-to-Rail Input/Output
Low Input Bias Current: 1 pA
Low Offset Voltage: 0.75 mV
Unity-Gain Stable
Internal RFI/EMI Filter
The robust design of the TLVx313-Q1 devices
provides ease-of-use to the circuit designer: unitygain stability with capacitive loads of up to 100 pF,
integrated RFI/EMI rejection filter, no phase reversal
in overdrive conditions, and high electrostatic
discharge (ESD) protection (4-kV HBM).
The devices are optimized for operation at voltages
as low as 1.8 V (±0.9 V) and up to 5.5 V (±2.75 V),
and are specified over the extended temperature
range of –40°C to +125°C.
The single-channel TLV313-Q1 device is available in
an SC70-5 package.The dual-channel TLV2313-Q1
device is offered in SOIC-8 (D) and VSSOP-8 (DGK)
packages.
Device Information(1)
PART NUMBER
TLV313-Q1
TLV2313-Q1
PACKAGE
BODY SIZE (NOM)
SC70 (5)
2.00 mm × 1.25 mm
SOIC (8)
4.90 mm × 3.91 mm
VSSOP (8)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
Infotainment
Engine Control Unit
Automotive Lighting
Low-Side Sensing
Battery Management Systems
Passive Safety
Capacitive Sensing
Fuel Pumps
3 Description
The TLVx313-Q1 family of single- and dual-channel
operational
amplifiers
combine
low
power
consumption with good performance. This makes
them designed for a wide range of applications, such
as infotainment, engine control units, automotive
lighting and more. The family features rail-to-rail input
and output (RRIO) swings, low quiescent current (65
µA, typical), wide bandwidth (1 MHz) and very low
noise (26 nV/√Hz at 1 kHz), making them attractive
for a variety of battery-powered applications that
require a good balance between cost and
performance. Further, low-input-bias current enables
these devices to be used in applications with
megaohm source impedances.
EMIRR IN+ vs Frequency
120
100
EMIRR IN+ (dB)
•
•
•
•
•
•
•
•
80
60
40
20
0
10
100
1000
Frequency (MHz)
10000
C033
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV313-Q1, TLV2313-Q1
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
8
1
1
1
2
3
3
5
Absolute Maximum Ratings ...................................... 5
ESD Ratings.............................................................. 5
Recommended Operating Conditions....................... 5
Thermal Information: TLV313-Q1 ............................. 6
Thermal Information: TLV2313-Q1 ........................... 6
Electrical Characteristics: 5.5 V ................................ 7
Electrical Characteristics: 1.8 V ................................ 8
Typical Characteristics: Table of Graphs .................. 9
Typical Characteristics ............................................ 10
Detailed Description ............................................ 13
8.1 Overview ................................................................. 13
8.2 Functional Block Diagram ....................................... 13
8.3 Feature Description................................................. 14
8.4 Device Functional Modes........................................ 15
9
Application and Implementation ........................ 16
9.1 Application Information............................................ 16
9.2 Typical Application ................................................. 16
9.3 System Examples .................................................. 17
10 Power Supply Recommendations ..................... 18
11 Layout................................................................... 19
11.1 Layout Guidelines ................................................. 19
11.2 Layout Example: Single Channel.......................... 19
11.3 Layout Example: Dual Channel ........................... 20
12 Device and Documentation Support ................. 21
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
21
21
21
21
21
21
21
13 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
Changes from Original (October 2017) to Revision A
Page
•
Added TLV2313-Q1 device to data sheet .............................................................................................................................. 1
•
Added dual channel information for TLV2313-Q1 device throughout data sheet .................................................................. 1
•
Changed Input and ESD Protection section From Power Supply section : To Feature Description section ....................... 15
•
Changed the formatting of the Related Documentation section .......................................................................................... 21
2
Submit Documentation Feedback
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
TLV313-Q1, TLV2313-Q1
www.ti.com
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
5 Device Comparison Table
PACKAGE LEADS
DEVICE
NO. OF
CHANNELS
SC70 (DCK)
SOIC (D)
VSSOP (DGK)
TLV313-Q1
1
5
—
—
TLV2313-Q1
2
—
8
8
6 Pin Configuration and Functions
TLV313-Q1 DCK Package
5-Pin SC70
Top View
+IN
1
V±
2
±IN
3
5
V+
4
OUT
Not to scale
Pin Functions: TLV313-Q1
PIN
NAME
NO.
+IN
1
–IN
OUT
I/O
DESCRIPTION
I
Noninverting input
3
I
Inverting input
4
O
Output
V–
2
—
Negative (lowest) power supply
V+
5
—
Positive (highest) power supply
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
Submit Documentation Feedback
3
TLV313-Q1, TLV2313-Q1
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
www.ti.com
TLV2313-Q1 D, DGK Packages
8-Pin SOIC, 8-Pin VSSOP
Top View
OUT_A
1
8
V+
±IN_A
2
7
OUT_B
+IN_A
3
6
±IN_B
V±
4
5
+IN_B
Not to scale
Pin Functions: TLV2313-Q1
PIN
D
(SOIC)
DGK
(VSSOP)
I/O
V–
4
4
—
Negative (lowest) power supply
V+
8
8
—
Positive (highest) power supply
OUT A
1
1
O
Output, channel A
OUT B
7
7
O
Output, channel B
–IN A
2
2
I
Inverting input, channel A
+IN A
3
3
I
Noninverting input, channel A
–IN B
6
6
I
Inverting input, channel B
+IN B
5
5
I
Noninverting input, channel B
NAME
4
Submit Documentation Feedback
DESCRIPTION
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
TLV313-Q1, TLV2313-Q1
www.ti.com
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
0
7
Signal input terminals (2)
(V−) − (0.5)
(V+) + 0.5
Signal input terminals (2)
–10
10
Supply voltage (V+) – (V–)
Voltage
Current
Output short circuit (3)
Operating, TA
Temperature
(2)
(3)
V
mA
Continuous
–40
150
Junction, TJ
150
Storage, Tstg
(1)
UNIT
–65
°C
150
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Input pins are diode-clamped to the power-supply rails. Input signals that may swing more than 0.5 V beyond the supply rails must be
current limited to 10 mA or less.
Short-circuit to ground, one amplifier per package.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±4000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VS
Supply voltage
1.8
5.5
V
TA
Specified temperature
–40
125
°C
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
UNIT
Submit Documentation Feedback
5
TLV313-Q1, TLV2313-Q1
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
www.ti.com
7.4 Thermal Information: TLV313-Q1
TLV313-Q1
THERMAL METRIC (1)
DCK (SC70)
UNIT
5 PINS
RθJA
Junction-to-ambient thermal resistance
281.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
91.6
°C/W
RθJB
Junction-to-board thermal resistance
59.6
°C/W
ψJT
Junction-to-top characterization parameter
1.5
°C/W
ψJB
Junction-to-board characterization parameter
58.8
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Thermal Information: TLV2313-Q1
TLV2313-Q1
THERMAL METRIC
D (SOIC)
DGK (VSSOP)
UNIT
8 PINS
8 PINS
RθJA
Junction-to-ambient thermal resistance
131.6
186.0
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
71.4
73.2
°C/W
RθJB
Junction-to-board thermal resistance
75.4
107.3
°C/W
ψJT
Junction-to-top characterization parameter
22.7
14.4
°C/W
ψJB
Junction-to-board characterization parameter
74.6
105.6
°C/W
6
Submit Documentation Feedback
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
TLV313-Q1, TLV2313-Q1
www.ti.com
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
7.6 Electrical Characteristics: 5.5 V
at TA = 25°C, RL = 10 kΩ connected to VS / 2, and VCM = VOUT = VS / 2, (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
0.75
3
UNIT
OFFSET VOLTAGE
VOS
Input offset voltage
dVOS/dT
Input offset voltage vs temperature
PSRR
Power-supply rejection ratio
TA = –40°C to 125°C
74
mV
2
µV/°C
90
dB
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
CMRR
Common-mode rejection ratio
No phase reversal, rail-to-rail input
(V–) – 0.2
(V–) – 0.2 V < VCM < (V+) – 1.3 V
VCM = –0.2 V to 5.7 V
(V+) + 0.2
V
85
64
dB
80
INPUT BIAS CURRENT
IB
Input bias current
±1
pA
IOS
Input offset current
±1
pA
6
µVPP
NOISE
Input voltage noise (peak-to-peak)
en
Input voltage noise density
in
Input current noise density
f = 0.1 Hz to 10 Hz
f = 10 kHz
22
f = 1 kHz
26
f = 1 kHz
5
nV/√Hz
fA/√Hz
INPUT CAPACITANCE
CIN
Differential
1
Common-mode
5
pF
OPEN-LOOP GAIN
AOL
Open-loop voltage gain
Phase margin
0.05 V < VO < (V+) – 0.05 V
RL = 100 kΩ
0.3 V < VO < (V+) – 0.3 V
RL = 2 kΩ
104
dB
100
VS = 5 V, G = +1
110
65
°
1
MHz
0.5
V/µs
FREQUENCY RESPONSE
GBW
Gain-bandwidth product
VS = 5 V, CL = 10 pF
SR
Slew rate
VS = 5 V, G = +1
tS
Settling time
To 0.01%, VS = 5 V, 2-V step , G = +1
6
µs
Overload recovery time
VS = 5 V, VIN × Gain > VS
3
µs
RL = 100 kΩ (2)
5
20
75
100
OUTPUT
VO
Voltage output swing from supply rails
ISC
Short-circuit current
RO
Open-loop output impedance
RL = 2 kΩ
(2)
mV
±15
mA
2300
Ω
POWER SUPPLY
VS
Specified voltage range
IQ
Quiescent current per amplifier
TA = –40°C to 125°C, VS = 5 V, IO = 0 mA
65
Power-on time
VS = 0 V to 5 V, to 90% IQ level
10
(1)
(2)
1.8 (±0.9)
5.5 (±2.75)
V
90
µA
µs
Parameters with minimum or maximum specification limits are 100% production tested at 25°C, unless otherwise noted. Overtemperature limits are based on characterization and statistical analysis.
Specified by design and characterization; not production tested.
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
Submit Documentation Feedback
7
TLV313-Q1, TLV2313-Q1
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
www.ti.com
7.7 Electrical Characteristics: 1.8 V
at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS+ – 1.3 V, and VOUT = VS / 2, (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
0.75
3
UNIT
OFFSET VOLTAGE
VOS
Input offset voltage
dVOS/dT
Input offset voltage vs temperature
PSRR
Power-supply rejection ratio
TA = –40°C to 125°C
74
mV
2
µV/°C
90
dB
INPUT VOLTAGE RANGE
VCM
Common-mode voltage range
CMRR
Common-mode rejection ratio
No phase reversal, rail-to-rail input
(V–) – 0.2
(V+) + 0.2
(VS–) – 0.2 V < VCM < (VS+) – 1.3 V
85
VCM = –0.2 V to 1.8 V
73
V
dB
INPUT BIAS CURRENT
IB
Input bias current
±1
pA
IOS
Input offset current
±1
pA
6
µVPP
NOISE
Input voltage noise (peak-to-peak)
en
Input voltage noise density
in
Input current noise density
f = 0.1 Hz to 10 Hz
f = 10 kHz
22
f = 1 kHz
26
f = 1 kHz
5
nV/√Hz
fA/√Hz
INPUT CAPACITANCE
CIN
Differential
1
Common-mode
5
pF
OPEN-LOOP GAIN
AOL
Open-loop voltage gain
0.1 V < VO < (V+) – 0.1 V, RL = 10 kΩ
110
0.05 V < VO < (V+) – 0.05 V, RL = 100 kΩ
110
dB
FREQUENCY RESPONSE
GBW
Gain-bandwidth product
CL = 10 pF
SR
Slew rate
G=1
0.9
MHz
0.45
V/µs
OUTPUT
VO
Voltage output swing from supply rails
ISC
Short-circuit current
RO
Open-loop output impedance
(1)
(2)
8
RL = 100 kΩ (2)
5
RL = 2 kΩ (2)
25
±6
2300
mV
mA
Ω
Parameters with minimum or maximum specification limits are 100% production tested at 25°C, unless otherwise noted. Overtemperature limits are based on characterization and statistical analysis.
Specified by design and characterization; not production tested.
Submit Documentation Feedback
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
TLV313-Q1, TLV2313-Q1
www.ti.com
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
7.8 Typical Characteristics: Table of Graphs
Table 1. Table of Graphs
TITLE
FIGURE
Open-Loop Gain and Phase vs Frequency
Figure 1
Quiescent Current vs Supply Voltage
Figure 2
Offset Voltage Production Distribution
Figure 3
Offset Voltage vs Common-Mode Voltage (Maximum Supply)
Figure 4
CMRR and PSRR vs Frequency (RTI)
Figure 5
0.1-Hz to 10-Hz Input Voltage Noise (5.5 V)
Figure 6
Input Voltage Noise Spectral Density vs Frequency (1.8 V, 5.5 V)
Figure 7
Input Bias and Offset Current vs Temperature
Figure 8
Open-Loop Output Impedance vs Frequency
Figure 9
Maximum Output Voltage vs Frequency and Supply Voltage
Figure 10
Output Voltage Swing vs Output Current (Over Temperature)
Figure 11
Closed-Loop Gain vs Frequency, G = 1, –1, 10 (1.8 V)
Figure 12
Small-Signal Step Response, Noninverting (1.8 V)
Figure 13
Small-Signal Step Response, Noninverting ( 5.5 V)
Figure 14
Large-Signal Step Response, Noninverting (1.8 V)
Figure 15
Large-Signal Step Response, Noninverting ( 5.5 V)
Figure 16
No Phase Reversal
Figure 17
EMIRR IN+ vs Frequency
Figure 18
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
Submit Documentation Feedback
9
TLV313-Q1, TLV2313-Q1
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
www.ti.com
7.9 Typical Characteristics
at TA = 25°C, VS = 5 V, RL = 10 kΩ connected to VS / 2, and VCM = VOUT = VS / 2, (unless otherwise noted)
140
180
Gain
58
Phase
135
CL=10pF
C
L = 10 pF
80
60
Phase (o)
Gain (dB)
100
Quiescent Current (µA/ch)
120
60
90
40
20
45
C
L = 100 pF
CL=100pF
0
56
54
52
50
48
46
44
42
-20
1
10
100
1k
10k 100k
Frequency (Hz)
1M
10M
0
100M
40
1.5
2.5
3
3.5
4
4.5
Supply Voltage (V)
5
5.5
6
C003
Figure 2. Quiescent Current vs Supply
9
1500
8
1200
900
Offset Voltage (µV)
7
6
5
4
3
600
300
0
-300
-600
Offset Voltage (mV)
2.5
2
1.5
1
0.5
0
-1500
-0.5
0
-1
-1200
-1.5
-900
1
-2
2
-2.5
Percent of Amplifiers (%)
Figure 1. Open-Loop Gain and Phase vs Frequency
2
0
0.5
1
C005
1.5 2 2.5 3 3.5 4
Common-Mode Voltage (V)
4.5
5
5.5
C007
Typical units, VS = 5.5 V
Figure 3. Offset Voltage Production Distribution
Figure 4. Offset Voltage vs Common-Mode Voltage
100
Voltage Noise (1 µV/div)
Common-Mode Rejection Ratio (dB),
Power-Supply Rejection Ratio (dB)
120
80
+PSRR
60
CMRR
40
20
-PSRR
0
10
100
1k
10k
Frequency (Hz)
100k
C009
Figure 5. CMRR and PSRR vs Frequency
(Referred-to-Input)
10
Submit Documentation Feedback
Time (1 s/div)
1M
C011
Figure 6. 0.1-Hz to 10-Hz Input Voltage Noise
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
TLV313-Q1, TLV2313-Q1
www.ti.com
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, RL = 10 kΩ connected to VS / 2, and VCM = VOUT = VS / 2, (unless otherwise noted)
1000
200
150
Input Bias Current (pA)
9ROWDJH 1RLVH Q9 ¥+]
VS = 1.8 V
100
10
VS = 5.5 V
IBN
100
IBP
50
0
IOS
-50
1
-100
1
10
100
1k
Frequency (Hz)
10k
100k
-50
-25
0
25
50
Temperature (oC)
C012
Figure 7. Input Voltage Noise Spectral Density vs Frequency
75
100
125
C014
Figure 8. Input Bias and Offset Current vs Temperature
6
100k
VS = 5.5 V
Output Voltage (V)
Output Impedance ( )
5
VS = 1.8 V
10k
4
VS = 1.8 V
3
2
1
VS = 5.5 V
0
1000
1000
1
10
100
1k
Frequency (Hz)
10k
100k
10k
RL = 10 kΩ
Figure 9. Open-Loop Output Impedance vs Frequency
1M
C016
CL = 10 pF
Figure 10. Maximum Output Voltage vs Frequency and
Supply Voltage
3
40
G = +10 V/V
2
20
1
oC
+125
+125oC
0
+25oC
+25 oC
Gain (dB)
Output Voltage Swing (V)
100k
Frequency (Hz)
C015
-40 oC
-40oC
G = +1 V/V
0
-1
-2
G = -1 V/V
-20
-3
0
5
10
Output Current (mA)
15
20
10
100
C017
1k
10k
100k
Frequency (Hz)
1M
10M
100M
C018
VS = 1.8 V
Figure 11. Output Voltage Swing vs Output Current
(Over Temperature)
Figure 12. Closed-Loop Gain vs Frequency
(Minimum Supply)
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
Submit Documentation Feedback
11
TLV313-Q1, TLV2313-Q1
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
www.ti.com
Typical Characteristics (continued)
at TA = 25°C, VS = 5 V, RL = 10 kΩ connected to VS / 2, and VCM = VOUT = VS / 2, (unless otherwise noted)
CL = 100 pF
CL = 100 pF
VIN
Voltage (25 mV/div)
Voltage (25 mV/div)
VIN
CL = 10 pF
CL = 10 pF
Time (1 µs/div)
Time (1 µs/div)
G = 1 V/V
RL = 10 kΩ
C004
VS = 1.8 V
C023
VCM = 0.5 V
G = 1 V/V
RL = 10 kΩ
Figure 14. Small-Signal Pulse Response
(Maximum Supply)
Voltage (250 mV/div)
Voltage (250 mV/div)
Figure 13. Small-Signal Pulse Response
(Minimum Supply)
VS = 5.5 V
VOUT
VIN
VOUT
VIN
Time (2.5 µs/div)
Time (2.5 µs/div)
C024
G = 1 V/V
VS = 1.8 V
C025
RL = 10 kΩ
G = 1 V/V
Figure 15. Large-Signal Pulse Response
(Minimum Supply)
VS = 5.5 V
RL = 10 kΩ
Figure 16. Large-Signal Pulse Response
(Maximum Supply)
120
EMIRR IN+ (dB)
Voltage (1 V/div)
100
VOUT
80
60
40
20
VIN
0
Time (125 µs/div)
10
100
1000
Frequency (MHz)
C028
PRF = –10 dBm
Figure 17. No Phase Reversal
12
Submit Documentation Feedback
VSUPPLY = 5 V
10000
C033
VCM = 2.5 V
Figure 18. EMIRR IN+ vs Frequency
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
TLV313-Q1, TLV2313-Q1
www.ti.com
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
8 Detailed Description
8.1 Overview
The TLVx313-Q1 family of operational amplifiers are general-purpose devices that are designed for a wide range
of portable, low-cost applications. Rail-to-rail input and output swings, low quiescent current, and wide dynamic
range make the op amps designed for driving sampling analog-to-digital converters (ADCs) and other singlesupply applications.
8.2 Functional Block Diagram
V+
Reference
Current
VIN+
VINVBIAS1
Class AB
Control
Circuitry
VO
VBIAS2
V(Ground)
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
Submit Documentation Feedback
13
TLV313-Q1, TLV2313-Q1
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
www.ti.com
8.3 Feature Description
8.3.1 Operating Voltage
The TLVx313-Q1 family is fully specified and tested from 1.8 V to 5.5 V (±0.9 V to ±2.75 V). Parameters that vary
with supply voltage are illustrated in the Typical Characteristics section.
8.3.2 Rail-to-Rail Input
The input common-mode voltage range of the TLVx313-Q1 family extends 200 mV beyond the supply rails. This
performance is achieved with a complementary input stage: an N-channel input differential pair in parallel with a
P-channel differential pair, as shown in the Functional Block Diagram section. The N-channel pair is active for
input voltages close to the positive rail, typically (V+) – 1.3 V to 200 mV above the positive supply, while the Pchannel pair is on for inputs from 200 mV below the negative supply to approximately (V+) – 1.3 V. There is a
small transition region, typically (V+) – 1.4 V to (V+) – 1.2 V, in which both pairs are on. This 200-mV transition
region may vary up to 300 mV with process variation. Thus, the transition region (both stages on) may range
from (V+) – 1.7 V to (V+) – 1.5 V on the low end, up to (V+) – 1.1 V to (V+) – 0.9 V on the high end. Within this
transition region, PSRR, CMRR, offset voltage, offset drift, and THD may be degraded compared to device
operation outside this region.
8.3.3 Rail-to-Rail Output
Designed as a micro-power, low-noise operational amplifier, the TLVx313-Q1 family delivers a robust output
drive capability. A class AB output stage with common-source transistors is used to achieve full rail-to-rail output
swing capability. For resistive loads up to 100 kΩ, the output swings typically to within 5 mV of either supply rail
regardless of the power-supply voltage applied. Different load conditions change the ability of the amplifier to
swing close to the rails, as shown in Figure 11.
8.3.4 Common-Mode Rejection Ratio (CMRR)
CMRR for the TLVx313-Q1 family is specified in several ways so the best match for a given application may be
used; see the Electrical Characteristics. First, the CMRR of the device in the common-mode range below the
transition region (VCM < (V+) – 1.3 V) is given. This specification is the best indicator of the capability of the
device when the application requires use of one of the differential input pairs. Second, the CMRR over the entire
common-mode range is specified at (VCM = –0.2 V to 5.7 V). This last value includes the variations seen through
the transition region, as shown in Figure 4.
8.3.5 Capacitive Load and Stability
The TLVx313-Q1 family is designed to be used in applications where driving a capacitive load is required. As
with all op amps, there may be specific instances where the TLVx313-Q1 device may become unstable. The
particular op amp circuit configuration, layout, gain, and output loading are some of the factors to consider when
establishing whether or not an amplifier is stable in operation. An op amp in the unity-gain (+1-V/V) buffer
configuration that drives a capacitive load exhibits a greater tendency to be unstable than an amplifier operated
at a higher noise gain. The capacitive load, in conjunction with the op amp output resistance, creates a pole
within the feedback loop that degrades the phase margin. The degradation of the phase margin increases as the
capacitive loading increases. When operating in the unity-gain configuration, the TLVx313-Q1 device remains
stable with a pure capacitive load up to approximately 1 nF. The equivalent series resistance (ESR) of some
capacitors (CL greater than 1 µF) is sufficient to alter the phase characteristics in the feedback loop such that the
amplifier remains stable. Increasing the amplifier closed-loop gain allows the amplifier to drive increasingly larger
capacitance. This increased capability is evident when observing the overshoot response of the amplifier at
higher voltage gains.
14
Submit Documentation Feedback
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
TLV313-Q1, TLV2313-Q1
www.ti.com
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
Feature Description (continued)
One technique for increasing the capacitive load drive capability of the amplifier when it operates in a unity-gain
configuration is to insert a small resistor, typically 10 Ω to 20 Ω, in series with the output, as shown in Figure 19.
This resistor significantly reduces the overshoot and ringing associated with large capacitive loads. One possible
problem with this technique is that a voltage divider is created with the added series resistor and any resistor
connected in parallel with the capacitive load. The voltage divider introduces a gain error at the output that
reduces the output swing.
V+
RS
VOUT
Device
10 W to
20 W
VIN
RL
CL
Figure 19. Improving Capacitive Load Drive
8.3.6 EMI Susceptibility and Input Filtering
Operational amplifiers vary with regard to the susceptibility of the device to electromagnetic interference (EMI). If
conducted EMI enters the op amp, the DC offset observed at the amplifier output may shift from the nominal
value while EMI is present. This shift is a result of signal rectification associated with the internal semiconductor
junctions. While all op amp pin functions may be affected by EMI, the signal input pins are likely to be the most
susceptible. The TLVx313-Q1 family incorporates an internal input low-pass filter that reduces the amplifiers
response to EMI. Both common-mode and differential mode filtering are provided by this filter. The filter is
designed for a common-mode cutoff frequency of approximately 35 MHz (–3 dB), with a rolloff of 20 dB per
decade.
Texas Instruments has developed the ability to accurately measure and quantify the immunity of an operational
amplifier over a broad frequency spectrum extending from 10 MHz to 6 GHz. The EMI rejection ratio (EMIRR)
metric allows op amps to be directly compared by the EMI immunity. Figure 18 illustrates the results of this
testing on the TLV313-Q1 family. Detailed information may be found in EMI Rejection Ratio of Operational
Amplifiers, available for download from www.ti.com.
8.3.7 Input and ESD Protection
The TLVx313-Q1 family incorporates internal electrostatic discharge (ESD) protection circuits on all pins. In the
case of input and output pins, this protection primarily consists of current-steering diodes connected between the
input and power-supply pins. The ESD protection diodes also provide in-circuit, input overdrive protection, as
long as the current is limited to 10 mA as stated in the Absolute Maximum Ratings. Figure 20 shows how a
series input resistor may be added to the driven input to limit the input current. The added resistor contributes
thermal noise at the amplifier input and the value must be kept to a minimum in noise-sensitive applications.
V+
IOVERLOAD
10-mA max
Device
VOUT
VIN
5 kW
Figure 20. Input Current Protection
8.4 Device Functional Modes
The TLV313-Q1 devices have a single functional mode. The devices are powered on as long as the powersupply voltage is between 1.8 V (±0.9 V) and 5.5 V (±2.75 V).
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
Submit Documentation Feedback
15
TLV313-Q1, TLV2313-Q1
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
www.ti.com
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TLVx313-Q1 devices are a family of low-power, rail-to-rail input and output operational amplifiers specifically
designed for portable applications. The devices operate from 1.8 V to 5.5 V, are unity-gain stable, and are
designed for a wide range of general-purpose applications. The class AB output stage is capable of driving loads
greater than 10 kΩ connected to any point between V+ and ground. The input common-mode voltage range
includes both rails, and allows the TLVx313-Q1 family to be used in virtually any single-supply application.
9.2 Typical Application
A typical application for an operational amplifier is an inverting amplifier, as shown in Figure 21. An inverting
amplifier takes a positive voltage on the input and outputs a signal inverted to the input, making a negative
voltage of the same magnitude. In the same manner, the amplifier also makes negative input voltages positive on
the output. In addition, amplification may be added by selecting the input resistor (RI) and the feedback resistor
(RF.)
RF
VSUP+
RI
VOUT
+
VIN
VSUP±
Figure 21. Application Schematic
9.2.1 Design Requirements
The supply voltage must be chosen to be larger than the input voltage range and the desired output range. The
limits of the input common-mode range (VCM) and the output voltage swing to the rails (VO) must also be
considered. For instance, this application scales a signal of ±0.5 V (1 V) to ±1.8 V (3.6 V). Setting the supply at
±2.5 V is sufficient to accommodate this application.
9.2.2 Detailed Design Procedure
Determine the gain required by the inverting amplifier using Equation 1 and Equation 2:
VOUT
AV
VIN
AV
16
1.8
0.5
3.6
Submit Documentation Feedback
(1)
(2)
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
TLV313-Q1, TLV2313-Q1
www.ti.com
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
Typical Application (continued)
When the desired gain is determined, choose a value for RI or RF. Choosing a value in the kilohm range is
desirable for general-purpose applications because the amplifier circuit uses currents in the milliamp range. This
milliamp current range ensures the device does not draw too much current. The trade-off is that very large
resistors (100s of kilohms) draw the smallest current but generate the highest noise. Small resistors (100s of
ohms) generate low noise but draw high current. This example uses 10 kΩ for RI, meaning 36 kΩ is used for RF.
The values are determined by Equation 3:
RF
AV
RI
(3)
9.2.3 Application Curve
2
Input
Output
1.5
Voltage (V)
1
0.5
0
-0.5
-1
-1.5
-2
Time
Figure 22. Inverting Amplifier Input and Output
9.3 System Examples
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required.
The simplest way to establish this limited bandwidth is to place an RC filter at the noninverting terminal of the
amplifier, as shown in Figure 23.
RG
RF
R1
VOUT
VIN
C1
f-3 dB =
(
RF
VOUT
= 1+
RG
VIN
((
1
1 + sR1C1
1
2pR1C1
(
Figure 23. Single-Pole Low-Pass Filter
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
Submit Documentation Feedback
17
TLV313-Q1, TLV2313-Q1
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
www.ti.com
System Examples (continued)
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter may be used for this
task, as shown in Figure 24. For best results, the amplifier must have a bandwidth that is eight to 10 times the
filter frequency bandwidth. Failure to follow this guideline may result in phase shift of the amplifier.
C1
R1
R1 = R2 = R
C1 = C2 = C
Q = Peaking factor
(Butterworth Q = 0.707)
R2
VIN
VOUT
C2
1
2pRC
f-3 dB =
RF
RF
RG =
RG
(
2-
1
Q
(
Figure 24. Two-Pole, Low-Pass, Sallen-Key Filter
10 Power Supply Recommendations
The TLVx313-Q1 family is specified for operation from 1.8 V to 5.5 V (±0.9 V to ±2.75 V); many specifications
apply from –40°C to +125°C. The Typical Characteristics section presents parameters that may exhibit significant
variance with regard to operating voltage or temperature.
CAUTION
Supply voltages larger than 7 V can permanently damage the device (see the Absolute
Maximum Ratings table).
Place 0.1-µF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or highimpedance power supplies. For more detailed information on bypass capacitor placement, refer to the Layout
Guidelines section.
18
Submit Documentation Feedback
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
TLV313-Q1, TLV2313-Q1
www.ti.com
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
11 Layout
11.1 Layout Guidelines
For best operational performance of the device, use good printed circuit board (PCB) layout practices, including:
• Noise may propagate into analog circuitry through the power pins of the circuit and the operational
amplifier. Use bypass capacitors to reduce the coupled noise by providing low-impedance power sources
local to the analog circuitry.
– Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as
close to the device as possible. A single bypass capacitor from V+ to ground is applicable for singlesupply applications.
• Separate grounding for analog and digital portions of the circuitry is one of the simplest and most
effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to
ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Take care to
physically separate digital and analog grounds, paying attention to the flow of the ground current. For
more detailed information, see Circuit Board Layout Techniques.
• To reduce parasitic coupling, run the input traces as far away from the supply or output traces as
possible. If the traces cannot be kept separate, crossing the sensitive trace perpendicularly is much better
than crossing in parallel with the noisy trace.
• Place the external components as close to the device as possible. Keep RF and RG close to the inverting
input to minimize parasitic capacitance, as shown in Figure 25.
• Keep the length of input traces as short as possible. Remember that the input traces are the most
sensitive part of the circuit.
• Consider a driven, low-impedance guard ring around the critical traces. A guard ring may significantly
reduce leakage currents from nearby traces that are at different potentials.
11.2 Layout Example: Single Channel
Run the input traces
as far away from
the supply lines
VIN
as possible.
VS±
VS+
+IN
V+
V±
Use a low-ESR,
ceramic bypass
capacitor.
GND
Use a low-ESR,
ceramic bypass
capacitor.
RG
OUT
±IN
VOUT
GND
RF
Place components
close to the device and
to each other to reduce
parasitic errors.
Copyright © 2017, Texas Instruments Incorporated
Figure 25. Operational Amplifier Board Layout for Noninverting Configuration
+
VIN
VOUT
RG
RF
Figure 26. Schematic Representation of Figure 25
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
Submit Documentation Feedback
19
TLV313-Q1, TLV2313-Q1
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
www.ti.com
11.3 Layout Example: Dual Channel
+
VIN 1
+
VIN 2
VOUT 1
RG
VOUT 2
RG
RF
RF
Figure 27. Schematic Representation for Figure 28
Place components
close to device and to
each other to reduce
parasitic errors .
OUT 1
VS+
OUT1
Use low-ESR,
ceramic bypass
capacitor . Place as
close to the device
as possible .
GND
V+
RF
OUT 2
GND
IN1 ±
OUT2
IN1 +
IN2 ±
RF
RG
VIN 1
GND
RG
V±
Use low-ESR,
ceramic bypass
capacitor . Place as
close to the device
as possible .
GND
VS±
IN2 +
VIN 2
Keep input traces short
and run the input traces
as far away from
the supply lines
as possible .
Ground (GND) plane on another layer
Figure 28. Layout Example
20
Submit Documentation Feedback
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
TLV313-Q1, TLV2313-Q1
www.ti.com
SBOS884A – OCTOBER 2017 – REVISED DECEMBER 2018
12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation, see the following:
• EMI Rejection Ratio of Operational Amplifiers
• Circuit Board Layout Techniques
12.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to order now.
Table 2. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TLV313-Q1
Click here
Click here
Click here
Click here
Click here
TLV2313-Q1
Click here
Click here
Click here
Click here
Click here
12.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.5 Trademarks
E2E is a trademark of Texas Instruments.
12.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2017–2018, Texas Instruments Incorporated
Product Folder Links: TLV313-Q1 TLV2313-Q1
Submit Documentation Feedback
21
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TLV2313QDGKRQ1
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
1NJ6
TLV2313QDRQ1
ACTIVE
SOIC
D
8
2500
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
V2313Q
TLV313QDCKRQ1
ACTIVE
SC70
DCK
5
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
19A
TLV313QDCKTQ1
ACTIVE
SC70
DCK
5
250
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
19A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
