0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
TLV2373IDG4

TLV2373IDG4

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC14_150MIL

  • 描述:

    General Purpose Amplifier 2 Circuit Rail-to-Rail 14-SOIC

  • 详情介绍
  • 数据手册
  • 价格&库存
TLV2373IDG4 数据手册
Product Folder Sample & Buy Support & Community Tools & Software Technical Documents Reference Design TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 TLV237x 500-µA/Ch, 3-MHz Rail-to-Rail Input and Output Operational Amplifiers With Shutdown 1 Features 3 Description • • • • • • The TLV237x single-supply operational amplifiers provide rail-to-rail input and output capability. The TLV237x takes the minimum operating supply voltage down to 2.7 V over the extended industrial temperature range while adding the rail-to-rail output swing feature. The TLV237x also provides 3-MHz bandwidth from only 550 μA. The maximum recommended supply voltage is 16 V, which allows the devices to be operated from (±8-V supplies down to ±1.35 V) a variety of rechargeable cells. 1 • • • • Rail-to-Rail Input and Output Wide Bandwidth: 3 MHz High Slew Rate: 2.4 V/μs Supply Voltage Range: 2.7 V to 16 V Supply Current: 550 μA/Channel Low-Power Shutdown Mode – IDD(SHDN): 25 μA/Channel Input Noise Voltage: 39 nV/√Hz Input Bias Current: 1 pA Specified Temperature Range: – −40°C to +125°C (Industrial Grade) Ultra-Small Packaging: – 5- or 6-Pin SOT-23 (TLV2370, TLV2371) – 8- or 10-Pin MSOP (TLV2372, TLV2373) 2 Applications • • • • • • • White Goods Handheld Test Equipment Portable Blood Glucose Systems Remote Sensing Active Filters Industrial Automation Battery-Powered Electronics Operational Amplifier The CMOS inputs enable use in high-impedance sensor interfaces, with the lower voltage operation making an ideal alternative for the TLC227x in battery-powered applications. The rail-to-rail input stage further increases its versatility. The TLV237x is the seventh member of a rapidly growing number of RRIO products available from TI, and it is the first to allow operation up to 16-V rails with good ac performance. All members are available in PDIP and SOIC with the singles in the small SOT-23 package, duals in the MSOP, and quads in the TSSOP package. The 2.7-V operation makes the TLV237x compatible with Li-Ion powered systems and the operating supply voltage range of many micro-power microcontrollers available today including TI’s MSP430. Device Information(1) PART NUMBER − + TLV237x PACKAGE BODY SIZE (NOM) PDIP (8) 9.81 mm × 6.35 mm PDIP (14) 19.30 mm × 6.35 mm SOIC (8) 4.90 mm × 3.91 mm SOIC (14) 8.65 mm × 3.91 mm TSSOP (14) TSSOP (16) SOT-23 (6) SOT-23 (5) VSSOP (8) VSSOP (10) 5.00 mm × 4.40 mm 2.90 mm × 1.60 mm 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Comparison Tables................................... Pin Configuration and Functions ......................... Specifications......................................................... 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10 8 1 1 1 2 3 3 8 Absolute Maximum Ratings ...................................... 8 Recommended Operating Conditions....................... 8 Thermal Information: TLV2370 ................................. 9 Thermal Information: TLV2371 ................................. 9 Thermal Information: TLV2372 ................................. 9 Thermal Information: TLV2373 ............................... 10 Thermal Information: TLV2374 ............................... 10 Thermal Information: TLV2375 ............................... 10 Electrical Characteristics......................................... 11 Typical Characteristics .......................................... 15 Detailed Description ............................................ 22 8.1 Overview ................................................................. 22 8.2 Functional Block Diagram ....................................... 22 8.3 Feature Description................................................. 22 8.4 Device Functional Modes........................................ 24 9 Application and Implementation ........................ 25 9.1 Application Information............................................ 25 9.2 Typical Application .................................................. 25 10 Power Supply Recommendations ..................... 27 11 Layout................................................................... 27 11.1 Layout Guidelines ................................................. 27 11.2 Layout Example .................................................... 27 11.3 Power Dissipation Considerations ........................ 28 12 Device and Documentation Support ................. 29 12.1 12.2 12.3 12.4 12.5 12.6 12.7 Documentation Support ........................................ Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 29 29 29 29 29 29 29 13 Mechanical, Packaging, and Orderable Information ........................................................... 30 4 Revision History Changes from Revision E (May 2016) to Revision F • Page Changed names of pins 2 and 3 in TLV2372 D, DGK, and P packages pinout diagram ...................................................... 4 Changes from Revision D (January 2005) to Revision E Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1 • Deleted TLV2370 and TLV2371 Available Options, TLV2372 AND TLV2373 Available Options, and TLV2374 and TLV2375 Available Options tables ......................................................................................................................................... 3 • Deleted Continuous total power dissipation and lead temperature specifications from Absolute Maximum Ratings table ... 8 • Deleted Dissipation Ratings table ........................................................................................................................................ 14 2 Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 www.ti.com SLOS270F – MARCH 2001 – REVISED AUGUST 2016 5 Device Comparison Tables Table 1. Selection of Signal Amplifier Products (1) DEVICE VDD (V) VIO (µV) IQ/Ch (µA) IIB (pA) GBW (MHz) SR (V/µs) SHUTDOWN RAIL-TORAIL SINGLES, DUALS, QUADS TLV237x 2.7 to 16 500 550 1 3 2.4 Yes I/O S, D, Q TLC227x 4 to 16 300 1100 1 2.2 3.6 — O D, Q TLV27x 2.7 to 16 500 550 1 3 2.4 — O S, D, Q TLC27x 3 to 16 1100 675 1 1.7 3.6 — — S, D, Q TLV246x 2.7 to 16 150 550 1300 6.4 1.6 Yes I/O S, D, Q TLV247x 2.7 to 16 250 600 2 2.8 1.5 Yes I/O S, D, Q TLV244x 2.7 to 10 300 725 1 1.8 1.4 — O D, Q (1) Typical values measured at 5 V and 25°C. Table 2. Family Package Table (1) PACKAGE TYPES DEVICE NUMBER OF CHANNELS PDIP SOIC SOT-23 TSSOP MSOP TLV2370 1 8 8 6 — — Yes TLV2371 1 8 8 5 — — — TLV2372 2 8 8 — — 8 — TLV2373 2 14 14 — — 10 Yes TLV2374 4 14 14 — 14 — — TLV2375 4 16 16 — 16 — Yes (1) SHUTDOWN UNIVERSAL EVM BOARD See the EVM Selection Guide For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. 6 Pin Configuration and Functions TLV2370 DBV Package 6-Pin SOT-23 Top View 6 1 OUT GND IN+ 2 3 TLV2370 D and P Packages 8-Pin SOIC and PDIP Top View VDD SHDN 5 IN- 4 NC 1 8 SHDN IN- 2 7 VDD IN+ 3 6 OUT GND 4 5 NC Pin Functions: TLV2370 PIN NAME I/O DESCRIPTION SOT-23 SOIC, PDIP GND 2 4 — IN– 4 2 I Negative (inverting) input IN+ 3 3 I Positive (noninverting) input NC — 1, 5 — No internal connection (can be left floating) OUT 1 6 O Output SHDN 5 8 I Shutdown control (active low, can be left floating) VDD 6 7 — Copyright © 2001–2016, Texas Instruments Incorporated Ground connection Positive power supply Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 3 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 www.ti.com TLV2371 DBV Package 5-Pin SOT-23 Top View OUT 5 1 GND TLV2371 D and P Packages 8-Pin SOIC and PDIP Top View VDD 2 3 IN+ 4 NC 1 8 NC IN- 2 7 VDD IN + 3 6 OUT GND 4 5 NC IN- Pin Functions: TLV2371 PIN NAME I/O DESCRIPTION SOT-23 SOIC, PDIP GND 2 4 — IN– 4 2 I Negative (inverting) input IN+ 3 3 I Positive (noninverting) input NC — 1, 5, 8 — No internal connection (can be left floating) OUT 1 6 O Output VDD 5 7 — Positive power supply Ground connection TLV2372 D, DGK, and P Packages 8-Pin SOIC, VSSOP, and PDIP Top View 1OUT 1 8 VDD 1IN- 2 7 2OUT 1IN+ 3 6 2IN- GND 4 5 2IN+ Pin Functions: TLV2372 PIN SOIC, VSSOP, PDIP I/O GND 4 — 1IN– 2 I Inverting input, channel 1 1IN+ 3 I Noninverting input, channel 1 2IN– 6 I Inverting input, channel 2 2IN+ 5 I Noninverting input, channel 2 1OUT 1 O Output, channel 1 2OUT 7 O Output, channel 2 VDD 8 — Positive power supply NAME 4 Submit Documentation Feedback DESCRIPTION Ground connection Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 www.ti.com SLOS270F – MARCH 2001 – REVISED AUGUST 2016 TLV2373 DGS Package 10-Pin VSSOP Top View VDD 1OUT 1 10 1IN- 2 9 2OUT 1IN+ 3 8 2IN- GND 4 7 2IN+ 5 1SHDN 6 TLV2373 D and N Packages 14-Pin SOIC and PDIP Top View 1OUT 1 14 VDD 1IN- 2 13 2OUT 1IN+ 3 12 2IN- GND 4 11 2IN+ NC 2SHDN NC 5 10 1SHDN 6 9 2SHDN NC 7 8 NC Pin Functions: TLV2373 PIN NAME I/O DESCRIPTION SOIC, PDIP VSSOP GND 4 4 — 1IN– 2 2 I Inverting input, channel 1 1IN+ 3 3 I Noninverting input, channel 1 2IN– 12 8 I Inverting input, channel 2 2IN+ 11 7 I Noninverting input, channel 2 1OUT 1 1 O Output, channel 1 2OUT 13 9 O Output, channel 2 1SHDN 6 5 I Shutdown control, channel 1, (active low, can be left floating) 2SHDN 9 6 I Shutdown control, channel 2, (active low, can be left floating) VDD 14 10 — Positive power supply NC 5, 7, 8, 10 — — No internal connection (can be left floating) Copyright © 2001–2016, Texas Instruments Incorporated Ground connection Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 5 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 www.ti.com TLV2374 D, N, and PW Packages 14-Pin SOIC, PDIP, and TSSOP Top View 1OUT 1 14 4OUT 1IN- 2 13 4IN- 1IN+ 3 12 4IN+ VDD 4 11 GND 2IN+ 5 10 3IN+ 2IN- 6 9 3IN- 2OUT 7 8 3OUT Pin Functions: TLV2374 PIN NAME SOIC, PDIP, TSSOP I/O DESCRIPTION GND 11 — 1IN– 2 I Inverting input, channel 1 1IN+ 3 I Noninverting input, channel 1 2IN– 6 I Inverting input, channel 2 2IN+ 5 I Noninverting input, channel 2 3IN– 9 I Inverting input, channel 3 3IN+ 10 I Noninverting input, channel 3 4IN– 13 I Inverting input, channel 4 4IN+ 12 I Noninverting input, channel 4 1OUT 1 O Output, channel 1 2OUT 7 O Output, channel 2 3OUT 8 O Output, channel 3 4OUT 14 O Output, channel 4 VDD 4 — Positive power supply 6 Submit Documentation Feedback Ground connection Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 www.ti.com SLOS270F – MARCH 2001 – REVISED AUGUST 2016 TLV2375 D, N, and PW Packages 16-Pin SOIC, PDIP, and TSSOP Top View 1OUT 1IN − 1IN+ VDD+ 2IN+ 2IN − 2OUT 1/2SHDN 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 4OUT 4IN − 4IN+ GND 3IN + 3IN− 3OUT 3/4SHDN Pin Functions: TLV2375 PIN NAME SOIC, PDIP, TSSOP I/O DESCRIPTION GND 13 — 1IN– 2 I Ground connection Inverting input, channel 1 2IN– 6 I Inverting input, channel 2 3IN– 11 I Inverting input, channel 3 4IN– 15 I Inverting input, channel 4 1IN+ 3 I Noninverting input, channel 1 2IN+ 5 I Noninverting input, channel 2 3IN+ 12 I Noninverting input, channel 3 4IN+ 14 I Noninverting input, channel 4 1OUT 1 O Output, channel 1 2OUT 7 O Output, channel 2 3OUT 10 O Output, channel 3 4OUT 16 O Output, channel 4 1/2SHDN 8 I Shutdown control, channels 1 and 2, (active low, can be left floating) 3/4SHDN 9 I Shutdown control, channels 3 and 4, (active low, can be left floating) VDD 4 — Positive power supply TYPICAL PIN 1 INDICATORS Pin 1 Printed or Molded Dot Pin 1 Stripe Pin 1 Bevel Edges Pin 1 Molded “U” Shape If there is not a Pin 1 indicator, turn device to enable reading the symbol from the left to right. Pin 1 is at the lower left corner of the device. Figure 1. Typical Pin 1 Indicators Copyright © 2001–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 7 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN Supply voltage, VDD Voltage Current Temperature (2) UNIT 16.5 Differential input voltage, VID –VDD VDD Input voltage, VI (2) –0.2 VDD + 0.2 Input current, IIN –10 10 Output current, IO –100 100 Operating free-air temperature, TA: I-suffix –40 125 Maximum junction temperature, TJ Storage temperature, Tstg (1) MAX (2) V mA 150 –65 °C 150 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, except differential voltages, are with respect to GND. 7.2 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted). Single supply Supply voltage, VDD Split supply Common-mode input voltage, VCM Operating free-air temperature, TA I-suffix MIN MAX 2.7 16 ±1.35 ±8 0 VDD V –40 125 °C 2 V Turnon voltage (shutdown pin voltage level), V(ON), relative to GND pin voltage Turnoff (shutdown pin voltage level), V(OFF), relative to GND pin voltage 8 Submit Documentation Feedback 0.8 UNIT V V Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 www.ti.com SLOS270F – MARCH 2001 – REVISED AUGUST 2016 7.3 Thermal Information: TLV2370 TLV2370 THERMAL METRIC (1) DBV (SOT-23) D (SOIC) P (PDIP) 6 PINS 8 PINS 8 PINS UNIT RθJA Junction-to-ambient thermal resistance 228.5 138.4 49.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 99.1 89.5 39.4 °C/W RθJB Junction-to-board thermal resistance 54.6 78.6 26.4 °C/W ψJT Junction-to-top characterization parameter 7.7 29.9 15.4 °C/W ψJB Junction-to-board characterization parameter 53.8 78.1 26.3 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 7.4 Thermal Information: TLV2371 TLV2371 THERMAL METRIC (1) DBV (SOT-23) D (SOIC) P (PDIP) 5 PINS 8 PINS 8 PINS UNIT RθJA Junction-to-ambient thermal resistance 228.5 138.4 49.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 99.1 89.5 39.4 °C/W RθJB Junction-to-board thermal resistance 54.6 78.6 26.4 °C/W ψJT Junction-to-top characterization parameter 7.7 29.9 15.4 °C/W ψJB Junction-to-board characterization parameter 53.8 78.1 26.3 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 7.5 Thermal Information: TLV2372 TLV2372 THERMAL METRIC (1) D (SOIC) DGK (VSSOP) P (PDIP) 8 PINS 8 PINS 8 PINS UNIT RθJA Junction-to-ambient thermal resistance 138.4 191.2 49.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 89.5 61.9 39.4 °C/W RθJB Junction-to-board thermal resistance 78.6 111.9 26.4 °C/W ψJT Junction-to-top characterization parameter 29.9 5.1 15.4 °C/W ψJB Junction-to-board characterization parameter 78.1 110.2 26.3 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Copyright © 2001–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 9 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 www.ti.com 7.6 Thermal Information: TLV2373 TLV2373 THERMAL METRIC (1) DGS (VSSOP) D (SOIC) P (PDIP) 10 PINS 14 PINS 14 PINS UNIT RθJA Junction-to-ambient thermal resistance 166.5 67 66.3 °C/W RθJC(top) Junction-to-case (top) thermal resistance 41.8 24.1 20.5 °C/W RθJB Junction-to-board thermal resistance 86.1 22.5 26.8 °C/W ψJT Junction-to-top characterization parameter 1.5 2.2 2.1 °C/W ψJB Junction-to-board characterization parameter 84.7 22.1 26.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 7.7 Thermal Information: TLV2374 TLV2374 THERMAL METRIC (1) D (SOIC) N (PDIP) PW (TSSOP) 14 PINS 14 PINS 14 PINS UNIT 67 66.3 121 °C/W RθJA Junction-to-ambient thermal resistance RθJC(top) Junction-to-case (top) thermal resistance 24.1 20.5 49.4 °C/W RθJB Junction-to-board thermal resistance 22.5 26.8 62.8 °C/W ψJT Junction-to-top characterization parameter 2.2 2.1 5.9 °C/W ψJB Junction-to-board characterization parameter 22.1 26.2 62.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 7.8 Thermal Information: TLV2375 TLV2375 THERMAL METRIC (1) D (SOIC) N (PDIP) PW (TSSOP) 16 PINS 16 PINS 16 PINS UNIT RθJA Junction-to-ambient thermal resistance 83 55.8 115.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 44 43.1 50.5 °C/W RθJB Junction-to-board thermal resistance 40.5 35.8 60.7 °C/W ψJT Junction-to-top characterization parameter 11.5 27.9 7.4 °C/W ψJB Junction-to-board characterization parameter 40.2 35.7 60.1 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a °C/W (1) 10 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 www.ti.com SLOS270F – MARCH 2001 – REVISED AUGUST 2016 7.9 Electrical Characteristics at TA = 25°C, VDD = 2.7 V, 5 V, and 15 V (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 2 4.5 mV 6 mV DC PERFORMANCE At TA = 25°C, VIC = VDD/2, VO = VDD/2, RS = 50 Ω VOS Input offset voltage At TA = –40°C to +125°C, VIC = VDD/2, VO = VDD/2, RS = 50 Ω dVOS/dT Offset voltage drift At TA = 25°C, VIC = VDD/2, VO = VDD/2, RS = 50 Ω VDD = 2.7 V, RS = 50 Ω CMRR Common-mode rejection ratio VDD = 5 V, RS = 50 Ω VDD = 15 V, RS = 50 Ω VDD = 2.7 V, VO(PP) = VDD/2, RL = 10 kΩ AVD Large-signal differential voltage amplification VDD = 5 V, VO(PP) = VDD/2, RL = 10 kΩ VDD = 15 V, VO(PP) = VDD/2, RL = 10 kΩ 2 VIC = 0 to VDD 50 At TA = –40°C to +125°C, VIC = 0 to VDD 49 VIC = 0 to VDD − 1.35 V 56 At TA = –40°C to +125°C, VIC = 0 to VDD − 1.35 V 54 VIC = 0 to VDD 55 At TA = –40°C to +125°C, VIC = 0 to VDD 54 VIC = 0 to VDD − 1.35 V 67 At TA = –40°C to +125°C, VIC = 0 to VDD − 1.35 V 64 VIC = 0 to VDD 64 At TA = –40°C to +125°C, VIC = 0 to VDD 63 VIC = 0 to VDD − 1.35 V 67 At TA = –40°C to +125°C, VIC = 0 to VDD − 1.35 V 66 98 At TA = –40°C to +125°C 72 dB 80 82 84 106 110 dB 86 81 At TA = –40°C to +125°C 70 76 100 At TA = –40°C to +125°C µV/°C 68 83 79 INPUT CHARACTERISTICS IOS IB Input offset current Input bias current VDD = 15 V, VIC = VO = VDD/2 VDD = 15 V, VIC = VO = VDD/2 1 100 At TA = 125°C 1000 1 100 At TA = 125°C 1000 f = 21 kHz Copyright © 2001–2016, Texas Instruments Incorporated pA 1000 GΩ 8 pF Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 pA 60 At TA = 70°C Differential input resistance Common-mode input capacitance 60 At TA = 70°C 11 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 www.ti.com Electrical Characteristics (continued) at TA = 25°C, VDD = 2.7 V, 5 V, and 15 V (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP At TA = 25°C, VIC = VDD/2, IOH = −1 mA 2.55 2.58 At TA = –40°C to +125°C, VIC = VDD/2, IOH = −1 mA 2.48 At TA = 25°C, VIC = VDD/2, IOH = −1 mA 4.9 At TA = –40°C to +125°C, VIC = VDD/2, IOH = −1 mA 4.85 At TA = 25°C, VIC = VDD/2, IOH = −1 mA 14.92 At TA = –40°C to +125°C, VIC = VDD/2, IOH = −1 mA 14.9 At TA = 25°C, VIC = VDD/2, IOH = −5 mA 1.9 At TA = –40°C to +125°C, VIC = VDD/2, IOH = −5 mA 1.6 At TA = 25°C, VIC = VDD/2, IOH = −5 mA 4.6 At TA = –40°C to +125°C, VIC = VDD/2, IOH = −5 mA 4.5 At TA = 25°C, VIC = VDD/2, IOH = −5 mA 14.7 At TA = –40°C to +125°C, VIC = VDD/2, IOH = −5 mA 14.6 MAX UNIT OUTPUT CHARACTERISTICS VDD = 2.7 V VDD = 5 V VDD = 15 V VOH High-level output voltage VDD = 2.7 V VDD = 5 V VDD = 15 V At TA = 25°C, VIC = VDD/2, IOL = 1 mA VDD = 2.7 V VOL Low-level output voltage 12 Output current Submit Documentation Feedback 0.1 0.15 0.22 0.05 0.1 0.15 0.05 0.08 0.1 0.52 0.7 V 1.1 0.28 At TA = –40°C to +125°C, VIC = VDD/2, IOL = 5 mA At TA = 25°C, VIC = VDD/2, IOL = 5 mA IO 14.8 At TA = –40°C to +125°C, VIC = VDD/2, IOL = 5 mA At TA = 25°C, VIC = VDD/2, IOL = 5 mA VDD = 5 V V 4.68 At TA = –40°C to +125°C, VIC = VDD/2, IOL = 1 mA At TA = 25°C, VIC = VDD/2, IOL = 5 mA VDD = 2.7 V 2 At TA = –40°C to +125°C, VIC = VDD/2, IOL = 1 mA At TA = 25°C, VIC = VDD/2, IOL = 1 mA VDD = 15 V 14.96 At TA = –40°C to +125°C, VIC = VDD/2, IOL = 1 mA At TA = 25°C, VIC = VDD/2, IOL = 1 mA VDD = 5 V 4.93 0.4 0.5 0.19 VDD = 15 V At TA = –40°C to +125°C, VIC = VDD/2, IOL = 5 mA VDD = 2.7 V, VO = 0.5 V from rail Positive rail 4 Negative rail 5 VDD = 5 V, VO = 0.5 V from rail Positive rail 7 Negative rail 8 VDD = 15 V, VO = 0.5 V from rail Positive rail 16 Negative rail 15 0.3 0.35 mA Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 www.ti.com SLOS270F – MARCH 2001 – REVISED AUGUST 2016 Electrical Characteristics (continued) at TA = 25°C, VDD = 2.7 V, 5 V, and 15 V (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX VDD = 2.7 V, VO = VDD/2 470 560 VDD = 5 V, VO = VDD/2 550 660 750 900 UNIT POWER SUPPLY IDD PSRR Supply current (per channel) Power-supply rejection ratio (ΔVDD/ΔVIO) VDD = 15 V, VO = VDD/2 At TA = 25°C VDD = 2.7 V to 15 V, VIC = VDD/2, no load At TA = 25°C 70 At TA = –40°C to +125°C 65 VDD = 2.7 V RL = 2 kΩ, CL = 10 pF 2.4 VDD = 5 V to 15 V RL = 2 kΩ, CL = 10 pF 3 At TA = –40°C to +125°C µA 1200 80 dB DYNAMIC PERFORMANCE UGBW Unity gain bandwidth At TA = 25°C, VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ VDD = 2.7 V SR Slew rate at unity gain VDD = 5 V VDD = 15 V φm ts At TA = –40°C to +125°C, VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ 1.4 MHz 2 1 At TA = 25°C, VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ 1.6 At TA = –40°C to +125°C, VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ 1.2 At TA = 25°C, VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ 1.9 At TA = –40°C to +125°C, VO(PP) = VDD/2, CL = 50 pF, RL = 10 kΩ 1.4 2.4 V/µs 2.1 Phase margin RL = 2 kΩ, CL = 100 pF 65 ° Gain margin RL = 2 kΩ, CL = 10 pF 18 dB VDD = 2.7 V, V(STEP)PP = 1 V, AV = −1, CL = 10 pF, RL = 2 kΩ, 0.1% 2.9 Settling time µs VDD = 5 V, 15 V, V(STEP)PP = 1 V, AV = −1, CL = 47 pF, RL = 2 kΩ, 0.1% Copyright © 2001–2016, Texas Instruments Incorporated 2 Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 13 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 www.ti.com Electrical Characteristics (continued) at TA = 25°C, VDD = 2.7 V, 5 V, and 15 V (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT NOISE, DISTORTION PERFORMANCE VDD = 2.7 V THD + N Total harmonic distortion plus noise VDD = 5 V, 15 V VO(PP)= VDD/2 V, RL = 2 kΩ, f = 10 kHz, AV = 1 0.02% VO(PP)= VDD/2 V, RL = 2 kΩ, f = 10 kHz, AV = 10 0.05% VO(PP)= VDD/2 V, RL = 2 kΩ, f = 10 kHz, AV = 100 0.18% VO(PP)= VDD/2 V, RL = 2 kΩ, f = 10 kHz, AV = 1 0.02% VO(PP)= VDD/2 V, RL = 2 kΩ, f = 10 kHz, AV = 10 0.09% VO(PP)= VDD/2 V, RL = 2 kΩ, f = 10 kHz, AV = 100 0.5% f = 1 kHz 39 f = 10 kHz 35 Vn Equivalent input noise voltage In Equivalent input noise current f = 1 kHz nV/√Hz 0.6 fA/√Hz SHUTDOWN CHARACTERISTICS IDD(SHDN) Supply current in shutdown mode (TLV2370, TLV2373, TLV2375) (per channel) VDD = 2.7 V, 5 V, SHDN = 0 V At TA = 25°C VDD = 15 V, SHDN = 0 V At TA = 25°C 25 At TA = –40°C to +125°C 30 35 40 At TA = –40°C to +125°C µA 45 50 t(on) Amplifier turnon time (1) RL = 2 kΩ 0.8 µs t(off) Amplifier turnoff time (1) RL = 2 kΩ 1 µs (1) 14 Disable time and enable time are defined as the interval between application of the logic signal to the SHDN terminal and the point at which the supply current has reached one half of its final value. Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 www.ti.com SLOS270F – MARCH 2001 – REVISED AUGUST 2016 7.10 Typical Characteristics Table 3. Table of Graphs FIGURE VIO Input offset voltage vs Common-mode input voltage CMRR Common-mode rejection ratio vs Frequency Figure 2, Figure 3, Figure 4 Figure 5 Input bias and offset current vs Free-air temperature Figure 6 VOL Low-level output voltage vs Low-level output current Figure 7, Figure 9, Figure 11 VOH High-level output voltage vs High-level output current Figure 8, Figure 10, Figure 12 VO(PP) Peak-to-peak output voltage vs Frequency Figure 13 IDD Supply current vs Supply voltage Figure 14 PSRR Power supply rejection ratio vs Frequency Figure 15 AVD Differential voltage gain and phase vs Frequency Figure 16 Gain-bandwidth product vs Free-air temperature Figure 17 vs Supply voltage Figure 18 vs Free-air temperature Figure 19 SR Slew rate φm Phase margin vs Capacitive load Figure 20 Vn Equivalent input noise voltage vs Frequency Figure 21 Voltage-follower large-signal pulse response Figure 22, Figure 23 Voltage-follower small-signal pulse response Figure 24 Inverting large-signal response Figure 25, Figure 26 Inverting small-signal response Figure 27 Crosstalk vs Frequency Figure 28 Shutdown forward & reverse isolation vs Frequency Figure 29 IDD(SHDN) Shutdown supply current vs Supply voltage Figure 30 IDD(SHDN) Shutdown pin leakage current vs Shutdown pin voltage IDD(SHDN) Shutdown supply current, output voltage vs Time Copyright © 2001–2016, Texas Instruments Incorporated Figure 31 Figure 32, Figure 33 Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 15 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 1000 VDD = 2.7 V TA = 25°C 800 Input Offset Voltage (mV) Input Offset Voltage (mV) 1000 www.ti.com 600 400 200 0 VDD = 5 V TA = 25°C 800 600 400 200 0 -200 -200 0 0.4 0.8 1.2 1.6 2 2.4 2.7 0 1 Common-Mode Input Voltage (V) Figure 2. Input Offset Voltage vs Common-Mode Input Voltage 600 400 200 0 -200 100 VDD = 5 V, 15 V 80 VDD = 2.7 V 60 40 20 2 4 6 8 10 12 14 15 10 100 1k Common-Mode Input Voltage (V) 1M Figure 5. Common-Mode Rejection Ratio vs Frequency Low-Level Output Voltage (V) Input Bias/Offset Current (pA) 100 k 2.80 VDD = 2.7 V, 5 V, 15 V VIC = VDD/2 200 150 100 50 0 VDD = 2.7 V 2.40 TA = 125°C 2 1.60 TA = 70°C 1.20 TA = 25°C 0.80 TA = 0°C 0.40 TA = -40°C 0 -50 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature, TA (°C) Figure 6. Input Bias or Offset Current vs Free-Air Temperature 16 10 k Frequency (Hz) Figure 4. Input Offset Voltage vs Common-Mode Input Voltage 250 5 0 0 300 4 120 VDD = 15 V TA = 25°C 800 3 Figure 3. Input Offset Voltage vs Common-Mode Input Voltage Common-Mode Rejection Ratio (dB) Input Offset Voltage (mV) 1000 2 Common-Mode Input Voltage (V) Submit Documentation Feedback 0 2 4 6 8 10 12 14 16 18 20 24 28 Low-Level Output Current (mA) Figure 7. Low-Level Output Voltage vs Low-Level Output Current Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 www.ti.com SLOS270F – MARCH 2001 – REVISED AUGUST 2016 2.80 5 2.40 TA = -40°C 2 TA = 125°C 1.60 TA = 70°C 1.20 TA = 25°C 0.80 TA = 0°C 0.40 VDD = 5 V 4.50 Low-Level Output Voltage (V) High-Level Output Voltage (V) VDD = 2.7 V TA = 125°C 4 TA = 70°C 3.50 3 TA = 25°C 2.50 TA = 0°C 2 1.50 TA = -40°C 1 0.50 0 0 0 1 2 4 3 5 7 6 8 9 10 11 12 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 High-Level Output Current (mA) Low-Level Output Current (mA) Figure 8. High-Level Output Voltage vs High-Level Output Current 5 15 14 VCC = 5 V 4.50 TA = 0°C 4 3.50 Low-Level Output Voltage (V) High-Level Output Voltage (V) Figure 9. Low-Level Output Voltage vs Low-Level Output Current TA = -40°C 3 TA = 25°C 2.50 2 TA = 70°C 1.50 1 TA = 125°C 0.50 10 TA = 70°C 8 6 TA = 25°C TA = 0°C 4 TA = -40°C 2 0 0 0 5 10 15 20 25 30 35 45 40 0 20 TA = -40°C VDD = 15 V 12 TA = 0°C 10 8 TA = 25°C 6 TA = 70°C 4 2 TA = 125°C 0 0 20 40 60 80 100 120 60 80 100 120 140 160 140 160 Figure 11. Low-Level Output Voltage vs Low-Level Output Current Peak-to-Peak Output Voltage (V) Figure 10. High-Level Output Voltage vs High-Level Output Current 15 14 40 Low-Level Output Current (mA) High-Level Output Current (mA) High-Level Output Voltage (V) TA = 125°C VDD = 15 V 12 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 AV = -10 RL = 2 kW CL = 10 pF TA = 25°C THD = 5% VDD = 15 V VDD = 5 V VDD = 2.7 V 10 100 1k 10 k 100 k 1M 10 M High-Level Output Current (mA) Frequency (Hz) Figure 12. High-Level Output Voltage vs High-Level Output Current Figure 13. Peak-to-Peak Output Voltage vs Frequency Copyright © 2001–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 17 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 VIC = VDD/2 AV = 2 0.9 Power-Supply Rejection Ratio (dB) 120 1 TA = 125°C 0.8 Supply Current (mA/Ch) www.ti.com TA = 70°C 0.7 0.6 0.5 TA = 25°C 0.4 TA = 0°C 0.3 TA = -40°C 0.2 0.1 TA = 25°C 100 VDD = 5 V, 15 V 80 VDD = 2.7 V 60 40 20 0 0 0 1 2 3 4 5 6 7 8 10 9 10 11 12 13 14 15 100 1k 180 4 100 135 3.5 90 Gain 60 45 40 0 20 -45 VDD = 5 VDC RL = 2 kW CL = 10 pF TA = 25°C -90 -135 Gain Bandwidth Product (MHz) Phase -20 -180 -40 10 100 1k 10 k 100 k 1M VDD = 15 V 3 2.5 VDD = 2.7 V 2 1.5 1 0.5 0 10 M -40 -25 -10 5 Frequency (Hz) Slew Rate (V/ms) Slew Rate (V/ms) 65 80 95 110 125 3 2.5 2 SR+ 1.5 AV = 1 RL = 10 kW CL = 50 pF TA = 25°C 2.5 4.5 2 8.5 10.5 12.5 Figure 18. Slew Rate vs Supply Voltage Submit Documentation Feedback 14.5 SR+ 1.5 1 0 6.5 SR- 2.5 0.5 Supply Voltage (V) 18 50 3.5 SR- 0 35 Figure 17. Gain Bandwidth Product vs Free-Air Temperature 3 0.5 20 Temperature, TA (°C) Figure 16. Differential Voltage Gain and Phase vs Frequency 1 1M VDD = 5 V Phae (°) Differential Voltage Gain (dB) 120 0 100 k Figure 15. Power Supply Rejection Ratio vs Frequency Figure 14. Supply Current vs Supply Voltage 80 10 k Frequency (Hz) Supply Voltage (V) VDD = 5 V AV = 1 RL = 10 kW CL = 50 pF VI = 3 V -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature, TA (°C) Figure 19. Slew Rate vs Free-Air Temperature Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 www.ti.com SLOS270F – MARCH 2001 – REVISED AUGUST 2016 90 80 RNULL = 100 50 40 RNULL = 50 VDD = 5 V RL = 2 kW TA = 25°C AV = Open-Loop 30 20 10 RNULL = 0 0 10 100 80 70 60 50 40 30 20 VDD = 2.7 V, 5 V, 15 V TA = 25°C 10 0 10 1000 100 1k Capacitive Load (pF) Input Voltage (V) Figure 21. Equivalent Input Noise Voltage vs Frequency 4 3 VDD = 5 V AV = 1 RL = 2 kW CL = 10 pF VI = 3 VPP TA = 25°C 1 VI 0 4 3 2 1 VO 0 0 4 2 6 8 10 12 14 16 12 9 VDD = 15 V AV = 1 RL = 2 kW CL = 10 pF VI = 9 VPP TA = 25°C 6 3 VI 0 Output Voltage (V) Input Voltage (V) Figure 20. Phase Margin vs Capacitive Load 2 6 3 VO 0 18 0 4 2 0 0.12 0.08 0.04 VO 0 0 0.2 0.4 0.6 0.8 8 10 12 14 16 18 Figure 23. Voltage-Follower Large-Signal Pulse Response Input Voltage (V) VDD = 5 V AV = 1 RL = 2 kW CL = 10 pF VI = 100 mVPP TA = 25°C 1 1.2 1.4 1.6 Output Voltage (mV) Input Voltage (mV) 0.12 VI 6 Time (ms) Figure 22. Voltage-Follower Large-Signal Pulse Response 0.04 12 9 Time (ms) 0.08 100 k 10 k Frequency (Hz) Output Voltage (V) 60 90 1.8 Time (ms) Figure 24. Voltage-Follower Small-Signal Pulse Response Copyright © 2001–2016, Texas Instruments Incorporated 3 VDD = 5 V AV = 1 RL = 2 kW CL = 10 pF VI = 3 VPP TA = 25°C 2 1 0 VI 3 2 1 VO 0 0 2 4 6 8 10 12 14 Output Voltage (V) Phase Margin (°) 70 100 Equivalent Input Noise Voltage (nV/ÖHz) 100 16 Time (ms) Figure 25. Inverting Large-Signal Response Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 19 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 9 VDD = 15 V AV = -1 RL = 2 kW CL = 10 pF VI = 9 VPP TA = 25°C 6 3 0 VI 9 VO 6 3 0 0 4 2 6 8 10 12 14 0.1 VDD = 5 V AV = -1 RL = 2 kW CL = 10 pF VI = 100 mVPP TA = 25°C 0.05 VI 0 VO 0.05 0 0 16 1 0.5 1.5 Time (ms) Crosstalk (dB) -60 -80 Crosstalk in Shutdown -100 Crosstalk -140 10 100 1k 10 k 100 k Shutdown Forward and Reverse Isolation (dB) VDD = 2.7 V, 5 V, 15 V VI = VDD/2 AV = 1 RL = 2 kW TA = 25°C -120 TA = 125°C TA = 70°C 35 30 TA = 25°C 25 TA = 0°C 20 TA = -40°C 15 10 5 0 4.5 VDD = 2.7 V, 5 V, 15 V VI = VDD/2 RL = 2 kW CL = 10 pF AV = 1 TA = 25°C 140 120 100 80 60 40 20 0 10 100 1k 10 k 100 k 1M 10 M 250 TA = 125°C 200 150 100 50 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Supply Voltage (V) Figure 30. Shutdown Supply Current vs Supply Voltage 20 4 Figure 29. Shutdown Forward and Reverse Isolation vs Frequency Shutdown Pin Leakage Current (pA) Shutdown Supply Current (mA/Ch) 50 40 3.5 Frequency (Hz) Figure 28. Crosstalk vs Frequency SHDN = 0 V VI = VDD/2 AV = 1 3 160 Frequency (Hz) 45 2.5 Figure 27. Inverting Small-Signal Response 0 -40 2 Time (ms) Figure 26. Inverting Large-Signal Response -20 0.1 Output Voltage (V) Input Voltage (V) www.ti.com Output Voltage (V) Input Voltage (V) SLOS270F – MARCH 2001 – REVISED AUGUST 2016 Submit Documentation Feedback 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Shutdown Pin Voltage (V) Figure 31. Shutdown Pin Leakage Current vs Shutdown Pin Voltage Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 Shutdown Pulse (V) 10 VDD = 15 V AV = 1 RL = 2 kW CL = 10 pF VI = VDD/2 TA = 25°C 8 SHDN 6 4 2 Shutdown Pulse (V) www.ti.com 6 5 SHDN 4 VDD = 5 V AV = 1 RL = 2 kW CL = 10 pF VI = VDD/2 TA = 25°C 3 2 1 0 0 6 VO 4.5 3 1.5 0 -1.5 2 1.5 1 0.5 0 -0.5 -1 1 0.75 Supply Current (mA/Ch) Supply Current (mA/Ch) VO 2.5 Output Voltage (V) Output Voltage (V) 7.5 IDD(SHDN = 0) 0.5 0.25 0 -0.25 -40 -20 0 20 40 60 80 100 120 140 160 180 Time (ms) Figure 32. Shutdown Supply Current and Output Voltage vs Time Copyright © 2001–2016, Texas Instruments Incorporated 1 0.75 IDD(SHDN = 0) 0.5 0.25 0 -0.25 -2 -1 0 1 2 3 4 5 6 7 8 9 10 Time (ms) Figure 33. Shutdown Supply Current/output Voltage vs Time Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 21 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 www.ti.com 8 Detailed Description 8.1 Overview The TLV237x single-supply CMOS operational amplifiers provide rail-to-rail input and output capability with 3-MHz bandwidth. Consuming only 550 μA the TLV237x is the perfect choice for portable and battery-operated applications. The maximum recommended supply voltage is 16 V, which allows the devices to be operated from (±8-V supplies down to ±1.35 V) a variety of rechargeable cells. The rail-to-rail inputs with high input impedance make the TLV237x ideal for sensor signal-conditioning applications. 8.2 Functional Block Diagram V+ Reference Current VIN+ VINVBIAS1 Class AB Control Circuitry VO VBIAS2 V(Ground) Copyright © 2016, Texas Instruments Incorporated 8.3 Feature Description 8.3.1 Rail-to-Rail Input Operation The TLV237x input stage consists of two differential transistor pairs, NMOS and PMOS, that operate together to achieve rail-to-rail input operation. The transition point between these two pairs can be seen in Figure 2, Figure 3, and Figure 4 for a 2.7-V, 5-V, and 15-V supply. As the common-mode input voltage approaches the positive supply rail, the input pair switches from the PMOS differential pair to the NMOS differential pair. This transition occurs approximately 1.35 V from the positive rail and results in a change in offset voltage due to different device characteristics between the NMOS and PMOS pairs. If the input signal to the device is large enough to swing between both rails, this transition results in a reduction in common-mode rejection ratio (CMRR). If the input signal does not swing between both rails, it is best to bias the signal in the region where only one input pair is active. This is the region inFigure 2 through Figure 4 where the offset voltage varies slightly across the input range and optimal CMRR can be achieved. This has the greatest impact when operating from a 2.7-V supply voltage. 8.3.2 Driving a Capacitive Load When the amplifier is configured in this manner, capacitive loading directly on the output decreases the device phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, TI recommends that a resistor be placed in series (RNULL) with the output of the amplifier, as shown in Figure 34. A minimum value of 20 Ω should work well for most applications. 22 Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 www.ti.com SLOS270F – MARCH 2001 – REVISED AUGUST 2016 Feature Description (continued) RF RG Input RNULL − Output + CLOAD VDD/2 Figure 34. Driving a Capacitive Load 8.3.3 Offset Voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. Figure 35 can be used to calculate the output offset voltage: RF IIB- RG + − VI VO + RS IIB+ VOO = VIO 1 + ( ( RF RG ± IIB+ RS 1 + ( ( RF RG ± IIB- RF Figure 35. Output Offset Voltage Model 8.3.4 General Configurations When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see Figure 36). RG RF VDD/2 VI − VO + R1 C1 f_ 3dB = 1 2pR1C1 VO æ R öæ 1 ö = ç1 + F ÷ ç ÷ VI è RG ø è 1 + 2pfR1C1 ø Figure 36. Single-Pole Low-Pass Filter If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this task. For best results, the amplifier must have a bandwidth that is 8 to 10 times the filter frequency bandwidth. Failure to do this can result in phase shift of the amplifier. Copyright © 2001–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 23 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 www.ti.com Feature Description (continued) C1 + _ VI R1 R1 = R2 = R C1 = C2 = C Q = Peaking Factor (Butterworth Q = 0.707) R2 C2 1 2pRC RF RG = 1ö æ ç2 - Q ÷ è ø f_3dB = RG RF VDD/2 Figure 37. 2-Pole Low-Pass Sallen-Key Filter 8.3.5 Shutdown Function Three members of the TLV237x family (TLV2370, TLV2373, and TLV2375) have a shutdown terminal for conserving battery life in portable applications. When the shutdown terminal is tied low, the supply current is reduced to 25 μA/channel, the amplifier is disabled, and the outputs are placed in a high impedance mode. To enable the amplifier, the shutdown terminal can either be left floating or pulled high. When the shutdown terminal is left floating, take care to ensure that parasitic leakage current at the shutdown terminal does not inadvertently place the operational amplifier into shutdown. 8.4 Device Functional Modes The TLV2371, TLV2372, and TLV2374 have a single functional mode. These devices are operational as long as the power-supply voltage is between 2.7 V (±1.35 V) and 16 V (±8 V). The TLV2370, TLV2373, and TLV2375 are likewise operational as long as the power-supply voltage is between 2.7 V (±1.35 V) and 16 V (±8 V), additionally these devices also have a shutdown capability. When the shutdown control pin is driven below 0.8 V above ground, the device is in shutdown. If the shutdown control pin voltage is driven to greater than 2 V above ground, the device is in its normal operating mode. See Shutdown Function for additional information regarding shutdown operation. 24 Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 www.ti.com SLOS270F – MARCH 2001 – REVISED AUGUST 2016 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information When designing for low power, choose system components carefully. To minimize current consumption, select large-value resistors. Any resistors can react with stray capacitance in the circuit and the input capacitance of the operational amplifier. These parasitic RC combinations can affect the stability of the overall system. Use of a feedback capacitor assures stability and limits overshoot or gain peaking. 9.2 Typical Application A typical application for an operational amplifier is an inverting amplifier, as shown in Figure 38. An inverting amplifier takes a positive voltage on the input and outputs a signal inverted to the input, making a negative voltage of the same magnitude. In the same manner, the amplifier also makes negative input voltages positive on the output. In addition, amplification can be added by selecting the input resistor RI and the feedback resistor RF. RF VSUP+ RI VOUT + VIN VSUPCopyright © 2016, Texas Instruments Incorporated Figure 38. Application Schematic 9.2.1 Design Requirements The supply voltage must be chosen to be larger than the input voltage range and the desired output range. The limits of the input common-mode range (VCM) and the output voltage swing to the rails (VO) must also be considered. For instance, this application scales a signal of ±0.5 V (1 V) to ±1.8 V (3.6 V). Setting the supply at ±2.5 V is sufficient to accommodate this application. 9.2.2 Detailed Design Procedure Determine the gain required by the inverting amplifier using Equation 1 and Equation 2: VOUT AV VIN AV 1.8 0.5 3.6 (1) (2) When the desired gain is determined, choose a value for RI or RF. Choosing a value in the kΩ range is desirable for general-purpose applications because the amplifier circuit uses currents in the milliamp range. This milliamp current range ensures the device does not draw too much current. The trade-off is that very large resistors (100s of kΩ) draw the smallest current but generate the highest noise. Very small resistors (100s of Ω) generate low noise but draw high current. This example uses 10 kΩ for RI, meaning 36 kΩ is used for RF. These values are determined by Equation 3: Copyright © 2001–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 25 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 www.ti.com Typical Application (continued) AV RF RI (3) 9.2.3 Application Curve 2 1.5 Input Output Voltage (V) 1 0.5 0 -0.5 -1 -1.5 -2 Time Figure 39. Inverting Amplifier Input and Output 26 Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 www.ti.com SLOS270F – MARCH 2001 – REVISED AUGUST 2016 10 Power Supply Recommendations The TLV237x family is specified for operation from 2.7 V to 15 V (±1.35 V to ±7.5 V); many specifications apply from –40°C to +125°C. The Typical Characteristics presents parameters that can exhibit significant variance with regard to operating voltage or temperature. CAUTION Supply voltages larger than 16 V can permanently damage the device (see the Absolute Maximum Ratings table). Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or highimpedance power supplies. For more detailed information on bypass capacitor placement; see Layout. 11 Layout 11.1 Layout Guidelines To achieve the levels of high performance of the TLV237x, follow proper printed-circuit board design techniques. A general set of guidelines is given in the following. • Ground planes—TI highly recommends using a ground plane on the board to provide all components with a low inductive ground connection. However, in the areas of the amplifier inputs and output, the ground plane can be removed to minimize the stray capacitance. • Proper power supply decoupling—Use a 6.8-μF tantalum capacitor in parallel with a 0.1-μF ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1-μF ceramic capacitor should always be used on the supply terminal of every amplifier. In addition, the 0.1-μF capacitor must be placed as close as possible to the supply terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less effective. The designer should strive for distances of less than 0.1 inches between the device power terminals and the ceramic capacitors. • Sockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board is the best implementation. • Short trace runs and compact part placements—Optimum high performance is achieved when stray series inductance has been minimized. To realize this, the circuit layout must be made as compact as possible, thereby minimizing the length of all trace runs. Pay particular attention to the inverting input of the amplifier. Its length must be kept as short as possible. This helps to minimize stray capacitance at the input of the amplifier. • Surface-mount passive components—Using surface-mount passive components is recommended for high performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray inductance and capacitance. If leaded components are used, TI recommends that the lead lengths be kept as short as possible. 11.2 Layout Example VIN + VOUT ± RG RF Copyright © 2016, Texas Instruments Incorporated Figure 40. Schematic Representation Copyright © 2001–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 27 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 www.ti.com Layout Example (continued) Place components close to device and to eachother to reduce parasitic errors Run the input traces as far away from the supply lines as possible VS+ RF N/C N/C GND –IN V+ VIN +IN OUTPUT V– N/C RG GND GND Use low-ESR, ceramic bypass capacitor VS– Use low-ESR, ceramic bypass capacitor VOUT Copyright © 2016, Texas Instruments Incorporated Figure 41. Operational Amplifier Board Layout for Noninverting Configuration 11.3 Power Dissipation Considerations For a given θJA, the maximum power dissipation is shown in Figure 42 and is calculated by Equation 4: PD = TMAX - TA qJA where • • • • PD = Maximum power dissipation of TLV237x IC (watts) TMAX = Absolute maximum junction temperature (150°C) TA = Free-ambient air temperature (°C) θJA = θJC (Thermal coefficient from junction to case) + θCA (Thermal coefficient from case to ambient air (°C/W)) (4) Maximum Power Dissipation (W) 2 PDIP Package Low-K Test PCB qJA = 104°C/W 1.75 1.5 1.25 TJ = 150°C SOIC Package Low-K Test PCB qJA = 176°C/W MSOP Package Low-K Test PCB qJA = 260°C/W 1 0.75 0.5 0.25 0 SOT-23 Package Low-K Test PCB qJA = 324°C/W -55 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) Results are with no air flow and using JEDEC Standard Low-K test PCB. Figure 42. Maximum Power Dissipation vs Free-Air Temperature 28 Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 www.ti.com SLOS270F – MARCH 2001 – REVISED AUGUST 2016 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation For related documentation see the following: EVM Selection Guide (SLOU060) 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 4. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY TLV2370 Click here Click here Click here Click here Click here TLV2371 Click here Click here Click here Click here Click here TLV2372 Click here Click here Click here Click here Click here TLV2373 Click here Click here Click here Click here Click here TLV2374 Click here Click here Click here Click here Click here TLV2375 Click here Click here Click here Click here Click here 12.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.5 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.7 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Copyright © 2001–2016, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 29 TLV2370, TLV2371, TLV2372 TLV2373, TLV2374, TLV2375 SLOS270F – MARCH 2001 – REVISED AUGUST 2016 www.ti.com 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 30 Submit Documentation Feedback Copyright © 2001–2016, Texas Instruments Incorporated Product Folder Links: TLV2370 TLV2371 TLV2372 TLV2373 TLV2374 TLV2375 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TLV2370ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2370I Samples TLV2370IDBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 VBFI Samples TLV2370IDBVRG4 ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 VBFI Samples TLV2370IDBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 VBFI Samples TLV2370IDBVTG4 ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 VBFI Samples TLV2370IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2370I Samples TLV2370IP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 2370I Samples TLV2371ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2371I Samples TLV2371IDBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 VBGI Samples TLV2371IDBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 VBGI Samples TLV2371IDBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 VBGI Samples TLV2371IDBVTG4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 VBGI Samples TLV2371IDG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2371I Samples TLV2371IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2371I Samples TLV2371IDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2371I Samples TLV2371IP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 2371I Samples TLV2371IPE4 ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 2371I Samples TLV2372ID ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2372I Samples TLV2372IDGK ACTIVE VSSOP DGK 8 80 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 APG Samples TLV2372IDGKG4 ACTIVE VSSOP DGK 8 80 RoHS & Green Level-1-260C-UNLIM -40 to 125 APG Samples Addendum-Page 1 NIPDAU PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TLV2372IDGKR ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 APG Samples TLV2372IDGKRG4 ACTIVE VSSOP DGK 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 APG Samples TLV2372IDR ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2372I Samples TLV2372IDRG4 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2372I Samples TLV2372IP ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 2372I Samples TLV2372IPE4 ACTIVE PDIP P 8 50 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 2372I Samples TLV2373ID ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2373I Samples TLV2373IDGS ACTIVE VSSOP DGS 10 80 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 API Samples TLV2373IDGSR ACTIVE VSSOP DGS 10 2500 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 API Samples TLV2373IDGSRG4 ACTIVE VSSOP DGS 10 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 API Samples TLV2373IDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2373I Samples TLV2373IN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 TLV2373I Samples TLV2374ID ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2374I Samples TLV2374IDG4 ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2374I Samples TLV2374IDR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2374I Samples TLV2374IN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 2374I Samples TLV2374IPW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2374I Samples TLV2374IPWG4 ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2374I Samples TLV2374IPWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2374I Samples TLV2374IPWRG4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2374I Samples TLV2375ID ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2375I Samples Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TLV2375IDR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2375I Samples TLV2375IN ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 125 2375I Samples TLV2375IPW ACTIVE TSSOP PW 16 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2375I Samples TLV2375IPWR ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2375I Samples TLV2375IPWRG4 ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 2375I Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
TLV2373IDG4
物料型号: - TLV2370, TLV2371, TLV2372, TLV2373, TLV2374, TLV2375

器件简介: - 这些是德州仪器(Texas Instruments)生产的单电源运算放大器,具有轨到轨输入和输出能力,3MHz的宽带宽,以及低功耗特性。

引脚分配: - 根据不同型号,引脚分配有所不同。例如,TLV2370有6个引脚,TLV2373有14个引脚,而TLV2375有16个引脚。每个型号的详细引脚功能在文档中有具体描述。

参数特性: - 包括轨到轨输入和输出、3MHz宽带宽、2.4V/μs的高斜率率、2.7V至16V的供电电压范围、每通道550μA的供电电流、低功耗关闭模式(每通道25μA)、输入噪声电压39nV/√Hz、输入偏置电流1pA等。

功能详解: - 这些运算放大器适用于多种应用,包括白色家电、手持测试设备、便携式血糖测试系统、遥感、有源滤波器、工业自动化和电池供电电子设备等。

应用信息: - 文档提供了应用信息,包括应用领域和典型应用电路。

封装信息: - 提供了多种封装选项,如SOT-23、MSOP、PDIP、TSSOP等,具体取决于型号。
TLV2373IDG4 价格&库存

很抱歉,暂时无法提供与“TLV2373IDG4”相匹配的价格&库存,您可以联系我们找货

免费人工找货