TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS AND
PUSH-PULL COMPARATORS
FEATURES
D Micro-Power Operation . . . 1.4 µA
D Input Common-Mode Range Exceeds the
D
D
D
D
D
D
D
D
Rails . . . –0.1 V to VCC + 5 V
Supply Voltage Range . . . 2.5 V to 16 V
Rail-to-Rail Input/Output (Amplifier)
Reverse Battery Protection Up to 18 V
Gain Bandwidth Product . . . 5.5 kHz
(Amplifier)
Push-Pull CMOS Output Stage (Comparator)
Specified Temperature Range
– TA = –40°C to 125°C . . . Industrial Grade
Ultrasmall Packaging
– 8-Pin MSOP (TLV2702)
Universal Op-Amp EVM (See the SLOU060 For
More Information)
The TLV270x’s low supply current is coupled with
extremely low input bias currents enabling them to be
used with mega-ohm resistors making them ideal for
portable, long active life, applications. DC accuracy is
ensured with a low typical offset voltage as low as
390µV, CMRR of 90 dB, and minimum open loop gain
of 130 V/mV at 2.7 V.
The maximum recommended supply voltage is as high
as 16 V and ensured operation down to 2.5 V, with
electrical characteristics specified at 2.7 V, 5 V, and
15 V. The 2.5-V operation makes it compatible with
Li-Ion battery-powered systems and many micro-power
microcontrollers available today including TI’s MSP430.
All members are available in PDIP and SOIC with the
duals, one op-amp and one comparator, in the small
MSOP package and quads, two operational amplifiers
and two comparators, in the TSSOP package.
APPLICATIONS
D Portable Battery Monitoring
D Consumer Medical Electronics
D Security Detection Systems
–
+
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
DESCRIPTION
2.5
2.25
I CC – Supply Current – µ A
The TLV270x combines sub-micropower operational
amplifier and comparator into a single package that
produces excellent micropower signal conditioning with
only 1.4 µA of supply current. This combination gives
the designer more board space and reduces part counts
in systems that require an operational amplifier and
comparator. The low supply current makes it an ideal
choice for battery powered portable applications where
quiescent current is the primary concern. Reverse
battery protection guards the amplifier from an
over-current condition due to improper battery
installation. For harsh environments, the inputs can be
taken 5 V above the positive supply rail without damage
to the device.
2
1.75
1.5
1.25
1
Op Amp
VI = VCC/2
Comparator
VID = –1 V
TA = 25°C
0.75
0.5
0.25
0
0
2
4
6
8
10
12
14
16
VCC – Supply Voltage – V
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
A SELECTION OF OUTPUT COMPARATORS†
DEVICE
VCC
(V)
VIO
(µV)
GBW
(kHz)
SR
(V/µs)
tPLH
(µs)
tPHL
(µs)
tf
(µs)
RAIL-TORAIL
390
ICC/Ch
(µA)
1.4‡
TLV270x
2.5 – 16
TLV230x
2.5 – 16
TLV240x
TLV224x
OUTPUT
STAGE
5.5
0.0025
56
83
8
I/O
PP
390
1.4‡
5.5
0.0025
55
30
5
I/O
OD
2.5 – 16
390
880
5.5
0.0025
—
—
—
I/O
—
2.5 – 12
600
1
5.5
0.002
—
—
—
I/O
—
TLV340x
2.5 – 16
250
0.47
—
—
55
30
5
I
OD
TLV370x
2.5 – 16
250
0.56
—
—
56
83
8
I
PP
† All specifications are typical values measured at 5 V.
‡ ICC is specified as one op-amp and one comparator.
TLV2702 AVAILABLE OPTIONS
PACKAGED DEVICES
VIOmax
AT 25°C
TA
SMALL OUTLINE†
(D)
MSOP
MSOP†
(DGK)
SYMBOLS
PLASTIC DIP
(P)
4000 µV
TLV2702ID
TLV2702IDGK
xxTIAQF
TLV2702IP
- 40°C to 125°C
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g.,
TLV2702IDR).
TLV2704 AVAILABLE OPTIONS
VIOmax
AT 25°C
TA
PACKAGED DEVICES
†
SMALL OUTLINE
TSSOP
(PW)
(D)
PLASTIC DIP
(N)
4000 µV
TLV2704ID
TLV2704IPW
TLV2704IN
– 40°C to 125°C
† This package is available taped and reeled. To order this packaging option, add an R suffix to the part
number (e.g., TLV2704IDR).
TLV270x PACKAGE PINOUTS
TLV2704
D, N, OR PW PACKAGE
(TOP VIEW)
TLV2702
D, DGK, OR P PACKAGE
(TOP VIEW)
AOUT
AIN –
AIN +
GND
2
1
8
2
7
3
6
4
5
C1OUT
C1IN –
C1IN+
VCC
C2IN+
C2IN –
C2OUT
VCC
COUT
CIN –
CIN+
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1
14
2
13
3
12
4
11
5
10
6
9
7
8
A2OUT
A2IN –
A2IN+
GND
A1IN+
A1IN –
A1OUT
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 V
Differential input voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC
Input voltage range, VI (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VCC + 5 V
Input current range, II (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA
Output current range, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA: I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to GND
2. Input voltage range is limited to 20 V max or VCC + 5 V, whichever is smaller.
DISSIPATION RATING TABLE
PACKAGE
ΘJC
(°C/W)
ΘJA
(°C/W)
TA ≤ 25
25°C
C
POWER RATING
D (8)
38.3
176
710 mW
142 mW
D (14)
26.9
122.3
1022 mW
204.4 mW
DGK (8)
54.2
259.9
481 mW
96.2 mW
N (14)
32
78
1600 mW
320.5 mW
TA = 125
125°C
C
POWER RATING
P (8)
41
104
1200 mW
240.4 mW
PW (14)
29.3
173.6
720 mW
144 mW
recommended operating conditions
Single supply
Supply voltage
voltage, VCC
Split supply
Common-mode input voltage range, VICR
Amplifier and comparator
Operating free-air temperature, TA
MIN
MAX
2.5
16
±1.25
±8
V
–0.1
VCC+5
125
V
– 40
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UNIT
°C
3
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 15 V (unless
otherwise noted)
amplifier dc performance
PARAMETER
TEST CONDITIONS
TA†
MIN
25°C
VIO
Input offset voltage
αVIO
Offset voltage draft
CMRR Common-mode
Common mode rejection ratio
VO = VCC/2 V, VIC = VCC/2 V, RS = 50 Ω
AVD
PSRR
Large signal differential voltage
Large-signal
amplification
VCC = 2.7
27V
Full range
52
25°C
60
VCC = 5 V
Full range
55
25°C
66
Power su
supply
ly rejection ratio
(∆VCC/∆VIO)
Full range
60
25°C
130
Full range
30
25°C
300
VCC = 5 V
V,
VO(pp) = 3 V
V, RL = 500 kΩ
Full range
100
25°C
400
VCC = 15 V
V,
VO(pp) = 8 V
V, RL = 500 kΩ
Full range
120
25°C
90
Full range
85
25°C
94
Full range
90
VCC = 2.7
2 7 to 5 V
VIC = VCC/2 V
V, No load
VCC = 5 to 15 V
4000
UNIT
µV
V
µV/°C
3
55
7V
5V
VCC = 2
2.7
V, VO(pp) = 1
1.5
V, RL = 500 kΩ
390
6000
25°C
VCC = 15 V
MAX
Full range
25°C
VIC = 0 to VCC, RS = 50 Ω
TYP
73
80
dB
90
400
1000
V/mV
1800
120
dB
120
† Full range is –40°C to 125°C.
amplifier and comparator input characteristics
PARAMETER
IIO
TEST CONDITIONS
Input
In
ut offset current
VO = VCC/2 V, VIC = VCC/2 V
RS = 50 Ω
IIB
ri(d)
Input
In
ut bias current
Differential input resistance
Ci(c)
Common-mode input capacitance
† Full range is –40°C to 125°C.
4
f = 100 kHz
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TA†
25°C
MIN
TYP
MAX
25
250
0 to 70°C
300
Full range
700
25°C
100
UNIT
pA
A
500
0 to 70°C
550
Full range
1700
pA
A
25°C
300
MΩ
25°C
3
pF
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 15 V (unless
otherwise noted) (continued)
amplifier output characteristics
PARAMETER
VOH
TA†
25°C
MIN
TYP
2.55
2.65
VCC = 2.7
27V
Full range
2.5
25°C
4.85
VCC = 5 V
Full range
4.8
25°C
14.8
Full range
14.8
TEST CONDITIONS
VIC = VCC/2,
IOH = –50 µA
High level output voltage
High-level
VCC = 15 V
VOL
VIC = VCC/2,
/2 IOL = 50 µA
A
Low level output voltage
Low-level
IO
Output current
ZO
Closed-loop output impedance
† Full range is –40°C to 125°C.
VO = 0.5 V from rail
f = 100 Hz,
AV = 10
25°C
MAX
UNIT
4.95
V
14.95
180
Full range
260
300
mV
25°C
±200
µA
25°C
1.2
kΩ
amplifier dynamic performance
PARAMETER
TEST CONDITIONS
UGBW
Unity gain bandwidth
RL = 500 kΩ,
SR
Slew rate at unity gain
VO(pp) = 0.8 V,
RL = 500 kΩ,
φM
Phase margin
RL = 500 kΩ,
kΩ
CL = 100 pF
Gain margin
ts
Settling time
Vn
input
Equivalent in
ut noise
voltage
In
Equivalent input noise
current
CL = 100 pF
TA
25°C
CL = 100 pF
25°C
MIN
TYP
MAX
UNIT
5.5
kHz
2.5
V/ms
60°
VCC = 2.7 or 5 V,
V(STEP)PP = 1 V, CL = 100 pF,
AV = –1,
RL = 100 kΩ
VCC = 15 V,
V(STEP)PP = 1 V,
V CL = 100 pF
pF,
AV = –1,
RL = 100 kΩ
25°C
15
0.1%
dB
1.84
25°C
ms
0.1%
6.1
0.01%
32
f = 0.1 to 10 Hz
25°C
f = 100 Hz
f = 100 Hz
25°C
5.3
µVpp
500
nV/√Hz
8
fA/√Hz
supply current
PARAMETER
ICC
Supply
S
l currentt ((one op-amp and
d one
comparator)
Reverse supply current
† Full range is –40°C to 125°C.
TEST CONDITIONS
VCC = 2.7 V or 5 V
VO = VCC/2
VCC = 15 V
VCC = –18 V, VI = 0 V, VO = open
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TA†
MIN
TYP
25°C
1.4
25°C
1.4
Full range
25°C
MAX
1.9
UNIT
µA
3.7
50
nA
5
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 15 V (unless
otherwise noted) (continued)
comparator dc performance
TA†
TEST CONDITIONS†
PARAMETER
MIN
25°C
VIO
Input offset voltage
αVIO
Offset voltage drift
CMRR
Common mode rejection ratio
Common-mode
RS = 50 Ω
VIC= VCC/2,
PSRR
27V
VCC = 2.7
Full range
50
25°C
60
VCC = 5 V
Full range
55
25°C
65
Full range
60
VCC = 2.7
2 7 to 5 V
VCC = 5 to 15 V
25°C
75
Full range
70
25°C
85
Full range
80
UNIT
µV
V
µV/°C
72
76
dB
88
1000
25°C
VIC = VCC/2 V,
No load
5000
3
55
Large-signal differential voltage
amplification
Power su
supply
ly rejection ratio
(∆VCC/∆VIO)
250
7000
25°C
VCC = 15 V
AVD
MAX
Full range
25°C
VIC= 0 to VCC,
RS = 50 Ω
TYP
V/mV
100
dB
105
† Full range is –40°C to 125°C.
comparator output characteristics
TEST CONDITIONS†
PARAMETER
ri(d)
Differential input resistance
VOH
High level output voltage
High-level
VIC = VCC/2,
VID = 1 V
IOL = –50
50 µA,
VOL
Low level output voltage
Low-level
VIC = VCC/2,
VID = –1 V
IOL = 50 µA,
TA†
MIN
TYP
MAX
300
25°C
25°C
Full range
MΩ
VCC–320
VCC–450
mV
80
25°C
UNIT
Full range
200
300
mV
† Full range is –40°C to 125°C.
switching characteristics at recommended operating conditions, VCC = 2.7 V, 5 V, 15 V (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
TA
Overdrive = 2 mV
t(PLH)
t(PHL)
Propagation
P
ti response titime, llow-tot
high-level output
Propagation
P
ti response titime, hi
high-toht
low-level output
kHz
f = 10 kHz,
VSTEP = 100 mV,
CL = 10 pF,
VCC = 2.7
27V
Overdrive = 10 mV
Rise time
CL = 10 pF,
TYP
25°C
25
C
36
Overdrive = 2 mV
167
VCC = 2.7 V
UNIT
64
Overdrive = 50 mV
Overdrive = 10 mV
MAX
240
25°C
25
C
Overdrive = 50 mV
tr
MIN
µss
67
37
25°C
7
µs
tf
Fall time
CL = 10 pF,
VCC = 2.7 V
25°C
9
µs
NOTE: The propagation response time specified is the interval between the input step function and the instant when the output crosses 1.4 V.
Propagation responses are longer at higher supply voltages, refer to Figure 18 through Figure 36 for further details.
6
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO
Input offset voltage
vs Common-mode input voltage
vs Free-air temperature
IIB
Input bias current
IIO
Input offset current
vs Common-mode input voltage
vs Free-air temperature
ICC
vs Common-mode input voltage
Supply current
1, 2
3, 5, 7
4, 6
3, 5, 7
4, 6
vs Supply voltage
8
vs Free-air temperature
9
Amplifier
CMRR
Common-mode rejection ratio
vs Frequency
VOH
VOL
High-level output voltage
vs High-level output current
11, 13
Low-level output voltage
vs Low-level output current
12, 14
VO(PP)
PSRR
Output voltage, peak-to-peak
vs Frequency
15
Power supply rejection ratio
vs Frequency
16
Voltage noise over a 10 Second Period
φm
AVD
SR
10
17
Phase margin
vs Capacitive load
18
Differential voltage gain
vs Frequency
19
Phase
vs Frequency
19
Gain-bandwidth product
vs Supply voltage
20
Slew rate
vs Free-air temperature
21
Large-signal follower pulse response
22
Small-signal follower pulse response
23
Large-signal inverting pulse response
24
Small-signal inverting pulse response
25
Comparator
VOH
VOL
High-level output voltage
vs High-level output current
26, 28
Low-level output voltage
vs Low-level output current
27, 29
Output rise/fall time
vs Supply voltage
30
Low-to-high level output response for various input overdrives
31, 33, 35
High-to-low level output response for various input overdrives
32, 34, 36
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7
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
AMPLIFIER AND COMPARATOR TYPICAL CHARACTERISTICS
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
1000
800
600
400
200
0
–200
–0.2 0.2
–0.1
0.6
1.0
1.4
1.8
2.2
0
–100
–200
–300
VCC = 5 V
TA = 25 °C
–400
–0.2 0.4 1.0 1.6 2.2 2.8 3.4 4.0 4.6 5.2
2.6 2.9
Figure 1
200
150
100
IIO
0
–50
IIB
–100
–150
–0.2
–0.1 0.2
0.6
1.0
1.4
1.8
2.2
2.6 2.9
400
300
200
100
IIO
0
IIB
–100
–200
–40 –25 –10 5
20 35 50 65 80 95 110 125
0
I CC – Supply Current – µ A
IIO
Figure 7
100
50
IIO
0
–50
IIB
–100
–150
–0.2 0.4 1.0 1.6 2.2 2.8 3.4 4.0 4.6 5.2
Figure 6
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
TA = 125°C
2
TA = 70°C
1.75
1.5
1.25
TA = 0°C
1
TA = –40°C
0.75
Op Amp
VI = VCC/2
Comparator
VID = –1 V
TA = 25°C
0.5
0.25
–200
–40 –25 –10 5 20 35 50 65 80 95 110 125
TA – Free-Air Temperature – °C
VCC = 5 V
TA = 25 °C
2
2.25
200
20 35 50 65 80 95 110 125
VICR – Common Mode Input Voltage – V
2.5
VCC = 15 V
400
150
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
1200
IIB
–200
–40 –25 –10 5
Figure 5
INPUT BIAS/OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
600
IIB
–100
TA – Free-Air Temperature – °C
Figure 4
800
IIO
0
200
VCC = 5 V
VIC = 2.5 V
500
VICR – Common Mode Input Voltage – V
1000
100
INPUT BIAS/OFFSET CURRENT
vs
COMMON-MODE INPUT
VOLTAGE
I CC – Supply Current – µ A
50
200
Figure 3
I IB / I IO – Input Bias / Offset Current – pA
I IB / I IO – Input Bias / Offset Current – pA
I IB / I IO – Input Bias / Offset Current – pA
250
300
TA – Free-Air Temperature – °C
600
300
400
INPUT BIAS/OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
400
VCC = 2.7 V
TA = 25 °C
VCC = 2.7 V
VIC = 1.35 V
Figure 2
INPUT BIAS/OFFSET CURRENT
vs
COMMON MODE INPUT
VOLTAGE
350
500
VICR – Common-Mode Input Voltage – V
VICR – Common-Mode Input Voltage – V
I IB / I IO – Input Bias/Offset Current – pA
I IB / I IO – Input Bias / Offset Current – pA
VCC = 2.7 V
TA = 25°C
1200
V IO – Input Offset Voltage – µV
V IO – Input Offset Voltage – µV
600
100
1400
8
INPUT BIAS / OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
0
0
2
4
6
8
10
12
VCC – Supply Voltage – V
Figure 8
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14
1.75
1.5
1.25
1
0.75
0.5
0.25
16
VCC = 2.7, 5, & 15 V
Op Amp
VI = VCC/2
AV = 1
Comparator
VID = –1 V
0
–40 –25 –10 5
20 35 50 65 80 95 110 125
TA – Free-Air Temperature – °C
Figure 9
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
AMPLIFIER TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
1.50
100
RF=100 kΩ
RI=1 kΩ
80
60
40
20
VCC = 2.7 V
2.4
TA = –40°C
2.1
TA = –0°C
TA = 25 °C
TA = 70 °C
TA = 125 °C
1.8
1.5
1.2
0
10
100
1k
f – Frequency – Hz
50
100
150
3.5
3.0
1.25
TA = 0 °C
TA = –40°C
0.75
TA = 25 °C
TA = 70 °C
TA = 125 °C
0.50
150
0.25
200
0
IOH – High-Level Output Current – µA
50
100
150
80
70
60
50
Figure 16
8
6
4
10k
RL = 100 kΩ
CL = 100 pF
TA = 25°C
VCC = 5 V
2
VCC = 2.7 V
0
–2
100
f – Frequency – Hz
1k
Figure 15
PHASE MARGIN
vs
CAPACITIVE LOAD
80
VCC = 5 V
f = 0.1 Hz to 10 Hz
TA = 25°C
3
70
60
2
1
0
–1
50
40
30
20
–2
10
–3
40
100
1k
f – Frequency – Hz
10
10
Phase Margin – °
Input Referred Voltage Noise – µV
90
VCC = 15 V
12
VOLTAGE NOISE
OVER A 10 SECOND PERIOD
4
100
10
14
200
120
VCC = 2.7, 5, & 15 V
TA = 25°C
200
16
Figure 14
POWER SUPPLY REJECTION RATIO
vs
FREQUENCY
150
OUTPUT VOLTAGE
PEAK-TO-PEAK
vs
FREQUENCY
IOL – Low-Level Output Current – µA
Figure 13
100
Figure 12
VCC = 5 V
1.00
50
IOL – Low-Level Output Current – µA
0.00
110
0.25
0
V O(PP) – Output voltage Peak–to–Peak – V
TA = –0°C
TA = 25 °C
TA = 70 °C
TA = 125 °C
100
TA = 70 °C
TA = 125 °C
0.50
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
VOL – Low-Level Output Voltage – V
TA = –40°C
4.5
50
0.75
200
1.50
0
1.00
Figure 11
5.0
4.0
TA =25 °C
TA = 0 °C
TA = –40°C
1.25
IOH – High-Level Output Current – µA
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
VCC = 5 V
VCC = 2.7 V
0.00
0
10k
Figure 10
V OH – High-Level Output Voltage – V
VOL – Low-Level Output Voltage – V
VCC=2.7, 5, 15 V
1
PSRR – Power Supply Rejection Ratio – dB
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
2.7
120
V OH – High-Level Output Voltage – V
CMRR – Common-Mode Rejection Ratio – dB
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
VCC = 2.7, 5, & 15 V
RL= 500 kΩ
TA = 25°C
0
–4
0
1
2
3
4 5
6
t – Time – s
Figure 17
www.ti.com
7
8
9
10
10
100
1k
CL – Capacitive Load – pF
10k
Figure 18
9
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
AMPLIFIER TYPICAL CHARACTERISTICS
DIFFERENTIAL VOLTAGE GAIN AND PHASE
vs
FREQUENCY
30
45
20
10
0
VCC=2.7, 5, 15 V
RL=500 kΩ
CL=100 pF
TA=25°C
–45
10k
–20
10
100
1k
f – Frequency – Hz
5
3.0
4
3
2
1.5
SR–
1.0
0
2.5 4.0 5.5 7.0 8.5 10.0 11.5 13.0 14.5 16.0
0.0
–40 –25 –10 5
VCC – Supply Voltage –V
Figure 21
180
3
160
V – Output Voltage – mV
O
5
4
2
– Input Voltage – V
VIN
1
4
0
3
–1
IN
VO
V
1
0
300
VIN
150
140
0
VCC = 2.7, 5,
& 15 V
AV = 1
RL = 100 kΩ
CL = 100 pF
TA = 25°C
120
100
80
60
VO
–150
40
20
0
–1
–1
0
1
2
3
4
5
–20
–50 0
6
50 100 150 200 250 300 350 400 450 500
t – Time – µs
t – Time – ms
Figure 22
Figure 23
LARGE-SIGNAL INVERTING
PULSE RESPONSE
SMALL-SIGNAL INVERTING
PULSE RESPONSE
4
2.0
3
VIN
0.0
–0.5
–1.0
IN
–1.5
–1
V – Output Voltage – mV
O
0
VCC = 5 V
AV = –1
RL = 100 kΩ
CL = 100 pF
TA = 25°C
– Input Voltage – V
1
V
–2.0
–2.5
200
VIN
150
2
1.0
0.5
200
VO
100
VCC = 2.7,
5, & 15 V
AV = –1
RL = 100 kΩ
CL = 100 pF
TA = 25°C
100
50
0
0
–100
–50
IN
2.5
1.5
V – Output Voltage – V
O
20 35 50 65 80 95 110 125
SMALL-SIGNAL FOLLOWER
PULSE RESPONSE
VCC = 5 V
AV = 1
RL = 100 kΩ
CL = 100 pF
TA = 25°C
7
VCC = 2.7, 5, 15 V
TA – Free-Air Temperature – °C
Figure 20
8
V – Output Voltage – V
O
VCC = 2.7 V
2.0
0.5
LARGE-SIGNAL FOLLOWER
PULSE RESPONSE
2
2.5
1
Figure 19
6
SR+
VCC = 5, 15 V
VO
–100
–3.0
–3.5
–1
0
1
2
3
4
5
6
–150
–200
7
Figure 24
10
0
200
400
600
t – Time – ms
t – Time – ms
Figure 25
www.ti.com
– Input Voltage – mV
–10
6
V
0
3.5
TA = 25°C
RL = 100 kΩ
CL = 100 pF
f = 1kHz
SR – Slew Rate – V/ ms
GBWP –Gain Bandwidth Product – kHz
7
90
40
SLEW RATE
vs
FREE-AIR TEMPERATURE
V IN – Input Voltage – mV
135
50
Phase – °
AVD – Differential Voltage Gain – dB
60
GAIN BANDWIDTH PRODUCT
vs
SUPPLY VOLTAGE
800 1000 1200
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
COMPARATOR TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
2.1
TA = –40°C
TA = 0°C
1.8
1.5
2.7
VCC = 2.7 V
VID = –1 V
2.4
VOL – Low-Level Output Voltage – V
VOH – High-Level Output Voltage – V
2.7
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
TA = 25°C
1.2
0.9
0.6
TA = 70°C
0.3
TA = 125°C
0.0
VCC = 2.7 V
VID = –1 V
2.4
TA = 125°C
2.1
TA = 70°C
1.8
TA = 25°C
1.5
1.2
TA = 0°C
0.9
0.6
TA = –40°C
0.3
0.0
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45
0
IOH – High-Level Output Current – mA
Figure 26
VOL – Low-Level Output Voltage – V
TA = 0°C
TA = 25°C
2.5
2
TA = 70°C
1.5
1
TA = 125°C
0.5
0
0
0.2 0.4 0.6 0.8
0.5
0.6
0.7
0.8
VCC = 5 V
VID = –1 V
4.5
4
TA = 125°C
3.5
TA = 70°C
3
2.5
2
TA = 25°C
1.5
TA = 0°C
1
TA = –40°C
0.5
0
1.0 1.2 1.4 1.6 1.8
0
IOH – High-Level Output Current – mA
0.4
0.8
1.2
1.6
2.0
2.4
2.8
IOL – Low-Level Output Current – mA
Figure 28
Figure 29
OUTPUT RISE/FALL TIME
vs
SUPPLY VOLTAGE
120
t r(f) – Output Rise/Fall Time – µ s
VOH – High-Level Output Voltage – V
TA = –40°C
3
0.4
5
VCC = 5 V
VID = –1 V
4
0.3
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
5
3.5
0.2
Figure 27
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
4.5
0.1
IOL – Low-Level Output Current – mA
VID= 1 V to –1 V
Input Rise/Fall Time = 4 µs
CL = 10 pF
TA = 25°C
100
80
60
Fall Time
40
20
Rise Time
0
0
2.5
5
7.5
10 12.5
VCC – Supply Voltage – V
15
Figure 30
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11
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
TYPICAL CHARACTERISTICS
2 mV
10 mV
0
VCC = 2.7 V
CL = 10 pF
TA = 25°C
–0.10
–0.15
25 50 75 100125150175200225250275300
VCC = 2.7 V
CL = 10 pF
TA = 25°C
0.05
0
–0.05
0 25 50 75 100125150175200225250275 300
Figure 31
Figure 32
LOW-TO-HIGH LEVEL OUTPUT RESPONSE
FOR VARIOUS INPUT OVERDRIVES
HIGH-TO-LOW LEVEL OUTPUT RESPONSE
FOR VARIOUS INPUT OVERDRIVES
6
5
4
50 mV
3
2 mV
10 mV
2
1
–0.05
–0.10
–0.15
0 25 50 75 100125150175200225250275300
5
4
50 mV
3
2 mV
10 mV
2
1
0
Input Voltage – V
0
VCC = 5 V
CL = 10 pF
TA = 25°C
VID – Differential
0
6
VCC = 5 V
CL = 10 pF
TA = 25°C
0.10
0.05
0
–0.05
0 25 50 75 100125150175 200225250275 300
t – Time – µs
VID – Differential
Input Voltage – V
V O – Output Voltage – V
t – Time – µs
V O – Output Voltage – V
t – Time – µs
0.05
t – Time – µs
LOW-TO-HIGH LEVEL OUTPUT RESPONSE
FOR VARIOUS INPUT OVERDRIVES
HIGH-TO-LOW LEVEL OUTPUT RESPONSE
FOR VARIOUS INPUT OVERDRIVES
16
14
12
10
8
6
V O – Output Voltage – V
Figure 34
50 mV
2 mV
10 mV
0.04
0
–0.04
–0.08
–0.12
0 25 50 75 100125150175200225 250275300
16
14
12
10
8
6
4
2
0
50 mV
10 mV
2 mV
Input Voltage – V
4
2
0
V ID – Differential
V O – Output Voltage – V
Figure 33
VCC = 15 V
CL = 10 pF
TA = 25°C
0.12
0.08
0.04
0
–0.04
100 150 200 250 300 350 400
VCC = 15 V
CL = 10 pF
TA = 25°C
0
t – Time – µs
50
t – Time – µs
Figure 35
12
0.10
Figure 36
www.ti.com
Input Voltage – V
0
–0.05
2 mV
10 mV
0.15
VID – Differential
Input Voltage – V
0.05
50 mV
VID – Differential
Input Voltage – V
50 mV
3
2.7
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0
–0.3
V ID – Differential
3
2.7
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0
HIGH-TO-LOW LEVEL OUTPUT RESPONSE
FOR VARIOUS INPUT OVERDRIVES
V O – Output Voltage – V
VO – Output Voltage – V
LOW-TO-HIGH OUTPUT RESPONSE
FOR VARIOUS INPUT OVERDRIVES
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
APPLICATION INFORMATION
reverse battery protection
The TLV2702/4 are protected against reverse battery voltage up to 18 V. When subjected to reverse battery
condition the supply current is typically less than 100 nA at 25°C (inputs grounded and outputs open). This
current is determined by the leakage of 6 Schottky diodes and will therefore increase as the ambient
temperature increases.
When subjected to reverse battery conditions and negative voltages applied to the inputs or outputs, the input
ESD structure will turn on—this current should be limited to less than 10 mA. If the inputs or outputs are referred
to ground, rather than midrail, no extra precautions need be taken.
common-mode input range
The TLV2702/4 has rail-rail input and outputs. For common-mode inputs from –0.1 V to VCC – 0.8 V a PNP
differential pair will provide the gain.
For inputs between VCC – 0.8 V and VCC, two NPN emitter followers buffering a second PNP differential pair
provide the gain. This special combination of NPN/PNP differential pair enables the inputs to be taken 5 V above
the rails; because as the inputs go above VCC, the NPNs switch from functioning as transistors to functioning
as diodes. This will lead to an increase in input bias current. The second PNP differential pair continues to
function normally as the inputs exceed VCC.
The TLV2702/4 has a negative common-input range that exceeds ground by 100 mV. If the inputs are taken
much below this, reduced open loop gain will be observed with the ultimate possibility of phase inversion.
offset voltage
The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage.
RF
IIB–
RG
+
–
VI
IIB+
V
OO
+V
IO
ǒ ǒ ǓǓ
1)
R
R
F
G
VO
+
RS
"I
IB)
R
S
ǒ ǒ ǓǓ
1)
R
R
F
G
"I
IB–
R
F
Figure 37. Output Offset Voltage Model
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13
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
APPLICATION INFORMATION
general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often
required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier
(see Figure 38).
RG
RF
–
VO
+
VI
R1
C1
f
V
O +
V
I
ǒ
1)
R
R
F
G
–3dB
Ǔǒ
+
1
2pR1C1
Ǔ
1
1 ) sR1C1
Figure 38. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth.
Failure to do this can result in phase shift of the amplifier.
C1
+
_
VI
R1
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
R2
f
C2
RG
RF
RG =
Figure 39. 2-Pole Low-Pass Sallen-Key Filter
14
www.ti.com
–3dB
+
(
1
2pRC
RF
1
2–
Q
)
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
APPLICATION INFORMATION
circuit layout considerations
To achieve the levels of high performance of the TLV270x, follow proper printed-circuit board design techniques.
A general set of guidelines is given in the following.
D Ground planes—It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
D Proper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers
depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal
of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply
terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less
effective. The designer should strive for distances of less than 0.1 inches between the device power
terminals and the ceramic capacitors.
D Sockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins
will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board
is the best implementation.
D Short trace runs/compact part placements—Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of
the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at
the input of the amplifier.
D Surface-mount passive components—Using surface-mount passive components is recommended for high
performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.
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15
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
general power dissipation considerations
For a given θJA, the maximum power dissipation is shown in Figure 40 and is calculated by the following formula:
P
D
+
ǒ
T
Ǔ
–T
MAX A
q
JA
Where:
PD = Maximum power dissipation of TLV270x IC (watts)
TMAX = Absolute maximum junction temperature (150°C)
TA
= Free-ambient air temperature (°C)
θJA = θJC + θCA
θJC = Thermal coefficient from junction to case
θCA = Thermal coefficient from case to ambient air (°C/W)
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
2
Maximum Power Dissipation – W
1.75
1.5
1.25
TJ = 150°C
PDIP Package
Low-K Test PCB
θJA = 104°C/W
SOIC Package
Low-K Test PCB
θJA = 176°C/W
MSOP Package
Low-K Test PCB
θJA = 260°C/W
1
0.75
0.5
0.25
0
–55 –40 –25 –10 5 20 35 50 65 80 95 110 125
TA – Free-Air Temperature – °C
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 40. Maximum Power Dissipation vs Free-Air Temperature
16
www.ti.com
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
APPLICATION INFORMATION
amplifier macromodel information
Macromodel information provided was derived using Microsim Parts Release 8, the model generation
software used with Microsim PSpice . The Boyle macromodel (see Note 2) and subcircuit in Figure 41 are
generated using the TLV270x typical electrical and operating characteristics at TA = 25°C. Using this
information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most
cases):
D
D
D
D
D
D
D
D
D
D
D
D
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
Quiescent power dissipation
Input bias current
Open-loop voltage amplification
Unity-gain frequency
Common-mode rejection ratio
Phase margin
DC output resistance
AC output resistance
Short-circuit output current limit
NOTE 3: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
3
99
VCC+
+
egnd
ree
ro2
cee
fb
rp
rc1
rc2
–
c1
7
11
12
+
1
c2
vlim
IN+
r2
+
9
6
–
vc
2
8
+
q1
q2
IN–
–
vb
ga
–
ro1
gcm
ioff
53
dp 13
14
re1
VOUT
re2
91
10
iee
VCC–
4
dc
–
dlp
90
+
hlim
–
+
vlp
–
ve
+ 54
dln
5
92
–
vln
+
de
.subckt 270X_5V–X 1 2 3 4 5
*
c1
11 12 9.8944E–12
c2
6 7 30.000E–12
cee 10 99 8.8738E–12
dc
5 53 dy
de
54 5 dy
dlp
90 91 dx
dln
92 90 dx
dp
4 3 dx
egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5
fb
7 99 poly(5) vb vc ve vlp vln 0 61.404E6 –1E3 1E3 61E6 –61E6
ga
6 0 11 12 1.0216E–6
gcm 0 6 10 99 10.216E–12
iee
10 4 dc 54.540E–9
ioff
0 6 dc 5e–12
hlim 90 0 vlim 1K
q1
11 2 13 qx1
q2
12 1 14 qx2
r2
6 9 100.00E3
rc1
rc2
re1
re2
ree
ro1
ro2
rp
vb
vc
ve
vlim
vlp
vln
.model
.model
.model
.model
.ends
3
3
13
14
10
8
7
3
9
3
54
7
91
0
dx
dy
qx1
qx2
11 978.81E3
12 978.81E3
10 30.364E3
10 30.364E3
99 3.6670E9
5 10
99 10
4 1.4183E6
0 dc 0
53 dc .88315
4 dc .88315
8 dc 0
0 dc 540
92 dc 540
D(Is=800.00E–18)
D(Is=800.00E–18 Rs=1m Cjo=10p)
NPN(Is=800.00E–18 Bf=27.270E21)
NPN(Is=800.0000E–18 Bf=27.270E21)
Figure 41. Boyle Macromodels and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
www.ti.com
17
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
14
0.010 (0,25) M
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°–ā8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.069 (1,75) MAX
0.010 (0,25)
0.004 (0,10)
PINS **
0.004 (0,10)
8
14
16
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MIN
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
DIM
4040047 / D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
18
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
MECHANICAL INFORMATION
DGK (R-PDSO-G8)
PLASTIC SMALL-OUTLINE PACKAGE
0,38
0,25
0,65
8
0,25 M
5
0,15 NOM
3,05
2,95
4,98
4,78
Gage Plane
0,25
1
0°–ā6°
4
3,05
2,95
0,69
0,41
Seating Plane
1,07 MAX
0,15
0,05
0,10
4073329/B 04/98
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion.
Falls within JEDEC MO-187
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19
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
MECHANICAL INFORMATION
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PINS SHOWN
PINS **
14
16
18
20
A MAX
0.775
(19,69)
0.775
(19,69)
0.920
(23,37)
0.975
(24,77)
A MIN
0.745
(18,92)
0.745
(18,92)
0.850
(21,59)
0.940
(23,88)
DIM
A
16
9
0.260 (6,60)
0.240 (6,10)
1
8
0.070 (1,78) MAX
0.035 (0,89) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gauge Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.430 (10,92) MAX
0.010 (0,25) M
14/18 PIN ONLY
4040049/D 02/00
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20-pin package is shorter than MS-001).
20
www.ti.com
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
MECHANICAL INFORMATION
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE PACKAGE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0°–ā15°
0.010 (0,25) M
0.010 (0,25) NOM
4040082 / B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
www.ti.com
21
TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
MECHANICAL INFORMATION
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–ā8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
22
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
www.ti.com
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TLV2702ID
ACTIVE
SOIC
D
8
75
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
2702I
Samples
TLV2702IDGK
ACTIVE
VSSOP
DGK
8
80
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AQF
Samples
TLV2702IDGKG4
ACTIVE
VSSOP
DGK
8
80
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
AQF
Samples
TLV2702IP
ACTIVE
PDIP
P
8
50
RoHS & Green
NIPDAU
N / A for Pkg Type
-40 to 125
TLV2702I
Samples
TLV2704ID
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
2704I
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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