TLV2773ID

厂商：
BURR-BROWN(德州仪器)
封装：
SOIC-14
描述：
OPERATIONAL AMPLIFIER

数据手册：

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数据手册
价格&库存

TLV2773ID 数据手册

SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 D D D D D D D D D D D D D High Slew Rate . . . 10.5 V/µs Typ High-Gain Bandwidth . . . 5.1 MHz Typ Supply Voltage Range 2.5 V to 5.5 V Rail-to-Rail Output 360 µV Input Offset Voltage Low Distortion Driving 600-Ω 0.005% THD+N 1 mA Supply Current (Per Channel) 17 nV/√Hz Input Noise Voltage 2 pA Input Bias Current Characterized From TA = −55°C to 125°C Available in MSOP and SOT-23 Packages Micropower Shutdown Mode . . . IDD < 1 µA Available in Q-Temp Automotive High Reliability Automotive Applications Configuration Control / Print Support Qualification to Automotive Standards description The TLV277x CMOS operational amplifier family combines high slew rate and bandwidth, rail-to-rail output swing, high output drive, and excellent dc precision. The device provides 10.5 V/µs of slew rate and 5.1 MHz of bandwidth while only consuming 1 mA of supply current per channel. This ac performance is much higher than current competitive CMOS amplifiers. The rail-to-rail output swing and high output drive make these devices a good choice for driving the analog input or reference of analog-to-digital converters. These devices also have low distortion while driving a 600-Ω load for use in telecom systems. These amplifiers have a 360-µV input offset voltage, a 17 nV/√Hz input noise voltage, and a 2-pA input bias current for measurement, medical, and industrial applications. The TLV277x family is also specified across an extended temperature range (−40°C to 125°C), making it useful for automotive systems, and the military temperature range (−55°C to 125°C), for military systems. These devices operate from a 2.5-V to 5.5-V single supply voltage and are characterized at 2.7 V and 5 V. The single-supply operation and low power consumption make these devices a good solution for portable applications. The following table lists the packages available. FAMILY PACKAGE TABLE DEVICE NUMBER OF CHANNELS PACKAGE TYPES SHUTDOWN PDIP CDIP SOIC SOT-23 TSSOP MSOP LCCC CPAK TLV2770 1 8 — 8 — — 8 — — Yes TLV2771 1 — — 8 5 — — — — — TLV2772 2 8 8 8 — 8 8 20 10 — TLV2773 2 14 — 14 — — 10 — — Yes TLV2774 4 14 — 14 — 14 — — — — TLV2775 4 16 — 16 — 16 — — — Yes UNIVERSAL EVM BOARD Refer to the EVM Selection Guide (Lit# SLOU060) A SELECTION OF SINGLE-SUPPLY OPERATIONAL AMPLIFIER PRODUCTS† DEVICE VDD (V) BW (MHz) SLEW RATE (V/µs) IDD (per channel) (µA) TLV277X 2.5 − 6.0 5.1 10.5 1000 O TLV247X 2.7 − 6.0 2.8 1.5 600 I/O TLV245X 2.7 − 6.0 0.22 0.11 23 I/O TLV246X 2.7 − 6.0 6.4 1.6 550 I/O RAIL-TO-RAIL † All specifications measured at 5 V. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  1998−2004, Texas Instruments Incorporated !"#$% $%&$ $'("&%$ $ )(!% $ "(# %&$ $# )&# ' #*#+)"#$% # %&%! ' #& #*# $&%# $ %# )&,#-. )#'/$, % #+#%(&+ &(&%#(% $ )(!% ")+&$% % 01202 &++ )&(&"#%#( &(# %#%# !$+# %#(3# $%# $ &++ %#( )(!% )(!%$ )(#$, # $% $##&(+/ $+!# %#%$, ' &++ )&(&"#%#( WWW.TI.COM 1 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TLV2770 and TLV2771 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25°C (mV) 0°C to 70°C 2.5 2.5 −40°C to 125°C SMALL OUTLINE (D) SOT-23 (DBV) MSOP (DGK) PLASTIC DIP (P) TLV2770CD TLV2771CD — TLV2771CDBV TLV2770CP — TLV2770ID TLV2771ID — TLV2771IDBV TLV2770CDGK† — TLV2770IDGK† — — — — — TLV2770AIP — TLV2770AID TLV2771AID 1.6 TLV2770IP — † This device is in the Product Preview stage of development. Please contact your local TI sales office for availability. TLV2772 and TLV2773 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25°C (mV) 0°C to 70°C SMALL OUTLINE (D) MSOP (DGK) MSOP (DGS) PLASTIC DIP (N) PLASTIC DIP (P) 2.5 TLV2772CD TLV2773CD TLV2772CDGK — — TLV2773CDGS — TLV2773CN TLV2772CP — 2.5 TLV2772ID TLV2773ID TLV2772IDGK — — TLV2773IDGS — TLV2773IN TLV2772IP — 1.6 TLV2772AID TLV2773AID — — — — — TLV2773AIN TLV2772AIP — −40°C to 125°C TLV2774 and TLV2775 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25°C (mV) 0°C to 70°C SMALL OUTLINE (D) PLASTIC DIP (N) PLASTIC DIP (P) TSSOP (PW) 2.7 TLV2774CD TLV2775CD — TLV2775CN TLV2774CP — TLV2774CPW TLV2775CPW 2.7 TLV2774ID TLV2775ID — TLV2775IN TLV2774IP — TLV2774IPW TLV2775IPW 2.1 TLV2774AID TLV2775AID — TLV2775AIN TLV2774AIP — TLV2774AIPW TLV2775AIPW −40°C to 125°C TLV2772M/Q AND TLV2772AM/Q AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25°C (mV) SMALL OUTLINE (D) 2.5 −40°C to 125°C −55°C to 125°C CHIP CARRIER (FK) CERAMIC DIP (JG) CERAMIC FLATPACK (U) — — — 1.6 TLV2772QD‡ TLV2772AQD‡ — — — TLV2772QPW‡ TLV2772AQPW‡ 2.5 TLV2772MD TLV2772MFK TLV2772MJG TLV2772MU — 1.6 TLV2772AMD TLV2772AMFK TLV2772AMJG TLV2772AMU — ‡ Available in tape and reel 2 WWW.TI.COM TSSOP (PW) SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 PACKAGE SYMBOLS PACKAGE TYPE PINS SOT23 5 Pin 8 Pin MSOP 10 Pin PART NUMBER SYMBOL† TLV2771CDBV VAMC TLV2771IDBV VAMI TLV2770CDGK xxTIABO TLV2770IDGK xxTIABP TLV2772CDGK xxTIAAF TLV2772IDGK xxTIAAG TLV2773CDGS xxTIABQ TLV2773IDGS xxTIABR † xx represents the device date code. TLV277x PACKAGE PINOUT NC 1OUT NC VDD+ NC TLV2772M AND TLV2772AM FK PACKAGE (TOP VIEW) 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC 2OUT NC 2IN − NC NC GND NC 2IN+ NC NC 1IN − NC 1IN + NC NC − No internal connection WWW.TI.COM 3 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TLV277x PACKAGE PINOUTS(1) TLV2771 DBV PACKAGE (TOP VIEW) TLV2770 D, DGK† OR P PACKAGE (TOP VIEW) NC IN − IN + GND 1 8 2 7 3 6 4 5 SHDN VDD OUT NC TLV2772 D, DGK, JG, P, OR PW PACKAGE (TOP VIEW) 1OUT 1IN − 1IN + GND 1OUT 1IN − 1IN+ GND NC 1SHDN NC 1 8 2 7 3 6 4 5 VDD 2OUT 2IN − 2IN+ 1 OUT GND 2 IN+ 3 TLV2771 D PACKAGE (TOP VIEW) VDD 5 4 NC IN − IN + GND IN − 1 10 2 9 3 8 4 7 5 6 8 2 7 3 6 4 5 1OUT 1IN − 1IN+ GND 1SHDN NC VDD + 2OUT 2IN − 2IN + 1 2 3 4 5 VDD 2OUT 2IN − 2IN+ 2SHDN 10 9 8 7 6 TLV2773 D OR N PACKAGE TLV2774 D, N, OR PW PACKAGE TLV2775 D, N, OR PW PACKAGE (TOP VIEW) (TOP VIEW) (TOP VIEW) 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VDD 2OUT 2IN − 2IN+ NC 2SHDN NC 1OUT 1IN − 1IN+ VDD 2IN+ 2IN − 2OUT 1 14 2 13 3 12 4 11 5 10 6 9 7 8 1OUT 1IN − 1IN+ VDD 2IN+ 2IN − 2OUT 1/2SHDN 4OUT 4IN − 4IN+ GND 3IN+ 3IN − 3OUT 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 † This device is in the Product Preview stage of development. Please contact your local TI sales office for availability. (1) SOT−23 may or may not be indicated TYPICAL PIN 1 INDICATORS Pin 1 Printed or Molded Dot 4 NC VDD OUT NC TLV2773 DGS PACKAGE (TOP VIEW) TLV2772M AND TLV2772AM U PACKAGE (TOP VIEW) NC 1OUT 1IN − 1IN + GND 1 Pin 1 Stripe Pin 1 Bevel Edges WWW.TI.COM Pin 1 Molded ”U” Shape 4OUT 4IN − 4IN+ GND 3IN + 3IN− 3OUT 3/4SHDN SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VDD Input voltage range, VI (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VDD Input current, II (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±4 mA Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Total current into VDD + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Total current out of GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Duration of short-circuit current (at or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to GND . 2. Differential voltages are at the noninverting input with respect to the inverting input. Excessive current flows when input is brought below GND − 0.3 V. 3. The output may be shorted to either supply. Temperature and /or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C 25 C POWER RATING DERATING FACTOR ABOVE TA = 25°C 70°C TA = 70 C POWER RATING 85°C TA = 85 C POWER RATING 125°C TA = 125 C POWER RATING D 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW DBV 437 mW 3.5 mW/°C 280 mW 227 mW 87 mW DGK 424 mW 3.4 mW/°C 271 mW 220 mW 85 mW DGS 424 mW 3.4 mW/°C 271 mW 220 mW 85 mW FK 1375 mW 11.0 mW/°C 672 mW 546 mW 210 mW JG 1050 mW 8.4 mW/°C 880 mW 714 mW 275 mW N 1150 mW 9.2 mW/°C 736 mW 598 mW 230 mW P 1000 mW 8.0 mW/°C 640 mW 520 mW 200 mW PW 700 mW 5.6 mW/°C 448 mW 364 mW 140 mW U 675 mW 5.4 mW/°C 432 mW 350 mW 135 mW recommended operating conditions C SUFFIX MIN Supply voltage, VDD 2.5 Input voltage range, VI GND Common-mode input voltage, VIC GND Operating free-air temperature, TA 0 MAX 6 VDD + − 1.3 VDD + − 1.3 70 I SUFFIX MIN 2.5 GND GND Q SUFFIX MAX 6 VDD + − 1.3 VDD + − 1.3 −40 WWW.TI.COM 125 MIN 2.5 GND GND −40 MAX 6 VDD + − 1.3 VDD + − 1.3 125 M SUFFIX MIN 2.5 GND GND −55 MAX 6 UNIT V VDD + − 1.3 VDD + − 1.3 V 125 °C V 5 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 2.7 V (unless otherwise noted) PARAMETER TEST CONDITIONS TLV2770/1/2 VIO Input offset voltage TLV2773/4/5 αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VIC = 0, RS = 50 Ω, No load VO = 0, VDD = ±1.35 V, VIC = 0, RS = 50 Ω VO = 0, VDD = ±1.35 1.35 V IOH = − 0.675 mA VOH High-level output voltage IOH = − 2.2 mA VIC = 1.35 V, VOL IOL = 0.675 mA Low-level output voltage VIC = 1.35 V, VIC = 1.35 V, VO = 0.6 V to 2.1 V IOL = 2.2 mA AVD Large-signal differential voltage amplification ri(d) Differential input resistance ci(c) Common-mode input capacitance f = 10 kHz zo Closed-loop output impedance f = 100 kHz, AV = 10 CMRR Common-mode rejection ratio VIC = 0 to 1.5 V, RS = 50 Ω VO = VDD/2, kSVR Supply voltage rejection ratio (∆VDD /∆VIO) VDD = 2.7 V to 5 V, No load VIC = VDD /2, IDD Supply current (per channel) VO = VDD/2, No load IDD(SHDN) Supply current in shutdown (per channel) V(ON) Turnon voltage level RL = 10 kΩ, TA† V(OFF) Turnoff voltage level TYP MAX 25°C 0.48 2.5 0.53 2.7 25°C 0.8 2.7 Full range 0.86 2.9 25°C 25 C to 125°C 2 25°C 1 60 2 100 25°C 2 60 Full range 6 100 25°C 2.6 2.5 25°C 2.4 Full range 2.1 25°C 0.1 Full range 0.2 25°C 0.21 Full range pA pA V V 0.6 25°C 20 Full range 13 380 V/mV 25°C 1012 Ω 25°C 8 pF 25°C 25 Ω 25°C 60 84 Full range 60 82 25°C 70 89 Full range 70 84 25°C 1 Full range dB dB 2 2 25°C 0.8 1.5 Full range 1.3 2 AV = 5 25°C 25 C 1.43 TLV2775 1.40 TLV2770 1.27 TLV2773 mV V/°C µV/°C Full range Full range UNIT mA µA 1.47 AV = 5 25°C 25 C TLV2775 1.21 1.20 † Full range is 0°C to 70°C. 6 MIN Full range TLV2770 TLV2773 TLV277xC WWW.TI.COM V V SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 operating characteristics at specified free-air temperature, VDD = 2.7 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current TEST CONDITIONS VO(PP) = 0.8 V, RL = 10 kΩ CL = 100 pF, MIN TYP 25°C 5 9 Full range 4.7 6 f = 1 kHz 25°C 21 f = 10 kHz 25°C 17 f = 0.1 Hz to 1 Hz THD + N Total harmonic distortion plus noise 0.33 25°C f = 0.1 Hz to 10 Hz f = 100 Hz RL = 600 Ω, f = 1 kHz 25°C AV = 1 AV = 10 φm 0.86 0.6 25°C 25 C V/µs nV/√Hz µV V fA /√Hz 0.12% f = 10 kHz, CL = 100 pF RL = 600 Ω, 25°C 4.8 0.1% 25°C 0.186 Settling time AV = − 1, Step = 1 V, RL = 600 Ω, CL = 100 pF 0.01% 25°C 0.3 RL = 600 Ω, 25°C 46° CL = 100 pF 25°C 12 Gain margin UNIT 0.025% Gain-bandwidth product Phase margin at unity gain MAX 0.0085% AV = 100 ts TLV277xC TA† MHz µss dB † Full range is 0°C to 70°C. WWW.TI.COM 7 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TLV2770/1/2 VIO Input offset voltage TLV2773/4/5 αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VIC = 0, RS = 50 Ω Ω, No load VIC = 0, RS = 50 Ω VO = 0, VDD = ±2.5 V, VO = 0, VDD = ±2.5 2.5 V IOH = − 1.3 mA VOH High-level output voltage IOH = − 4.2 mA VIC = 2.5 V, VOL IOL = 1.3 mA Low-level output voltage VIC = 2.5 V, IOL = 4.2 mA VIC = 2.5 V, VO = 1 V to 4 V RL = 10 kΩ, AVD Large-signal differential voltage amplification ri(d) Differential input resistance ci(c) Common-mode input capacitance f = 10 kHz zo Closed-loop output impedance f = 100 kHz, AV = 10 CMRR Common-mode rejection ratio VIC = 0 to 3.7 V, RS = 50 Ω VO = VDD /2, kSVR Supply voltage rejection ratio (∆VDD /∆VIO) VDD = 2.7 V to 5 V, No load VIC = VDD /2, IDD Supply current (per channel) VO = VDD /2, No load IDD(SHDN) Supply current in shutdown (per channel) V(ON) Turnon voltage level TA† 0.5 2.5 0.6 2.7 25°C 0.7 2.5 Full range 0.78 2.7 25 C to 25°C 125°C 2 25°C 1 60 Full range 2 100 25°C 2 60 Full range 6 100 25°C 4.9 Full range 4.8 25°C 4.7 Full range 4.4 25°C 0.1 Full range 0.2 25°C 0.21 Full range 0.6 25°C 20 Full range 13 TLV2773 mV µV/°C V/°C pA pA V V 450 V/mV Ω 25°C 8 pF 25°C 20 Ω 25°C 70 96 Full range 70 93 25°C 70 89 Full range 70 84 25°C 1 Full range dB dB 2 2 25°C 0.8 1.5 Full range 1.3 2 mA A µA 2.59 AV = 5 25°C 25 C 2.47 V 2.48 2.41 AV = 5 25°C 25 C TLV2775 2.32 2.29 † Full range is 0°C to 70°C. 8 UNIT 1012 25°C TLV2770 Turnoff voltage level MAX 25°C TLV2775 V(OFF) TYP Full range TLV2770 TLV2773 TLV277xC MIN WWW.TI.COM V SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 operating characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS VO(PP) = 2 V, RL = 10 kΩ SR Slew rate at unity gain Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In Equivalent input noise current CL = 100 pF, MIN TYP 25°C 5 10.5 Full range 4.7 6 f = 1 kHz 25°C 17 f = 10 kHz 25°C 12 f = 0.1 Hz to 1 Hz THD + N 0.33 25°C f = 0.1 Hz to 10 Hz f = 100 Hz RL = 600 Ω, f = 1 kHz Total harmonic distortion plus noise 25°C AV = 1 AV = 10 φm 25°C 25 C RL = 600 Ω, 25°C 5.1 0.1% 25°C 0.335 Settling time AV = −1, Step = 2 V, RL = 600 Ω, CL = 100 pF 0.01% 25°C 0.6 RL = 600 Ω, 25°C 46° CL = 100 pF Amplifier turnon time TLV2773 TLV2775 TLV2773 TLV2775 nV/√Hz µV V fA /√Hz MHz µss 25°C 12 dB 1.2 AV = 5, RL = Open, Measured to 50% point 25°C 25 C AV = 5 RL = Open, Measured to 50% point 25°C 25 C 2.4 µs 1.9 TLV2770 Amplifier turnoff time V/µs 0.016% f = 10 kHz, CL = 100 pF Phase margin at unity gain UNIT 0.095% TLV2770 t(OFF) 0.6 Gain-bandwidth product Gain margin t(ON) 0.86 MAX 0.005% AV = 100 ts TLV277xC TA† 335 444 ns 345 † Full range is 0°C to 70°C. WWW.TI.COM 9 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 2.7 V (unless otherwise noted) PARAMETER TLV2770/1/2 VIO Input offset voltage TLV2773/4/5 αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VIC = 0, VO = 0, RS = 50 Ω VDD = ±1.35 1.35 V, No load VIC = 0, VO = 0, RS = 50 Ω IOH = − 0.675 mA VOH Low-level output voltage VIC = 1.35 V, IOL = 0.675 mA VIC = 1.35 V, IOL = 2.2 mA AVD Large-signal differential voltage amplification ri(d) Differential input resistance ci(c) Common-mode input capacitance zo CMRR VIC = 1.35 V, RL = 10 kΩ, kΩ VO = 0.6 V to 2.1 V TLV277xI MIN TLV277xAI TYP MAX MIN TYP MAX 25°C 0.48 2.5 0.48 1.6 Full range 0.53 2.7 0.53 1.9 25°C 0.8 2.7 0.8 2.1 Full range 0.86 2.9 0.86 2.2 25 C to 25°C 125°C 2 25°C 1 60 1 60 Full range 2 125 2 125 25°C 2 60 2 60 Full range 6 350 6 350 25°C 2.6 2.6 2.5 2.5 25°C 2.4 2.4 Full range 2.1 2.1 25°C 0.1 0.1 Full range 0.2 0.2 25°C 0.21 0.21 Full range 0.6 0.6 25°C 20 Full range 13 380 20 mV pA pA V V 380 V/mV 13 25°C 1012 1012 Ω f = 10 kHz, 25°C 8 8 pF Closed-loop output impedance f = 100 kHz, AV = 10 25°C 25 25 Ω Common-mode rejection ratio VIC = 0 to 1.5 V, VO = VDD /2, RS = 50 Ω 25°C 60 84 60 84 Full range 60 82 60 82 dB Supply voltage rejection ratio (∆VDD /∆VIO) VDD = 2.7 V to 5 V, VIC = VDD /2, No load 25°C 70 89 70 89 kSVR Full range 70 84 70 84 IDD Supply current (per channel) VO = VDD /2, No load Full range IDD(SHDN) Supply current in shutdown (per channel) dB 25°C 1 2 1 2 2 2 25°C 0.8 1.5 0.8 1.5 Full range 1.3 2 1.3 2 † Full range is − 40°C to 125°C. 10 UNIT µV/°C V/°C 2 Full range High-level output voltage IOH = − 2.2 mA VOL TA† TEST CONDITIONS WWW.TI.COM mA µA SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 2.7 V (unless otherwise noted) (continued) TEST CONDITIONS PARAMETER TLV277xI TA† MIN TLV2770 V(ON) V(OFF) Turnon voltage level Turnoff voltage level TLV2773 TYP TLV277xAI MAX MIN TYP 1.47 1.47 1.43 1.43 TLV2775 1.40 1.4 TLV2770 1.27 1.27 1.21 1.21 1.20 1.2 AV = 5 TLV2773 25°C 25 C AV = 5 25°C 25 C TLV2775 MAX UNIT V V † Full range is − 40°C to 125°C. operating characteristics at specified free-air temperature, VDD = 2.7 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In THD + N TEST CONDITIONS VO(PP) = 0.8 V, RL = 10 kΩ CL = 100 pF, MIN TYP 25°C 5 Full range 4.7 φm TLV277xAI MAX MIN TYP 9 5 9 6 4.7 6 MAX UNIT V/µs f = 1 kHz 25°C 21 21 f = 10 kHz 25°C 17 17 f = 0.1 Hz to 1 Hz 25°C 0.33 0.33 µV f = 0.1 Hz to 10 Hz 25°C 0.86 0.86 µV Equivalent input noise current f = 100 Hz 25°C 0.6 0.6 fA /√Hz RL = 600 Ω, f = 1 kHz 0.0085% 0.0085% Total harmonic distortion plus noise 0.025% 0.025% 0.12% 0.12% Gain-bandwidth product f = 10 kHz, CL = 100 pF Settling time AV = −1, Step = 0.85 V to 1.85 V, RL = 600 Ω, CL = 100 pF AV = 1 AV = 10 25°C 25 C AV = 100 ts TLV277xI TA† Phase margin at unity gain Gain margin † Full range is − 40°C to 125°C. RL = 600 Ω, RL = 600 Ω, 25°C 4.8 4.8 0.1% 25°C 0.186 0.186 nV/√Hz MHz µss 0.01% CL = 100 pF 25°C 3.92 3.92 25°C 46° 46° 25°C 12 12 WWW.TI.COM dB 11 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) TEST CONDITIONS PARAMETER TLV2770/1/2 VIO Input offset voltage TLV2773/4/5 αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VIC = 0, No load VO = 0, RS = 50 Ω,, VDD = ±2.5 2.5 V VIC = 0, VO = 0, RS = 50 Ω,, VDD = ±2.5 2.5 V IOH = − 1.3 mA VOH Low-level output voltage VIC = 2.5 V, IOL = 1.3 mA VIC = 2.5 V, IOL = 4.2 mA AVD Large-signal differential voltage amplification ri(d) Differential input resistance ci(c) Common-mode input capacitance zo CMRR VIC = 2.5 V, RL = 10 kΩ, kΩ VO = 1 V to 4 V TLV277xAI TYP MAX MIN TYP MAX 25°C 0.5 2.5 0.5 1.6 0.6 2.7 0.6 1.9 25°C 0.7 2.5 0.7 2.1 Full range 0.78 2.7 0.78 2.2 25 C to 25°C 125°C 2 25°C 1 60 1 60 Full range 2 125 2 125 25°C 2 60 2 60 Full range 6 350 6 350 25°C 4.9 4.9 4.8 4.8 25°C 4.7 4.7 Full range 4.4 4.4 25°C 0.1 0.1 Full range 0.2 0.2 25°C 0.21 0.21 Full range 0.6 0.6 25°C 20 Full range 13 450 20 mV µV/°C V/°C 2 Full range UNIT pA pA V V 450 V/mV 13 25°C 1012 1012 Ω f = 10 kHz 25°C 8 8 pF Closed-loop output impedance f = 100 kHz, AV = 10 25°C 20 20 Ω Common-mode rejection ratio VIC = 0 to 3.7 V, VO = VDD /2, RS = 50 Ω kSVR Supply voltage rejection ratio (∆VDD /∆VIO) VDD = 2.7 V to 5 V, VIC = VDD /2, No load IDD Supply current (per channel) VO = VDD /2, No load IDD(SHDN) Supply current shutdown (per channel) 25°C 60 96 70 96 Full range 60 93 70 93 25°C 70 89 70 89 Full range 70 84 70 84 dB dB 25°C 1 Full range 2 1 2 2 2 25°C 0.8 1.5 0.8 1.5 Full range 1.3 2 1.3 2 † Full range is − 40°C to 125°C. 12 TLV277xI MIN Full range High-level output voltage IOH = − 4.2 mA VOL TA† WWW.TI.COM mA A µA SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) (continued) TEST CONDITIONS PARAMETER TLV277xI TA† MIN TLV2770 V(ON) V(OFF) Turnon voltage level Turnoff voltage level TLV2773 TYP TLV277xAI MAX MIN TYP 2.59 2.59 2.47 2.47 TLV2775 2.48 2.48 TLV2770 2.41 2.41 2.32 2.32 2.29 2.29 AV = 5 TLV2773 25°C 25 C AV = 5 25°C 25 C TLV2775 MAX UNIT V V † Full range is − 40°C to 125°C. operating characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In THD + N TEST CONDITIONS VO(PP) = 1.5 V, RL = 10 kΩ CL = 100 pF, MIN TYP 25°C 5 Full range 4.7 φm t(OFF) MAX MIN TYP 10.5 5 10.5 6 4.7 6 MAX UNIT V/µs f = 1 kHz 25°C 17 17 25°C 12 12 f = 0.1 Hz to 1 Hz 25°C 0.33 0.33 µV f = 0.1 Hz to 10 Hz 25°C 0.86 0.86 µV Equivalent input noise current f = 100 Hz 25°C 0.6 0.6 fA /√Hz RL = 600 Ω, f = 1 kHz 0.005% 0.005% Total harmonic distortion plus noise 0.016% 0.016% 0.095% 0.095% Gain-bandwidth product f = 10 kHz, CL = 100 pF Settling time AV = −1, Step = 1.5 V to 3.5 V, RL = 600 Ω, CL = 100 pF AV = 1 AV = 10 25°C 25 C Phase margin at unity gain RL = 600 Ω, RL = 600 Ω, 25°C 5.1 5.1 0.1% 25°C 0.134 0.134 Amplifier turnon time Amplifier turnoff time TLV2770 TLV2773 TLV2775 TLV2770 TLV2773 TLV2775 nV/√Hz MHz µss 0.01% CL = 100 pF Gain margin t(ON) TLV277xAI f = 10 kHz AV = 100 ts TLV277xI TA† 25°C 1.97 1.97 25°C 46° 46° 25°C AV = 5, RL = Open, Measured to 50% point AV = 5, RL = Open, Measured to 50% point 25°C 25 C 25°C 25 C 12 12 1.2 1.2 2.4 2.4 1.9 1.9 335 335 444 444 345 345 dB µs ns † Full range is − 40°C to 125°C. WWW.TI.COM 13 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 2.7 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLV2772Q TLV2772M MIN VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VICR Common-mode input voltage range VDD = ± 1.35 V, VIC = 0, RS = 50 Ω CMRR > 60 dB, TYP MAX 25°C 0.44 Full range 0.47 VO = 0, 25°C to 125°C 2 High-level output voltage Low-level output voltage VIC = 1.35 V, IOL = 2.2 mA VIC = 1.35 V, VO = 0.6 V to 2.1 V RL = 10 kΩ,‡ Large-signal differential voltage amplification ri(d) Differential input resistance ci(c) Common-mode input capacitance f = 10 kHz, zo Closed-loop output impedance f = 100 kHz, AV = 10 CMRR Common-mode rejection ratio VIC = VICR (min), RS = 50 Ω VO = 1.5 V, kSVR Supply voltage rejection ratio (∆VDD /∆VIO) VDD = 2.7 V to 5 V, No load VIC = VDD /2, IDD Supply current (per channel) VO = 1.5 V, No load 0.47 1.9 60 125 25°C 2 60 2 60 Full range 6 350 6 350 25°C 25 C 0 to 1.4 −0.3 to 1.7 0 to 1.4 −0.3 to 1.7 Full range 0 to 1.4 −0.3 to 1.7 0 to 1.4 −0.3 to 1.7 2.6 V 2.1 0.1 Full range 0.1 0.2 0.2 0.21 Full range V 0.21 0.6 13 V 2.4 2.1 Full range pA 2.45 2.4 20 pA 2.6 2.45 25°C mV µV/°C V/°C 2 2 380 0.6 20 380 V/mV 13 25°C 1012 1012 Ω 25°C 8 8 pF 25°C 25 25 Ω 25°C 60 84 60 84 Full range 60 82 60 82 25°C 70 89 70 89 Full range 70 84 70 84 dB dB 25°C Full range † Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. ‡ Referenced to 1.35 V 14 2.7 1 25°C AVD 1.6 60 25°C VOL 0.44 125 Full range IOL = 0.675 mA 2.5 2 25°C VIC = 1.35 V, MAX 1 Full range IOH = − 2.2 mA UNIT TYP 25°C 25°C VOH MIN Full range RS = 50 Ω IOH = − 0.675 mA TLV2772AQ TLV2772AM WWW.TI.COM 1 2 2 1 2 2 mA SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 operating characteristics at specified free-air temperature, VDD = 2.7 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In THD + N VO(PP) = 0.8 V, RL = 10 kΩ CL = 100 pF, MIN TYP 25°C 5 Full range 4.7 φm TLV2772AQ TLV2772AM MAX MIN TYP 9 5 9 6 4.7 6 UNIT MAX V/µs f = 1 kHz 25°C 21 21 f = 10 kHz 25°C 17 17 f = 0.1 Hz to 1 Hz 25°C 0.33 0.33 µV f = 0.1 Hz to 10 Hz 25°C 0.86 0.86 µV Equivalent input noise current f = 100 Hz 25°C 0.6 0.6 fA /√Hz RL = 600 Ω, f = 1 kHz 0.0085% 0.0085% Total harmonic distortion plus noise 0.025% 0.025% 0.12% 0.12% AV = 1 AV = 10 25°C 25 C AV = 100 ts TLV2772Q TLV2772M TA† TEST CONDITIONS Gain-bandwidth product f = 10 kHz, CL = 100 pF Settling time AV = −1, Step = 0.85 V to 1.85 V, RL = 600 Ω, CL = 100 pF Phase margin at unity gain RL = 600 Ω, RL = 600 Ω, 25°C 4.8 4.8 0.1% 25°C 0.186 0.186 0.01% 25°C 3.92 3.92 25°C 46° 46° 12 12 nV/√Hz MHz µss CL = 100 pF Gain margin 25°C † Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. WWW.TI.COM dB 15 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TA† TEST CONDITIONS TLV2772Q TLV2772M MIN VIO Input offset voltage αVIO Temperature coefficient of input offset voltage IIO Input offset current IIB Input bias current VICR Common-mode input voltage range VDD = ± 2.5 V, VIC = 0, CMRR > 60 dB, TYP MAX 25°C 0.36 Full range 0.4 VO = 0, RS = 50 Ω 25°C to 125°C 2 High-level output voltage Low-level output voltage VIC = 2.5 V, IOL = 4.2 mA VIC = 2.5 V, VO = 1 V to 4 V RL = 10 kΩ,‡ Large-signal differential voltage amplification ri(d) Differential input resistance ci(c) Common-mode input capacitance f = 10 kHz, zo Closed-loop output impedance f = 100 kHz, AV = 10 CMRR Common-mode rejection ratio VIC = VICR (min), RS = 50 Ω VO = 3.7 V, kSVR Supply voltage rejection ratio (∆VDD /∆VIO) VDD = 2.7 V to 5 V, No load VIC = VDD /2, IDD Supply current (per channel) VO = 1.5 V, No load 0.4 1.9 60 125 25°C 2 60 2 60 Full range 6 350 6 350 25°C 25 C 0 to 3.7 −0.3 to 3.8 0 to 3.7 −0.3 to 3.8 Full range 0 to 3.7 −0.3 to 3.8 0 to 3.7 −0.3 to 3.8 4.9 V 4.4 0.1 Full range 0.1 0.2 0.2 0.21 Full range V 0.21 0.6 13 V 4.7 4.4 Full range pA 4.8 4.7 20 pA 4.9 4.8 25°C mV µV/°C V/°C 2 2 450 0.6 20 450 V/mV 13 25°C 1012 1012 Ω 25°C 8 8 pF 25°C 20 20 Ω 25°C 60 96 60 96 Full range 60 93 60 93 25°C 70 89 70 89 Full range 70 84 70 84 dB dB 25°C Full range † Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. ‡ Referenced to 2.5 V 16 2.7 1 25°C AVD 1.6 60 25°C VOL 0.36 125 Full range IOL = 1.3 mA 2.5 2 25°C VIC = 2.5 V, MAX 1 Full range IOH = − 4.2 mA UNIT TYP 25°C 25°C VOH MIN Full range RS = 50 Ω IOH = − 1.3 mA TLV2772AQ TLV2772AM WWW.TI.COM 1 2 2 1 2 2 mA SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 operating characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage VN(PP) Peak-to-peak equivalent input noise voltage In THD + N VO(PP) = 1.5 V, RL = 10 kΩ CL = 100 pF, MIN TYP 25°C 5 Full range 4.7 φm TLV2772AQ TLV2772AM MAX MIN TYP 10.5 5 10.5 6 4.7 6 UNIT MAX V/µs f = 1 kHz 25°C 17 17 f = 10 kHz 25°C 12 12 f = 0.1 Hz to 1 Hz 25°C 0.33 0.33 µV f = 0.1 Hz to 10 Hz 25°C 0.86 0.86 µV Equivalent input noise current f = 100 Hz 25°C 0.6 0.6 fA /√Hz RL = 600 Ω, f = 1 kHz 0.005% 0.005% Total harmonic distortion plus noise 0.016% 0.016% 0.095% 0.095% AV = 1 AV = 10 25°C 25 C AV = 100 ts TLV2772Q TLV2772M TA† TEST CONDITIONS Gain-bandwidth product f = 10 kHz, CL = 100 pF Settling time AV = −1, Step = 1.5 V to 3.5 V, RL = 600 Ω, CL = 100 pF Phase margin at unity gain RL = 600 Ω, RL = 600 Ω, 25°C 5.1 5.1 0.1% 25°C 0.134 0.134 0.01% 25°C 1.97 1.97 25°C 46° 46° 12 12 nV/√Hz MHz µss CL = 100 pF Gain margin 25°C † Full range is −40°C to 125°C for Q level part, −55°C to 125°C for M level part. WWW.TI.COM dB 17 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage Distribution vs Common-mode input voltage Distribution IIB/IIO VOH Input bias and input offset currents vs Free-air temperature High-level output voltage vs High-level output current 8,9 VOL VO(PP) Low-level output voltage vs Low-level output current 10,11 Maximum peak-to-peak output voltage vs Frequency 12,13 IOS Short-circuit output current vs Supply voltage vs Free-air temperature VO AVD Output voltage vs Differential input voltage Large-signal differential voltage amplification and phase margin vs Frequency 17,18 AVD Differential voltage amplification vs Load resistance vs Free-air temperature 19 20,21 zo Output impedance vs Frequency 22,23 CMRR Common-mode rejection ratio vs Frequency vs Free-air temperature kSVR Supply-voltage rejection ratio vs Frequency IDD Supply current (per channel) vs Supply voltage 28 SR Slew rate vs Load capacitance vs Free-air temperature 29 30 VO VO Voltage-follower small-signal pulse response 31,32 Voltage-follower large-signal pulse response 33,34 VO VO Inverting small-signal pulse response 35,36 Inverting large-signal pulse response 37,38 Vn Equivalent input noise voltage vs Frequency Noise voltage (referred to input) Over a 10-second period Total harmonic distortion plus noise vs Frequency THD + N 7 14 15 16 24 25 26,27 39,40 41 42,43 Gain-bandwidth product vs Supply voltage 44 B1 Unity-gain bandwidth vs Load capacitance 45 φm Phase margin vs Load capacitance 46 Gain margin vs Load capacitance 47 Amplifier with shutdown pulse turnon/off characteristics 48 − 50 Supply current with shutdown pulse turnon/off characteristics 18 1,2 3,4 5,6 51 − 53 Shutdown supply current vs Free-air temperature Shutdown forward/reverse isolation vs Frequency WWW.TI.COM 54 55, 56 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2772 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLV2772 INPUT OFFSET VOLTAGE 40 40 VDD = 2.7 V RL = 10 kΩ TA = 25°C 35 Percentage of Amplifiers − % Percentage of Amplifiers − % 35 30 25 20 15 10 VDD = 5 V RL = 10 kΩ TA = 25°C 30 25 20 15 10 5 5 0 −2.5 −2 −1.5 −1 −0.5 0 0.5 1 1.5 2 0 2.5 −2.5 −2 −1.5 −1 −0.5 0 VIO − Input Offset Voltage − mV Figure 1 2 2.5 4 4.5 2 VDD = 2.7 V TA = 25°C 1.5 VIO − Input Offset Voltage − mV VIO − Input Offset Voltage − mV 1.5 INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE 2 1 0.5 0 −0.5 −1 VDD = 5 V TA = 25°C 1 0.5 0 −0.5 −1 −1.5 −1.5 −2 −1 1 Figure 2 INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE 1.5 0.5 VIO − Input Offset Voltage − mV −0.5 0 0.5 1 1.5 2 2.5 3 VIC − Common-Mode Input Voltage − V −2 −1 −0.5 0 0.5 1 1.5 2 2.5 3 3.5 VIC − Common-Mode Input Voltage − V Figure 3 Figure 4 WWW.TI.COM 19 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS DISTRIBUTION OF TLV2772 INPUT OFFSET VOLTAGE DISTRIBUTION OF TLV2772 INPUT OFFSET VOLTAGE 35 35 VDD = 2.7 V TA = 25°C to 125°C 25 20 15 10 5 0 VDD = 5 V TA = 25°C to 125°C 30 Percentage of Amplifiers − % Percentage of Amplifiers − % 30 25 20 15 10 5 −6 −3 0 3 6 9 0 12 −6 αVIO − Temperature Coefficient − µV/°C −3 0 Figure 5 9 12 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 0.20 3 VDD = 5 V VIC = 0 VO = 0 RS = 50 Ω VDD = 2.7 V VOH − High-Level Output Voltage − V I IB and I IO − Input Bias and Input Offset Currents − nA 6 Figure 6 INPUT BIAS AND OFFSET CURRENT vs FREE-AIR TEMPERATURE 0.15 IIB 0.10 0.05 IIO 2.5 2 TA = −40°C 1.5 TA = 125°C 1 TA = 25°C 0.5 TA = 85°C 0 −75 −50 −25 0 25 50 75 100 125 TA − Free-Air Temperature − °C 0 0 5 10 15 20 IOH − High-Level Output Current − mA Figure 7 20 3 αVIO − Temperature Coefficient − µV/°C Figure 8 WWW.TI.COM 25 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 5 3 VDD = 5 V TA = 25°C 4 VDD = 2.7 V VOL − Low-Level Output Voltage − V VOH − High-Level Output Voltage − V 4.5 TA = −40°C 3.5 TA = 25°C 3 2.5 TA = 125°C 2 1.5 TA = 85°C 1 0.5 0 0 5 10 15 20 25 30 35 40 45 50 2.5 TA = 125°C 1.5 TA = 25°C 1 TA = −40°C 0.5 0 55 TA = 85°C 2 0 5 IOH − High-Level Output Current − mA 10 Figure 9 TA = 85°C 2 1.5 TA = 25°C 1 TA = −40°C 0.5 0 20 30 40 50 VO(PP) − Maximum Peak-to-Peak Output Voltage − V VOL − Low-Level Output Voltage − V TA = 125°C 2.5 10 25 30 MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY 3 0 20 Figure 10 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT VDD = 5 V 15 IOL − Low-Level Output Current − mA IOL − Low-Level Output Current − mA 5 RL = 10 kΩ VDD = 5 V 1% THD 4 3 2 VDD = 2.7 V 2% THD 1 0 100 1000 10000 f − Frequency − kHz Figure 11 Figure 12 WWW.TI.COM 21 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS SHORT-CIRCUIT OUTPUT CURRENT vs SUPPLY VOLTAGE 5 60 THD = 5% RL = 600 Ω TA = 25°C 4.5 4 I OS − Short-Circuit Output Current − mA VO(PP) − Maximum Peak-to-Peak Output Voltage − V MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY 3.5 VDD = 5 V 3 2.5 VDD = 2.7 V 2 1.5 1 0.5 0 100 1000 45 15 0 −15 −30 VID = 100 mV −45 3 f − Frequency − kHz VID = −100 mV 20 VDD = 5 V VO = 2.5 V 0 −20 VID = 100 mV −25 RL = 600 Ω TA = 25°C VDD = 5 V 3 VDD = 2.7 V 2 1 0 25 50 75 100 125 TA − Free-Air Temperature − °C 0 −1000 −750 −500 −250 0 250 500 750 VID − Differential Input Voltage − µV Figure 15 22 7 4 VO − Output Voltage − V I OS − Short-Circuit Output Current − mA 5 −50 6 OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE 60 −60 −75 5 Figure 14 SHORT-CIRCUIT OUTPUT CURRENT vs FREE-AIR TEMPERATURE −40 4 VDD − Supply Voltage − V Figure 13 40 VID = −100 mV 30 −60 2 10000 VO = VDD /2 VIC = VDD /2 TA = 25°C Figure 16 WWW.TI.COM 1000 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY VDD = 2.7 V RL = 600 Ω CL = 600 pF TA = 25°C 80 AVD 300 240 60 180 40 120 Phase 20 60 0 0 −60 −20 −40 100 φ m − Phase Margin − degrees A VD − Large-Signal Differential Amplification − dB 100 1k 10k 100k 1M −90 10M f − Frequency − Hz Figure 17 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY VDD = 5 V RL = 600 Ω CL = 600 pF TA = 25°C 80 AVD 60 240 180 40 120 Phase 20 60 0 0 −20 −40 100 300 φ m − Phase Margin − degrees A VD − Large-Signal Differential Amplification − dB 100 −60 1k 10k 100k 1M −90 10M f − Frequency − Hz Figure 18 WWW.TI.COM 23 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS DIFFERENTIAL VOLTAGE AMPLIFICATION vs LOAD RESISTANCE DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE 1000 TA = 25°C A VD − Differential Voltage Amplification − V/mV A VD − Differential Voltage Amplification − V/mV 250 200 VDD = 2.7 V VDD = 5 V 150 100 50 0 0.1 1 100 10 1000 RL = 10 kΩ RL = 1 MΩ 100 RL = 600 Ω 10 1 VDD = 2.7 V VIC = 1.35 V VO = 0.6 V to 2.1 V 0.1 −75 RL − Load Resistance − kΩ −50 −25 0 100 125 OUTPUT IMPEDANCE vs FREQUENCY 1000 100 RL = 10 kΩ VDD = 2.7 V TA = 25°C RL = 1 MΩ ZO − Output Impedance − Ω A VD − Differential Voltage Amplification − V/mV 75 Figure 20 DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE RL = 600 Ω 10 1 10 AV = 100 1 AV = 10 0.10 AV = 1 VDD = 5 V VIC = 2.5 V VO = 1 V to 4 V 0.1 −75 −50 −25 0 25 50 75 100 125 TA − Free-Air Temperature − °C 0.01 100 1k 10k f − Frequency − Hz Figure 21 24 50 TA − Free-Air Temperature − °C Figure 19 100 25 Figure 22 WWW.TI.COM 100k 1M SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS OUTPUT IMPEDANCE vs FREQUENCY COMMON-MODE REJECTION RATIO vs FREQUENCY 100 90 CMRR − Common-Mode Rejection Ratio − dB Zo − Output Impedance − Ω VDD = ±2.5 V TA = 25°C 10 Av = 100 1 Av = 10 0.1 Av = 1 0.01 100 1k 10k 100k VDD = 5 V 80 70 60 50 40 10 1M 100 f − Frequency − Hz 100k 1M 10M SUPPLY-VOLTAGE REJECTION RATIO vs FREQUENCY 120 120 k SVR − Supply-Voltage Rejection Ratio − dB CMRR − Common-Mode Rejection Ratio − dB 10k Figure 24 COMMON-MODE REJECTION RATIO vs FREE-AIR TEMPERATURE 115 110 105 VDD = 2.7 V 95 90 VDD = 5 V 85 80 −40 −20 1k f − Frequency − Hz Figure 23 100 VIC = 1.35 V and 2.5 V TA = 25°C VDD = 2.7 V 0 20 40 60 80 100 120 140 TA − Free-Air Temperature − °C VDD = 2.7 V TA = 25°C kSVR+ 100 kSVR− 80 60 40 20 0 10 100 1k 10k 100k 1M 10M f − Frequency − Hz Figure 25 Figure 26 WWW.TI.COM 25 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS SUPPLY VOLTAGE REJECTION RATIO vs FREQUENCY SUPPLY CURRENT (PER CHANNEL) vs SUPPLY VOLTAGE 100 1.6 VDD = 5 V TA = 25°C kSVR+ I DD − Supply Current (Per Channel) − mA k SVR − Supply Voltage Rejection Ratio − dB 120 kSVR− 80 60 40 20 0 10 100 1k 10 k 100 k 1M TA = 125°C 1.4 1.2 TA = 25°C 1 TA = 0°C TA = − 40°C 0.8 0.6 0.4 0.2 0 2.5 10 M TA = 85°C 3 f − Frequency − Hz 3.5 4 Figure 27 5 5.5 6 6.5 7 Figure 28 SLEW RATE vs LOAD CAPACITANCE SLEW RATE vs FREE-AIR TEMPERATURE 16 14 VDD = 5 V AV = −1 TA = 25°C SR+ 14 13 SR− 12 SR − Slew Rate − µs SR − Slew Rate − V/ µs 4.5 VDD − Supply Voltage − V 10 8 6 VDD = 2.7 V RL = 10 kΩ CL = 100 pF AV = 1 12 11 10 4 9 2 0 10 100 1k 10k 100k CL − Load Capacitance − pF −50 −25 0 25 50 75 TA − Free-Air Temperature − °C Figure 29 26 8 −75 Figure 30 WWW.TI.COM 100 125 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE 100 60 VDD = 5 V RL = 600 Ω CL = 100 pF AV = 1 TA = 25°C 80 VO − Output Voltage − mV 80 VO − Output Voltage − mV 100 VDD = 2.7 V RL = 600 Ω CL = 100 pF AV = 1 TA = 25°C 40 20 0 −20 −40 60 40 20 0 −20 −40 −60 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 −60 5 0 0.5 1 1.5 t − Time − µs VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 3.5 4 4.5 5 6 VDD = 2.7 V RL = 600 Ω CL = 100 pF AV = 1 TA = 25°C VDD = 5 V RL = 600 Ω CL = 100 pF AV = 1 TA = 25°C 5 VO − Output Voltage − V VO − Output Voltage − V 3 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 3 2 2.5 Figure 32 Figure 31 2.5 2 t − Time − µs 1.5 1 0.5 0 −0.5 4 3 2 1 0 −1 −1 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 t − Time − µs −2 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 t − Time − µs Figure 34 Figure 33 WWW.TI.COM 27 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS INVERTING SMALL-SIGNAL PULSE RESPONSE INVERTING SMALL-SIGNAL PULSE RESPONSE 100 60 VDD = 5 V RL = 600 Ω CL = 100 pF AV = −1 TA = 25°C 80 VO − Output Voltage − mV 80 VO − Output Voltage − mV 100 VDD = 2.7 V RL = 600 Ω CL = 100 pF AV = −1 TA = 25°C 40 20 0 −20 −40 60 40 20 0 −20 −40 −60 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 −60 5 0 0.5 1 1.5 t − Time − µs 3 4 2.5 3.5 2 3 1.5 1 0.5 VDD = 2.7 V RL = 600 Ω CL = 100 pF AV = −1 TA = 25°C 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 t − Time − µs 5 2 1.5 VDD = 5 V RL = 600 Ω CL = 100 pF AV = −1 TA = 25°C 1 1 0 0.5 1 1.5 2 2.5 3 t − Time − µs Figure 38 Figure 37 28 4.5 2.5 0.5 −1 0 4 INVERTING LARGE-SIGNAL PULSE RESPONSE VO − Output Voltage − V VO − Output Voltage − V INVERTING LARGE-SIGNAL PULSE RESPONSE −0.5 3.5 Figure 36 Figure 35 0 2 2.5 3 t − Time − µs WWW.TI.COM 3.5 4 4.5 5 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY 160 140 120 100 80 60 40 VDD = 5 V RS = 20 Ω TA = 25°C 120 100 80 60 40 20 20 0 10 1k 100 0 10k 10 100 f − Frequency − Hz 1k 10k f − Frequency − Hz Figure 39 Figure 40 NOISE VOLTAGE OVER A 10 SECOND PERIOD VDD = 5 V f = 0.1 Hz to 10 Hz TA = 25°C 300 200 Noise Voltage − nV Vn − Input Noise Voltage − nV/ Hz 140 Vn − Input Noise Voltage − nV Hz VDD = 2.7 V RS = 20 Ω TA = 25°C 100 GND −100 −200 −300 0 1 2 3 4 5 6 7 8 9 10 t − Time − s Figure 41 WWW.TI.COM 29 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY 10 VDD = 2.7 V RL = 600 Ω TA = 25°C 1 Av = 100 0.1 Av = 10 0.01 Av = 1 0.001 10 10 THD+N − Total Harmonic Distortion Plus Noise − % THD+N − Total Harmonic Distortion Plus Noise − % TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY 100 1k 10k VDD = 5 V RL = 600 Ω TA = 25°C 1 0.1 Av = 100 Av = 10 0.01 Av = 1 0.001 10 100k 100 f − Frequency − Hz Figure 42 Unity-Gain Bandwidth − MHz Gain-Bandwidth Product − MHz 5 4.8 4.6 4.4 4.2 VDD = 5 V RL = 600 Ω TA = 25°C 4 3 Rnull = 100 2 Rnull = 50 Rnull = 20 1 Rnull = 0 4 2 2.5 3 3.5 4 4.5 5 5.5 6 VDD − Supply Voltage − V 0 10 100 1k 10k CL − Load Capacitance − pF Figure 44 30 100k UNITY-GAIN BANDWIDTH vs LOAD CAPACITANCE RL = 600 Ω CL = 100 pF f = 10 kHz TA = 25°C 5 10k Figure 43 GAIN-BANDWIDTH PRODUCT vs SUPPLY VOLTAGE 5.2 1k f − Frequency − Hz Figure 45 WWW.TI.COM 100k SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS PHASE MARGIN vs LOAD CAPACITANCE GAIN MARGIN vs LOAD CAPACITANCE 90 70 10 Rnull = 50 Ω 60 50 Rnull = 20 Ω 40 30 20 Rnull = 0 Rnull = 50 Ω 10k 40 10 100K 100 10k 1k CL − Load Capacitance − pF CL − Load Capacitance − pF Figure 46 Figure 47 TLV2770 TLV2773 AMPLIFIER WITH SHUTDOWN PULSE TURNON/OFF CHARACTERISTICS AMPLIFIER WITH SHUTDOWN PULSE TURNON/OFF CHARACTERISTICS 2 8 7 6 6 4 VO − Output Voltage − V 5 0 SHDN = GND 4 VDD = 5 V AV = 5 TA = 25°C 3 2 −6 1 −8 8 7 SHDN = VDD 6 2 VDD = 5 V SHDN = GND AV = 5 TA = 25°C Channel 1 Switched Channel 2 SHDN MODE 0 −2 4 3 2 Channel 1 −4 5 1 −6 VO VO 0 −10 −2 Shutdown Signal − V SHDN = VDD 8 100K VO − Output Voltage − V 1k 100 4 Shutdown Signal − V Rnull = 100 Ω 25 Rnull = 20 Ω 6 −12 −4 20 35 0 10 −4 Rnull = 0 15 30 10 −2 VDD = 5 V RL = 600 Ω TA = 25°C 5 Rnull = 100 Ω Gain Margin − dB φ m − Phase Margin − degrees 80 0 VDD = 5 V RL = 600 Ω TA = 25°C 0 2 4 6 8 10 12 0 −8 −1 14 −10 −2.5 t − Time − µs 0 2.5 5 7.5 10 12.5 −1 15 t − Time − µs Figure 48 Figure 49 WWW.TI.COM 31 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS TLV2775 − CHANNEL 1 TLV2770 AMPLIFIER WITH SHUTDOWN PULSE TURNON/OFF CHARACTERISTICS SUPPLY CURRENT WITH SHUTDOWN PULSE TURNON/OFF CHARACTERISTICS 2 VDD = 5 V SHDN = GND AV = 5 TA = 25°C Channel 1/2 Switched Channel 3/4 SHDN MODE 0 −2 −10 −2.5 2 5 0 4 3 1 −6 −8 6 2 Channel 1 −4 4 VO 2.5 5 7.5 10 12.5 18 15 SHDN = GND 12 −2 VDD = 5 V AV = 5 TA = 25°C −4 −6 −10 −1 15 −12 −4 −2 0 2 6 8 10 12 Figure 51 TLV2773 TLV2775 SUPPLY CURRENT WITH SHUTDOWN PULSE TURNON/OFF CHARACTERISTICS 6 60 3 50 0 SHDN = GND 40 −3 VDD = 5 V AV = 5 TA = 25°C Channel 1 Switched Channel 2 SHDN MODE 30 20 10 −12 IDD 0 −15 −18 −5 −2.5 0 2.5 5 7.5 10 12.5 70 SHDN = VDD 60 50 SHDN = GND Shutdown Signal − V 0 70 I DD − Supply Current − mA SHDN = VDD −9 −3 14 t − Time − µs 6 Shutdown Signal − V 4 SUPPLY CURRENT WITH SHUTDOWN PULSE TURNON/OFF CHARACTERISTICS −6 6 0 Figure 50 3 9 3 IDD t − Time − µs −3 15 t − Time − µs 40 −3 VDD = 5 V AV = 5 TA = 25°C Channel 1/2 Switched Channel 3/4 SHDN MODE −6 −9 20 IDD −15 −18 −5 0 −2.5 0 2.5 5 7.5 Figure 53 WWW.TI.COM 30 10 −12 t − Time − µs Figure 52 32 21 −8 0 0 SHDN = VDD 10 12.5 −3 15 I DD − Supply Current − mA Shutdown Signal − V 4 7 24 I DD − Supply Current − mA SHDN = VDD 6 Shutdown Signal − V 6 8 VO − Output Voltage − V 8 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS SHUTDOWN SUPPLY CURRENT vs FREE-AIR TEMPERATURE TLV2770 5 4 VDD 5 V 3 2 VDD 2.7 V 1 100 −50 −25 0 25 50 75 100 125 60 40 20 −20 10 TA − Free-Air Temperature − °C VI(PP) = 0.1 V 80 0 0 −75 VI(PP) = 2.7 V 120 Shutdown Forward Isolation − dB 6 140 AV = 5 RL = OPEN SHDN = GND SHDN MODE AV = 1 VDD = 2.7 V RL = 10 kΩ CL = 20 pF TA = 25°C 102 Figure 54 103 104 f − Frequency − Hz 105 106 Figure 55 TLV2770 140 SHUTDOWN REVERSE ISOLATION vs FREQUENCY VI(PP) = 2.7 V 120 Shutdown Reverse Isolation − dB I DD − Shutdown Supply Current − µ A 7 SHUTDOWN FORWARD ISOLATION vs FREQUENCY 100 80 60 40 20 0 −20 10 VI(PP) = 0.1 V SHDN MODE AV = 1 VDD = 2.7 V RL = 10 kΩ CL = 20 pF TA = 25°C 102 103 104 f − Frequency − Hz 105 106 Figure 56 WWW.TI.COM 33 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 PARAMETER MEASUREMENT INFORMATION _ Rnull + RL CL Figure 57 driving a capacitive load When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as shown in Figure 58. A minimum value of 20 Ω should work well for most applications. RF RG Input RNULL _ Output + CLOAD Figure 58. Driving a Capacitive Load 34 WWW.TI.COM SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION offset voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: RF IIB− RG V + − VI IO ǒ ǒ ǓǓ 1) R R F "I G IB) R S ǒ ǒ ǓǓ 1) R R F G "I IB– R F VO + RS +V OO IIB+ Figure 59. Output Offset Voltage Model general configurations When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see Figure 60). RG RF f –3dB − VO + VI R1 C1 V O + V I 1 2pR1C1 + ǒ 1) R R F G Ǔǒ Ǔ 1 1 ) sR1C1 Figure 60. Single-Pole Low-Pass Filter If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth. Failure to do this can result in phase shift of the amplifier. C1 + _ VI R1 R1 = R2 = R C1 = C2 = C Q = Peaking Factor (Butterworth Q = 0.707) R2 f C2 RG RF –3dB RG = + ( 1 2pRC RF 1 2− Q ) Figure 61. 2-Pole Low-Pass Sallen-Key Filter WWW.TI.COM 35 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION using the TLV2772 as an accelerometer interface The schematic, shown in Figure 62, shows the ACH04-08-05 interfaced to the TLV1544 10-bit analog-to-digital converter (ADC). The ACH04-08-05 is a shock sensor designed to convert mechanical acceleration into electrical signals. The sensor contains three piezoelectric sensing elements oriented to simultaneously measure acceleration in three orthogonal, linear axes (x, y, z). The operating frequency is 0.5 Hz to 5 kHz. The output is buffered with an internal JFET and has a typical output voltage of 1.80 mV/g for the x and y axis and 1.35 mV/g for the z axis. Amplification and frequency shaping of the shock sensor output is done by the TLV2772 rail-to-rail operational amplifier. The TLV2772 is ideal for this application as it offers high input impedance, good slew rate, and excellent dc precision. The rail-to-rail output swing and high output drive are perfect for driving the analog input of the TLV1544 ADC. 1.23 V C2 2.2 nF R3 10 kΩ R4 100 kΩ 3V R2 1 MΩ 1 Axis ACH04−08−05 3V C1 0.22 µF + 3 _ 1 4 R1 100 kΩ R5 1 kΩ 8 2 1/2 TLV2772 C3 0.22 µF Signal Conditioning 3V R6 2.2 kΩ 1.23 V Shock Sensor Output to TLV1544 (ADC) 1.23 V C R TLV431 A Voltage Reference Figure 62. Accelerometer Interface Schematic The sensor signal must be amplified and frequency-shaped to provide a signal the ADC can properly convert into the digital domain. Figure 62 shows the topology used in this application for one axis of the sensor. This system is powered from a single 3-V supply. Configuring the TLV431 with a 2.2-kΩ resistor produces a reference voltage of 1.23 V. This voltage is used to bias the operational amplifier and the internal JFETs in the shock sensor. 36 WWW.TI.COM SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION gain calculation Since the TLV2772 is capable of rail-to-rail output using a 3-V supply, VO = 0 (min) to 3 V (max). With no signal from the sensor, nominal VO = reference voltage = 1.23 V. Therefore, the maximum negative swing from nominal is 0 V − 1.23 V = −1.23 V and the maximum positive swing is 3 V − 1.23 V = 1.77 V. By modeling the shock sensor as a low impedance voltage source with output of 2.25 mV/g (max) in the x and y axis and 1.70 mV/g (max) in the z axis, the gain of the circuit is calculated by equation 1. Gain + Output Swing Sensor Signal Acceleration (1) To avoid saturation of the operational amplifier, the gain calculations are based on the maximum negative swing of −1.23 V and the maximum sensor output of 2.25 mV/g (x and y axis) and 1.70 mV/g (z axis). Gain (x, y) + * 1.23 V + 10.9 2.25 mVńg * 50 g (2) and Gain (z) + –1.23 V + 14.5 1.70 mVńg –50 g (3) By selecting R3 = 10 kΩ and R4 = 100 kΩ, in the x and y channels, a gain of 11 is realized. By selecting R3 = 7.5 kΩ and R4 = 100 kΩ, in the z channel, a gain of 14.3 is realized. The schematic shows the configuration for either the x- or y-axis. bandwidth calculation To calculate the component values for the frequency shaping characteristics of the signal conditioning circuit, 1 Hz and 500 Hz are selected as the minimum required 3-dB bandwidth. To minimize the value of the input capacitor (C1) required to set the lower cutoff frequency requires a large value resistor for R2 is required. A 1-MΩ resistor is used in this example. To set the lower cutoff frequency, the required capacitor value for C1 is: C1 + 1 + 0.159 µF 2p f LOW R 2 (4) Using a value of 0.22 µF, a more common value of capacitor, the lower cutoff frequency is 0.724 Hz. To minimize the phase shift in the feedback loop caused by the input capacitance of the TLV2772, it is best to minimize the value of the feedback resistor R4. However, to reduce the required capacitance in the feedback loop a large value for R4 is required. Therefore, a compromise for the value of R4 must be made. In this circuit, a value of 100 kΩ has been selected. To set the upper cutoff frequency, the required capacitor value for C2 is: C2 + 1 + 3.18 µF 2p f HIGH R 4 (5) Using a 2.2-nF capacitor, the upper cutoff frequency is 724 Hz. R5 and C3 also cause the signal response to roll off. Therefore, it is beneficial to design this roll-off point to begin at the upper cutoff frequency. Assuming a value of 1 kΩ for R5, the value for C3 is calculated to be 0.22 µF. WWW.TI.COM 37 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION circuit layout considerations To achieve the levels of high performance of the TLV277x, follow proper printed-circuit board design techniques. A general set of guidelines is given in the following. D Ground planes—It is highly recommended that a ground plane be used on the board to provide all components with a low inductive ground connection. However, in the areas of the amplifier inputs and output, the ground plane can be removed to minimize the stray capacitance. D Proper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less effective. The designer should strive for distances of less than 0.1 inches between the device power terminals and the ceramic capacitors. D Sockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board is the best implementation. D Short trace runs/compact part placements—Optimum high performance is achieved when stray series inductance has been minimized. To realize this, the circuit layout should be made as compact as possible, thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at the input of the amplifier. D Surface-mount passive components—Using surface-mount passive components is recommended for high performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be kept as short as possible. 38 WWW.TI.COM SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION general power dissipation considerations For a given θJA, the maximum power dissipation is shown in Figure 63 and is calculated by the following formula: P D + Where: ǒ T Ǔ –T MAX A q JA PD = Maximum power dissipation of TLV277x IC (watts) TMAX = Absolute maximum junction temperature (150°C) TA = Free-ambient air temperature (°C) θJA = θJC + θCA θJC = Thermal coefficient from junction to case θCA = Thermal coefficient from case to ambient air (°C/W) MAXIMUM POWER DISSIPATION vs FREE-AIR TEMPERATURE 2 Maximum Power Dissipation − W 1.75 1.5 1.25 TJ = 150°C PDIP Package Low-K Test PCB θJA = 104°C/W SOIC Package Low-K Test PCB θJA = 176°C/W MSOP Package Low-K Test PCB θJA = 260°C/W 1 0.75 0.5 0.25 SOT-23 Package Low-K Test PCB θJA = 324°C/W 0 −55 −40 −25 −10 5 20 35 50 65 80 95 110 125 TA − Free-Air Temperature − °C NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB. Figure 63. Maximum Power Dissipation vs Free-Air Temperature WWW.TI.COM 39 SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION shutdown function Three members of the TLV277x family (TLV2770/3/5) have a shutdown terminal for conserving battery life in portable applications. When the shutdown terminal is tied low, the supply current is reduced to 0.8 µA/channel, the amplifier is disabled, and the outputs are placed in a high impedance mode. To enable the amplifier, the shutdown terminal can either be left floating or pulled high. When the shutdown terminal is left floating, care needs to be taken to ensure that parasitic leakage current at the shutdown terminal does not inadvertently place the operational amplifier into shutdown. The shutdown terminal threshold is always referenced to VDD/2. Therefore, when operating the device with split supply voltages (e.g. ± 2.5 V), the shutdown terminal needs to be pulled to VDD− (not GND) to disable the operational amplifier. The amplifier’s output with a shutdown pulse is shown in Figures 48, 49, and 50. The amplifier is powered with a single 5-V supply and configured as a noninverting configuration with a gain of 5. The amplifier turnon and turnoff times are measured from the 50% point of the shutdown pulse to the 50% point of the output waveform. The times for the single, dual, and quad are listed in the data tables. The bump on the rising edge of the TLV2770 output waveform is due to the start-up circuit on the bias generator. For the dual and quad (TLV2773/5), this bump is attributed to the bias generator’s start-up circuit as well as the crosstalk between the other channel(s), which are in shutdown. Figures 55 and 56 show the amplifier’s forward and reverse isolation in shutdown. The operational amplifier is powered by ±1.35-V supplies and configured as a voltage follower (AV = 1). The isolation performance is plotted across frequency for both 0.1 VPP and 2.7 VPP input signals. During normal operation, the amplifier would not be able to handle a 2.7-VPP input signal with a supply voltage of ±1.35 V since it exceeds the common-mode input voltage range (VICR). However, this curve illustrates that the amplifier remains in shutdown even under a worst case scenario. 40 WWW.TI.COM SLOS209G − JANUARY 1998 − REVISED FEBRUARY 2004 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts Release 8, the model generation software used with Microsim PSpice . The Boyle macromodel (see Note 4) and subcircuit in Figure 64 are generated using the TLV2772 typical electrical and operating characteristics at TA = 25°C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): D Maximum positive output voltage swing D Unity-gain frequency D Maximum negative output voltage swing D Common-mode rejection ratio D Slew rate D Phase margin D Quiescent power dissipation D DC output resistance D Input bias current D AC output resistance D Open-loop voltage amplification D Short-circuit output current limit NOTE 4: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). 99 3 VDD + css egnd 9 rss 2 + 10 IN − j1 dp vc j2 IN+ 11 r2 − 53 dc 12 hlim − C2 6 GND − − − + vln + gcm vlim ga 8 − ro1 rd2 54 4 − 91 + vlp 7 C1 rd1 + dlp 90 ro2 vb rp 1 92 fb − + iss dln + de 5 + ve * TLV2772 operational amplifier macromodel subcircuit * created using Parts release 8.0 on 12/12/97 at 10:08 * Parts is a MicroSim product. * * connections: noninverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | .subckt TLV2772 12345 * c1 11 12 2.8868E-12 c2 6 7 10.000E−12 css 10 99 2.6302E−12 dc 5 53 dy de 54 5 dy dlp 90 91 dx dln 92 90 dx dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 15.513E6 −1E3 1E3 16E6 −16E6 ga 6 0 11 12 188.50E−6 gcm 0 6 10 99 9.4472E−9 iss hlim j1 j2 r2 rd1 rd2 ro1 ro2 rp rss vb vc ve vlim vlp vln .model .model .model 3 90 11 12 6 4 4 8 7 3 10 9 3 54 7 91 0 dx dy jx1 .model jx2 OUT 10 dc 145.50E−6 0 vlim 1K 2 10 jx1 1 10 jx2 9 100.00E3 11 5.3052E3 12 5.3052E3 5 17.140 99 17.140 4 4.5455E3 99 1.3746E6 0 dc 0 53 dc .82001 4 dc .82001 8 dc 0 0 dc 47 92 dc 47 D(Is=800.00E−18) D(Is=800.00E−18 Rs=1m Cjo=10p) PJF(Is=2.2500E−12 Beta=244.20E−6 + Vto=−.99765) PJF(Is=1.7500E−12 Beta=244.20E−6 + Vto=−1.002350) .ends *$ Figure 64. Boyle Macromodel and Subcircuit PSpice and Parts are trademarks of MicroSim Corporation. WWW.TI.COM 41 PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962-9858801Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629858801Q2A TLV2772 MFKB 5962-9858801QHA ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 9858801QHA TLV2772M 5962-9858801QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9858801QPA TLV2772M 5962-9858802Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629858802Q2A TLV2772 AMFKB 5962-9858802QHA ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 9858802QHA TLV2772AM 5962-9858802QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9858802QPA TLV2772AM TLV2770AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2770AI TLV2770AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2770AI TLV2770AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2770AI TLV2770AIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2770AI TLV2770CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2770C TLV2770CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2770C TLV2770CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2770C TLV2770CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2770C TLV2770CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TLV2770C Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TLV2770CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TLV2770IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ABP TLV2770IDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ABP TLV2770IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2770I TLV2770IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2770I TLV2770IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2770I TLV2770IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2770I TLV2771AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2771AI TLV2771AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2771AI TLV2771CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2771C TLV2771CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 VAMC TLV2771CDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 VAMC TLV2771CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 VAMC TLV2771CDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 VAMC TLV2771CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2771C TLV2771CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2771C TLV2771CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2771C TLV2771ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2771I Addendum-Page 2 TLV2770C Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TLV2771IDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 VAMI TLV2771IDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 VAMI TLV2771IDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 VAMI TLV2771IDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 VAMI TLV2771IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2771I TLV2771IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2771I TLV2771IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2771I TLV2772AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2772AI TLV2772AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2772AI TLV2772AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2772AI TLV2772AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2772AI TLV2772AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2772AI TLV2772AIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2772AI TLV2772AMD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 2772AM TLV2772AMDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 2772AM TLV2772AMDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 2772AM TLV2772AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type Addendum-Page 3 -55 to 125 59629858802Q2A TLV2772 AMFKB Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TLV2772AMJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9858802QPA TLV2772AM TLV2772AMUB ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 9858802QHA TLV2772AM TLV2772AQDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 2772AQ TLV2772AQDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 2772AQ TLV2772AQPW ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2772AQPWG4 ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2772AQ 2772AQ TLV2772AQPWR OBSOLETE TSSOP PW 8 TBD Call TI Call TI TLV2772AQPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2772CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2772C TLV2772CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2772C TLV2772CDGK ACTIVE VSSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAU | CU NIPDAUAG Level-1-260C-UNLIM 0 to 70 AAF TLV2772CDGKG4 ACTIVE VSSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 AAF TLV2772CDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU NIPDAUAG Level-1-260C-UNLIM 0 to 70 AAF TLV2772CDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 AAF TLV2772CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2772C TLV2772CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2772C TLV2772CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TLV2772C TLV2772CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TLV2772C Addendum-Page 4 -40 to 125 2772AQ 2772AQ Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TLV2772ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2772I TLV2772IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2772I TLV2772IDGK ACTIVE VSSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAU | CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 AAG TLV2772IDGKG4 ACTIVE VSSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 AAG TLV2772IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 AAG TLV2772IDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 AAG TLV2772IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2772I TLV2772IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2772I TLV2772IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2772IP TLV2772IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2772IP TLV2772MD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 2772M TLV2772MDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2772MDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2772MDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2772MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629858801Q2A TLV2772 MFKB TLV2772MJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9858801QPA TLV2772M TLV2772MUB ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 9858801QHA TLV2772M Addendum-Page 5 2772M -55 to 125 2772M 2772M Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TLV2772QD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2772QDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 2772Q TLV2772QDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 2772Q TLV2772QPW ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2772QPWG4 ACTIVE TSSOP PW 8 150 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2772QPWR ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2772QPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2773AIN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2773AI TLV2773AINE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2773AI TLV2773CDGS ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ABQ TLV2773CDGSG4 ACTIVE VSSOP DGS 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ABQ TLV2773CDGSR OBSOLETE VSSOP DGS 10 TBD Call TI Call TI 0 to 70 ABQ TLV2773CDGSRG4 OBSOLETE VSSOP DGS 10 TBD Call TI Call TI 0 to 70 TLV2773CDR OBSOLETE SOIC D 14 TBD Call TI Call TI 0 to 70 TLV2773CDRG4 OBSOLETE SOIC D 14 TBD Call TI Call TI 0 to 70 TLV2773IDGSR ACTIVE VSSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ABR TLV2773IDGSRG4 ACTIVE VSSOP DGS 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ABR TLV2773IDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2773I TLV2773IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2773I TLV2773IN OBSOLETE PDIP N 14 TBD Call TI Call TI -40 to 125 TLV2773I Addendum-Page 6 -40 to 125 -40 to 125 2772Q 2772Q 2772Q -40 to 125 2772Q 2772Q 2773C Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) TBD Call TI Call TI -40 to 125 Device Marking (4/5) TLV2773INE4 ACTIVE PDIP N 14 TLV2774AID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2774A TLV2774AIDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2774A TLV2774AIDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2774A TLV2774AIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2774A TLV2774AIN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2774A TLV2774AINE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2774A TLV2774AIPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2774A TLV2774AIPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2774A TLV2774CD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2774C TLV2774CDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2774C TLV2774CDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2774C TLV2774CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TLV2774C TLV2774CN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TLV2774C TLV2774CNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TLV2774C TLV2774CPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2774C TLV2774CPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 2774C TLV2774CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TV2774 Addendum-Page 7 Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TLV2774CPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TV2774 TLV2774ID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2774I TLV2774IDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2774I TLV2774IDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2774I TLV2774IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2774I TLV2774IN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2774I TLV2774INE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2774I TLV2774IPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2774 TLV2774IPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2774 TLV2774IPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2774 TLV2774IPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TY2774 TLV2775AIN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2775A TLV2775AINE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2775A TLV2775AIPW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2775AI TLV2775AIPWG4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2775AI TLV2775CD OBSOLETE SOIC D 16 TBD Call TI Call TI 0 to 70 TLV2775CDG4 OBSOLETE SOIC D 16 TBD Call TI Call TI 0 to 70 TLV2775CN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TLV2775C TLV2775CNE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TLV2775C Addendum-Page 8 TLV2775C Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TLV2775ID ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2775I TLV2775IDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2775I TLV2775IDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2775I TLV2775IDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TLV2775I TLV2775IN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2775I TLV2775INE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLV2775I TLV2775IPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2775I TLV2775IPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 2775I (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. Addendum-Page 9 Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TLV2771, TLV2772, TLV2772A, TLV2772AM, TLV2772M, TLV2774, TLV2774A : • Catalog: TLV2772A, TLV2772 • Automotive: TLV2771-Q1, TLV2772-Q1, TLV2772A-Q1, TLV2772A-Q1, TLV2772-Q1 • Enhanced Product: TLV2772A-EP, TLV2772A-EP, TLV2774-EP, TLV2774A-EP • Military: TLV2772M, TLV2772AM NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects • Enhanced Product - Supports Defense, Aerospace and Medical Applications • Military - QML certified for Military and Defense Applications Addendum-Page 10 PACKAGE MATERIALS INFORMATION www.ti.com 5-Mar-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TLV2770CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2770IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV2770IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2771AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2771CDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TLV2771CDBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TLV2771CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2771IDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TLV2771IDBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 TLV2771IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2772AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2772AMDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2772CDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV2772CDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV2772CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2772IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV2772IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV2772IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Mar-2014 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TLV2772MDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2772MDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TLV2773IDGSR VSSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TLV2773IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLV2774AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLV2774CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLV2774CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TLV2774IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TLV2774IPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TLV2775IDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 TLV2775IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV2770CDR SOIC D 8 2500 340.5 338.1 20.6 TLV2770IDGKR VSSOP DGK 8 2500 358.0 335.0 35.0 TLV2770IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2771AIDR SOIC D 8 2500 340.5 338.1 20.6 TLV2771CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV2771CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 5-Mar-2014 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV2771CDR SOIC D 8 2500 340.5 338.1 20.6 TLV2771IDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TLV2771IDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TLV2771IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2772AIDR SOIC D 8 2500 340.5 338.1 20.6 TLV2772AMDRG4 SOIC D 8 2500 367.0 367.0 35.0 TLV2772CDGKR VSSOP DGK 8 2500 364.0 364.0 27.0 TLV2772CDGKR VSSOP DGK 8 2500 358.0 335.0 35.0 TLV2772CDR SOIC D 8 2500 340.5 338.1 20.6 TLV2772IDGKR VSSOP DGK 8 2500 364.0 364.0 27.0 TLV2772IDGKR VSSOP DGK 8 2500 358.0 335.0 35.0 TLV2772IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2772MDR SOIC D 8 2500 367.0 367.0 35.0 TLV2772MDRG4 SOIC D 8 2500 367.0 367.0 35.0 TLV2773IDGSR VSSOP DGS 10 2500 358.0 335.0 35.0 TLV2773IDR SOIC D 14 2500 367.0 367.0 38.0 TLV2774AIDR SOIC D 14 2500 367.0 367.0 38.0 TLV2774CDR SOIC D 14 2500 367.0 367.0 38.0 TLV2774CPWR TSSOP PW 14 2000 367.0 367.0 35.0 TLV2774IDR SOIC D 14 2500 367.0 367.0 38.0 TLV2774IPWR TSSOP PW 14 2000 367.0 367.0 35.0 TLV2775IDR SOIC D 16 2500 367.0 367.0 38.0 TLV2775IPWR TSSOP PW 16 2000 367.0 367.0 35.0 Pack Materials-Page 3 MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 0.063 (1,60) 0.015 (0,38) 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0°–15° 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP1-T8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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