TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
TLV703x-Q1 and TLV704x-Q1 Rail-to-Rail, Low-Power Comparators
1 Features
3 Description
•
•
The TLV703x-Q1/TLV704x-Q1 are low-voltage,
nanopower comparators with rail-to-rail inputs. These
comparators are applicable for space-critical and
power conscious designs like infotainment, telematics,
and head unit applications.
•
•
•
•
•
•
•
•
•
•
•
Qualified for automotive applications
AEC-Q100 qualified with the following results:
– Device temperature grade 1: –40°C to 125°C
ambient operating temperature range
– Device HBM ESD classification level 2
– Device CDM ESD classification level C5
Wide supply voltage range of 1.6 V to 6.5 V
Quiescent supply current of 315 nA
Low propagation delay of 3 µs
Internal hysteresis of 6.5 mV
Rail-to-rail common-mode input voltage
Internal Power-On-Reset provides a known startup
condition
No phase reversal for overdriven inputs
Push-pull output (TLV703x-Q1)
Open-drain output (TLV704x-Q1)
–40°C to 125°C Operating temperature
Functional Safety Capable
– Documentation available to aid functional safety
system design (TLV70x1-Q1)
– Documentation available to aid functional safety
system design (TLV70x2-Q1)
2 Applications
The TLV703x-Q1 and TLV704x-Q1 also ensure no
output phase inversion with overdriven inputs and
internal hysteresis, so engineers can use this family of
comparators for precision voltage monitoring in harsh,
noisy environments where slow-moving input signals
must be converted into clean digital outputs.
The TLV703x-Q1 have a push-pull output stage
capable of sinking and sourcing milliamps of current.
The TLV704x-Q1 have an open-drain output stage
that can be pulled beyond VCC.
Device Information
Telematics eCall
Automotive head unit
Instrument cluster
Audio amplifier
On-board (OBC) & wireless chargers
PACKAGE (PINS) (1)
PART NUMBERS
TLV7031-Q1,
TLV7041-Q1
TLV7032-Q1,
TLV7042-Q1
TLV7034-Q1,
TLV7044-Q1
(1)
BODY SIZE (NOM)
SC70 (5)
2.00 mm × 1.25 mm
SOT-23 (5)
2.90 mm × 1.60 mm
VSSOP (8)
3.00 mm x 3.00 mm
SOT-23 (8)
(Preview)
2.90 mm x 1.60 mm
TSSOP (14)
4.40 mm x 5.00 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
900
7
Temp = -40°C
Temp = 25°C
Temp = 125°C
Temp -40°C
Temp 25°C
Temp 85°C
Temp 125°C
6
Propagation Delay (Ps)
800
700
ICC (nA)
•
•
•
•
•
The TLV703x-Q1 and TLV704x-Q1 offer an excellent
combination of power and speed. The benefit of
fast response time at nanopower enables powerconscious systems to monitor and respond quickly to
fault conditions. With an operating voltage range of
1.6 V to 6.5 V, these comparators are compatible with
1.8 V, 3 V, and 5 V systems.
600
500
400
5
4
3
2
300
200
1
1
1.5
2
2.5
3
3.5
4
VCC (V)
ICC vs. VCC
4.5
5
5.5
6
Iq_v
0
100
200
300
VOD (mV)
400
500
tlv7
Propagation Delay vs. Input Overdrive
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
Pin Functions: TLV7032/42...............................................4
5.1 Pin Functions: TLV7034/44.........................................5
6 Specifications.................................................................. 6
6.1 Absolute Maximum Ratings ....................................... 6
6.2 ESD Ratings .............................................................. 6
6.3 Recommended Operating Conditions ........................6
6.4 Thermal Information (Single) ..................................... 6
6.5 Thermal Information (Dual) ........................................ 7
6.6 Thermal Information (Quad) .......................................7
6.7 Electrical Characteristics ............................................8
6.8 Switching Characteristics ...........................................8
6.9 Electrical Characteristics (Dual) .................................9
6.10 Switching Characteristics (Dual) .............................. 9
6.11 Electrical Characteristics (Quad) ............................10
6.12 Switching Characteristics (Quad) ...........................10
6.13 Timing Diagrams..................................................... 11
6.14 Typical Characteristics............................................ 12
7 Detailed Description......................................................16
7.1 Overview................................................................... 16
7.2 Functional Block Diagram......................................... 16
7.3 Feature Description...................................................16
7.4 Device Functional Modes..........................................16
8 Application and Implementation.................................. 18
8.1 Application Information............................................. 18
8.2 Typical Applications.................................................. 21
9 Power Supply Recommendations................................26
10 Layout...........................................................................27
10.1 Layout Guidelines................................................... 27
10.2 Layout Example...................................................... 27
11 Device and Documentation Support..........................28
11.1 Device Support........................................................28
11.2 Receiving Notification of Documentation Updates.. 28
11.3 Support Resources................................................. 28
11.4 Trademarks............................................................. 28
11.5 Electrostatic Discharge Caution.............................. 28
11.6 Glossary.................................................................. 28
12 Mechanical, Packaging, and Orderable
Information.................................................................... 28
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (February 2021) to Revision C (October 2021)
Page
• Added link for new FIT Rate Report to the Features section..............................................................................1
Changes from Revision A (October 2020) to Revision B (February 2021)
Page
• Added Dual and Quad package options throughout ..........................................................................................1
Changes from Revision * (May 2020) to Revision A (October 2020)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• APL to RTM release............................................................................................................................................1
2
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
5 Pin Configuration and Functions
OUT
1
VEE
2
IN+
3
5
VCC
4
IN-
Figure 5-1. DBV, DCK Packages
5-Pin SOT-23, SC70
Top View
Table 5-1. Pin Functions
PIN
(1)
I/O (1)
DESCRIPTION
SOT-23, SC70
NAME
1
OUT
O
Output
5
VCC
P
Positive (highest) power supply
2
VEE
P
Negative (lowest) power supply
4
IN–
I
Inverting input
3
IN+
I
Noninverting input
I = Input, O = Output, P = Power
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
3
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
Pin Functions: TLV7032/42
OUTA
INAINA+
1
8
2
7
3
6
VEE
4
5
VCC
OUTB
INBINB+
Figure 5-2. TLV7032/42 DGK, DDF Packages
8-Pin VSSOP, SOT-23
Top View
Table 5-2. Pin Functions: TLV7032/42
PIN
NAME
4
NO.
I/O
DESCRIPTION
INA–
2
I
Inverting input, channel A
INA+
3
I
Noninverting input, channel A
INB–
6
I
Inverting input, channel B
INB+
5
I
Noninverting input, channel B
OUTA
1
O
Output, channel A
OUTB
7
O
Output, channel B
VEE
4
—
Negative (lowest) supply or ground (for single-supply operation)
VCC
8
—
Positive (highest) supply
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
5.1 Pin Functions: TLV7034/44
OUT A
1
14
OUT D
±IN A
2
13
±IN D
+IN A
3
12
+IN D
VCC
4
11
VEE
+IN B
5
10
+IN C
±IN B
6
9
±IN C
OUT B
7
8
OUT C
Not to scale
Figure 5-3. TLV7034/44 PW Packages
14-Pin TSSOP
Top View
Table 5-3. Pin Functions: TLV7034/44
PIN
NAME
TSSOP
I/O
DESCRIPTION
–IN1 A
2
I
Inverting input, channel A
+IN A
3
I
Noninverting input, channel A
–IN B
6
I
Inverting input, channel B
+IN B
5
I
Noninverting input, channel B
–IN C
9
I
Inverting input, channel C
+IN C
10
I
Noninverting input, channel C
–IN D
13
I
Inverting input, channel D
+IN D
12
I
Noninverting input, channel D
NC
—
—
No internal connection
OUT A
1
O
Output, channel A
OUT B
7
O
Output, channel B
OUT C
8
O
Output, channel C
OUT D
14
O
Output, channel D
VEE
11
—
Negative (lowest) supply or ground (for single-supply operation)
VCC
4
—
Positive (highest) supply
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
5
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
Supply voltage VS = VCC – VEE
Input pins (IN+, IN–)
(2)
MIN
MAX
–0.3
7
UNIT
V
VEE – 0.3
7
V
Output (OUT) (push-pull)(3)
VEE – 0.3
VCC + 0.3
V
Output (OUT) (open-drain)
VEE – 0.3
7
V
Output short-circuit duration(4)
Junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
(3)
(4)
–65
10
s
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
Input terminals are diode-clamped to VEE. Input signals that can swing 0.3V below VEE must be current-limited to 10mA or less
Output maximum is (VCC + 0.3 V) or 7 V, whichever is less.
Short-circuit to ground, one comparator per package.
6.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
Human-body model (HBM), per AEC Q100-002(1)
±2000
Charged-device model (CDM), per AEC Q100-011
±1000
UNIT
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
Supply voltage VS = VCC – VEE
Input voltage range
Ambient temperature, TA
MIN
MAX
1.6
6.5
UNIT
VEE – 0.1
VCC + 0.1
V
–40
125
°C
V
6.4 Thermal Information (Single)
TLV7031/TLV7041
THERMAL METRIC
DBV (SOT-23)
DCK (SC70)
5 PINS
5 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
297.2
278.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
224.7
186.6
°C/W
RθJB
Junction-to-board thermal resistance
200.1
113.2
°C/W
ΨJT
Junction-to-top characterization parameter
141.2
82.3
°C/W
ΨJB
Junction-to-board characterization parameter
198.9
112.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
°C/W
(1)
6
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
6.5 Thermal Information (Dual)
TLV7032/TLV7042
THERMAL METRIC
(1)
DGK (VSSOP)
DDF (SOT-23)
8 PINS
8 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
211.7
212.5
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
96.1
127.3
°C/W
RθJB
Junction-to-board thermal resistance
133.5
129.2
°C/W
ΨJT
Junction-to-top characterization parameter
28.3
25.8
°C/W
ΨJB
Junction-to-board characterization parameter
131.7
129.0
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.6 Thermal Information (Quad)
TLV7034/44
THERMAL METRIC (1)
RTE (QFN)
PW (TSSOP)
UNIT
16 PINS
14 PINS
RθJA
Junction-to-ambient thermal resistance
65.4
131.0
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
70.2
60.5
°C/W
RθJB
Junction-to-board thermal resistance
40.5
74.1
°C/W
ΨJT
Junction-to-top characterization parameter
5.6
12.6
°C/W
ΨJB
Junction-to-board characterization parameter
40.5
73.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
24.1
n/a
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
7
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
6.7 Electrical Characteristics
VS = 1.8 V to 5 V, VCM = VS / 2; minimum and maximum values are at TA = –40°C to +125°C (unless otherwise noted).
Typical values are at TA = 25°C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIO
Input Offset Voltage
VS = 1.8 V and 5 V, VCM = VS / 2
VHYS
Hysteresis
VS = 1.8 V and 5 V, VCM = VS / 2, TA = 25℃
VCM
Common-mode voltage range
IB
Input bias current
2
pA
IOS
Input offset current
1
pA
VOH
Output voltage high (push-pull
only)
VS = 5 V, VEE = 0 V, IO = 3 mA
4.8
V
VOL
Output voltage low
VS = 5 V, VEE = 0 V, IO = 3 mA
250
ILKG
Output leakage
current (open-drain only)
VS = 5 V, VID = +0.1 V (Output High),
VPULLUP = VCC
100
pA
CMRR
Common-mode rejection ratio
VEE < VCM < VCC, VS = 5 V
73
dB
PSRR
Power supply rejection ratio
VS = 1.8 V to 5 V, VCM = VS / 2
77
dB
ISC
Short-circuit current
VS = 5 V, sourcing (push-pull only)
35
VS = 5 V, sinking
40
ICC
Supply current / Channel
2
±0.1
±8
mV
6.5
17
mV
VEE
4.65
VS = 1.8 V, no load, VID = –0.1 V (Output Low)
VCC + 0.1
390
350
V
mV
mA
900
nA
6.8 Switching Characteristics
Typical values are at TA = 25°C, VS = 5 V, VCM = VS / 2; CL = 15 pF, input overdrive = 100 mV (unless otherwise noted).
PARAMETER
MIN
TYP
MAX
UNIT
tPHL
Midpoint of input to midpoint of output,
VOD = 100 mV
3
µs
tPLH
Propagation delay time, low-to high
(RP = 4.99 kΩ open-drain
only)
Midpoint of input to midpoint of output,
VOD = 100 mV
3
µs
tR
Rise time (push-pull only)
Measured from 20% to 80%
4.5
ns
tF
Fall time
Measured from 20% to 80%
4.5
ns
Power-up time
During power on, VCC must exceed 1.6V for
200 µs before the output will reflect the input..
200
µs
tON
8
TEST CONDITIONS
Propagation delay time, high tolow (RP = 4.99 kΩ open-drain
only)
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
6.9 Electrical Characteristics (Dual)
VS = 1.8 V to 5 V, VCM = VS / 2; minimum and maximum values are at TA = –40°C to +125°C (unless otherwise noted).
Typical values are at TA = 25°C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIO
Input Offset Voltage
VS = 1.8 V and 5 V, VCM = VS / 2
VHYS
Hysteresis
VS = 1.8 V and 5 V, VCM = VS / 2
VCM
Common-mode voltage range
IB
Input bias current
2
pA
IOS
Input offset current
1
pA
VOH
Output voltage high (push-pull
only)
VS = 5 V, VEE = 0 V, IO = 3 mA
4.8
V
VOL
Output voltage low
VS = 5 V, VEE = 0 V, IO = 3 mA
250
ILKG
Output leakage
current (open-drain only)
VS = 5 V, VID = +0.1 V (output high),
VPULLUP = VCC
100
pA
CMRR
Common-mode rejection ratio
VEE < VCM < VCC, VS = 5 V
73
dB
PSRR
Power supply rejection ratio
VS = 1.8 V to 5 V, VCM = VS / 2
77
dB
ISC
Short-circuit current
VS = 5 V, sourcing (push-pull only)
29
VS = 5 V, sinking
33
ICC
Supply current / Channel
3
±0.1
±8
mV
10
25
mV
VEE
4.65
VS = 1.8 V, no load, VID = –0.1 V (Output Low)
VCC + 0.1
315
350
V
mV
mA
750
nA
6.10 Switching Characteristics (Dual)
Typical values are at TA = 25°C, VS = 5 V, VCM = VS / 2; CL = 15 pF, input overdrive = 100 mV (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPHL
Propagation delay time, high tolow (RP = 4.99 kΩ open-drain
only) (1)
Midpoint of input to midpoint of output,
VOD = 100 mV
3
µs
tPLH
Propagation delay time, low-to high
(RP = 4.99 kΩ open-drain
only) (1)
Midpoint of input to midpoint of output,
VOD = 100 mV
3
µs
tR
Rise time (push-pull only)
Measured from 20% to 80%
4.5
ns
tF
Fall time
Measured from 20% to 80%
4.5
ns
Power-up time
During power on, VCC must exceed 1.6V for
200 µs before the output will reflect the input..
200
µs
tON
(1)
The lower limit for RP is 650 Ω
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
9
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
6.11 Electrical Characteristics (Quad)
VS = 1.8 V to 5 V, VCM = VS / 2; minimum and maximum values are at TA = –40°C to +125°C (unless otherwise noted).
Typical values are at TA = 25°C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIO
Input Offset Voltage
VS = 1.8 V and 5 V, VCM = VS / 2
VHYS
Hysteresis
VS = 1.8 V and 5 V, VCM = VS / 2
VCM
Common-mode voltage range
IB
Input bias current
2
pA
IOS
Input offset current
1
pA
VOH
Output voltage high (push-pull
only)
VS = 5 V, VEE = 0 V, IO = 3 mA
4.8
V
VOL
Output voltage low
VS = 5 V, VEE = 0 V, IO = 3 mA
250
ILKG
Output leakage
current (open-drain only)
VS = 5 V, VID = +0.1 V (output high),
VPULLUP = VCC
100
pA
CMRR
Common-mode rejection ratio
VEE < VCM < VCC, VS = 5 V
73
dB
PSRR
Power supply rejection ratio
VS = 1.8 V to 5 V, VCM = VS / 2
77
dB
ISC
Short-circuit current
VS = 5 V, sourcing (push-pull only)
29
VS = 5 V, sinking
33
ICC
Supply current / Channel
3
±0.1
±8
mV
10
25
mV
VEE
4.65
VS = 1.8 V, no load, VID = –0.1 V (Output Low)
VCC + 0.1
315
350
V
mV
mA
750
nA
6.12 Switching Characteristics (Quad)
Typical values are at TA = 25°C, VS = 5 V, VCM = VS / 2; CL = 15 pF, input overdrive = 100 mV (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPHL
Propagation delay time, high tolow (RP = 4.99 kΩ open-drain
only) (1)
Midpoint of input to midpoint of output,
VOD = 100 mV
3
µs
tPLH
Propagation delay time, low-to high
(RP = 4.99 kΩ open-drain
only) (1)
Midpoint of input to midpoint of output,
VOD = 100 mV
3
µs
tR
Rise time (push-pull only)
Measured from 20% to 80%
4.5
ns
tF
Fall time
Measured from 20% to 80%
4.5
ns
Power-up time
During power on, VCC must exceed 1.6V for tON
before the output will reflect the input..
400
µs
tON
(1)
10
The lower limit for RP is 650 Ω
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
6.13 Timing Diagrams
tON
VEE
VCC
VEE + 1.6V
VOH/2
VEE
OUT
Figure 6-1. Start-Up Time Timing Diagram (IN+ > IN–)
Figure 6-2. Propagation Delay Timing Diagram
Note
The propagation delays tpLH and tpHL include the contribution of input offset and hysteresis.
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
11
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
6.14 Typical Characteristics
TA = 25°C, VCC = 5 V, VEE = 0 V, VCM = VCC/2, CL = 15 pF
0.7
0.7
VCM = VCC /2
VCM = VCC
VCM = 0
VCM = VCC /2
VCM = VCC
VCM = 0
0.6
0.5
Input Offset (mV)
Input Offset (mV)
0.6
0.4
0.3
0.2
0.1
0.5
0.4
0.3
0.2
0.1
0
-40
-20
0
20
40
60
80
Temperature (°C)
100
120
0
-40
140
-20
0
20
vio_
VCC = 1.8 V
40
60
80
Temperature (°C)
100
Figure 6-3. Input Offset vs Temperature
Figure 6-4. Input Offset vs Temperature
Temp -40°C
Temp 25°C
Temp 125°C
0.9
0.8
0.5
Input Offset (mV)
Input Offset (mV)
vio_
1
0.6
0.4
0.3
0.2
0
-40
0.7
0.6
0.5
0.4
0.3
0.2
VCM = VCC /2
VCM = VCC
VCM = 0
0.1
0.1
0
-20
0
20
40
60
80
Temperature (°C)
100
120
140
0
0.2
0.4
0.6
0.8
vio_
VCC = 5 V
1
1.2
VCM (V)
1.4
1.6
1.8
2
vio_
VCC = 1.8 V
Figure 6-5. Input Offset vs Temperature
Figure 6-6. Input Offset Voltage vs VCM
1
1
Temp -40°C
Temp 25°C
Temp 125°C
0.9
0.8
Temp -40°C
Temp 25°C
Temp 125°C
0.9
0.8
0.7
Input Offset (mV)
Input Offset (mV)
140
VCC = 3.3 V
0.7
0.6
0.5
0.4
0.3
0.7
0.6
0.5
0.4
0.3
0.2
0.2
0.1
0.1
0
0
0
0.5
1
1.5
2
VCM (V)
2.5
VCC = 3.3 V
3
3.5
0
0.5
vio_
1
1.5
2
2.5
3
VCM (V)
3.5
4
4.5
5
vio_
VCC = 5 V
Figure 6-7. Input Offset Voltage vs VCM
12
120
Submit Document Feedback
Figure 6-8. Input Offset Voltage vs VCM
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
6.14 Typical Characteristics (continued)
10
10
9
9
8
8
7
7
Hysteresis (mV)
Hysteresis (mV)
TA = 25°C, VCC = 5 V, VEE = 0 V, VCM = VCC/2, CL = 15 pF
6
5
4
3
1
-40
5
4
3
VCM = VCC /2
VCM = VCC
VCM = 0
2
6
Temp -40°C
Temp 25°C
Temp 125°C
2
1
-20
0
20
40
60
80
Temperature (°C)
100
120
140
0
0.5
VCC = 1.8 V to 5 V
TLV70x1
9
8
8
7
7
Hysteresis (mV)
10
9
6
5
4
hyst
TLV70x1
6
5
4
3
Temp -40°C
Temp 25°C
Temp 125°C
2
2
Figure 6-10. Hysteresis vs VCM
10
3
1.5
VCC = 1.8 V
Figure 6-9. Hysteresis vs Temperature
Hysteresis (mV)
1
VCM (V)
hyst
Temp -40°C
Temp 25°C
Temp 125°C
2
1
1
0
1
2
3
4
VCM (V)
0
1
2
VCC = 3.3 V
3
4
5
VCM (V)
hyst
TLV70x1
hyst
VCC = 5 V
TLV70x1
Figure 6-11. Hysteresis vs VCM
Figure 6-12. Hysteresis vs VCM
1.795
1000
1.785
1.78
10
VOH (V)
Input Bias Current (pA)
1.79
100
1
1.775
1.77
1.765
Temp -40°C
Temp 25°C
Temp 85°C
Temp 125°C
0.1
1.76
0.01
-40
A.
-20
0
20
40
60
80
Temperature (°C)
100
120
VCC = 5 V
140
1.755
0.1
0.15
tlv7
0.2
0.25
0.3
0.35
0.4
Output Source Current (mA)
VCC = 1.8 V
Figure 6-13. Input Bias Current vs Temperature
Copyright © 2021 Texas Instruments Incorporated
0.45
0.5
voh_
TLV703x
Figure 6-14. Output Voltage High vs Output Source Current
Submit Document Feedback
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
13
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
6.14 Typical Characteristics (continued)
TA = 25°C, VCC = 5 V, VEE = 0 V, VCM = VCC/2, CL = 15 pF
5
0.1
4.98
0.08
0.07
0.06
4.96
4.94
0.05
VOL (V)
VOH (V)
4.92
4.9
4.88
0.04
0.03
4.86
0.02
4.84
Temp -40°C
Temp 25°C
Temp 85°C
Temp 125°C
4.82
4.8
Temp -40°C
Temp 25°C
Temp 125°C
4.78
0
0.5
1
1.5
2
2.5
3
3.5
Output Source Current (mA)
4
4.5
0.01
0.1
5
0.2
0.3
Output Sink Current (mA)
voh_
VCC = 5 V
TLV703x
Figure 6-15. Output Voltage High vs Output Source Current
0.4
0.5
vol_
VCC = 1.8 V
Figure 6-16. Output Voltage Low vs Output Sink Current
50
0.5
VCC=3.5V
VCC=5.5V
0.3
0.2
40
ISC (mA)
VOL (V)
0.1
0.07
0.05
0.03
30
0.02
20
Temp -40°C
Temp 25°C
Temp 125°C
0.01
0.007
0.005
0.1
0.2
0.3 0.4 0.5 0.7 1
Output Sink Current (mA)
2
3
10
-40
4 5
-20
0
20
vol_
VCC = 5 V
40
60
80
Temperature (°C)
100
120
140
nisc
VCM = VCC / 2
Figure 6-17. Output Voltage Low vs Output Sink Current
Figure 6-18. Output Short-Circuit (Sink) Current vs Temperature
50
50
Vcc=3.5V
Vcc=5.5V
40
ISC (mA)
Isc (mA)
40
30
30
20
20
10
10
-40
0
-20
0
20
40
60
80
Temperature ( °C)
VCM = VCC / 2
100
120
140
Submit Document Feedback
1
1.5
2
pisc
TLV703x
Figure 6-19. Output Short-Circuit (Source) Current vs
Temperature
14
Temp -40°C
Temp 25°C
Temp 125°C
2.5
3
3.5 4
VCC(V)
4.5
5
5.5
6
6.5
nisc
VCM = VCC / 2
Figure 6-20. Output Short Circuit (Sink) vs VCC
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
6.14 Typical Characteristics (continued)
TA = 25°C, VCC = 5 V, VEE = 0 V, VCM = VCC/2, CL = 15 pF
50
800
45
700
40
600
30
ICC (nA)
Isc (mA)
35
25
20
500
400
15
10
Temp -40C
Temp 25C
Temp 125C
5
0
1
1.5
2
2.5
3
3.5 4
Vcc (V)
4.5
5
5.5
6
VCC = 1.8V
VCC = 3.3V
VCC = 5.0V
300
200
-40
6.5
VCM = VCC / 2
900
20000
10000
5000
Temp = -40°C
Temp = 25°C
Temp = 125°C
40
60
80
Temperature (°C)
100
120
140
Iq_v
TLV70x2
600
500
Fall Time
Rise Time
2000
1000
500
Rise/Fall Time (ns)
700
ICC (nA)
20
Figure 6-22. ICC vs Temperature
Figure 6-21. Output Short Circuit (Source) vs VCC
200
100
50
400
20
10
5
300
2
10 2030 50 100 200 5001000
10000
Load Capacitance (pF)
200
1
1.5
2
2.5
3
3.5
4
VCC (V)
4.5
5
5.5
6
Iq_v
VCM = VCC / 2
VOD = 100 mV
TLV70x2
100000
tlv7
TLV703x Rise only
Figure 6-24. Rise/Fall Time vs Load Capacitance
Figure 6-23. ICC vs VCC
7
7
Temp -40°C
Temp 25°C
Temp 85°C
Temp 125°C
Temp -40°C
Temp 25°C
Temp 85°C
Temp 125°C
6
Propagation Delay (Ps)
6
Propagation Delay (Ps)
0
VCM = VCC / 2
TLV703x
800
-20
pisc
5
4
3
2
5
4
3
2
1
1
0
100
200
300
VOD (mV)
VCC = 3.3 V to 5 V
400
500
TLV703x
Figure 6-25. Propagation Delay (L-H) vs Input Overdrive
Copyright © 2021 Texas Instruments Incorporated
0
100
tlv7
200
300
VOD (mV)
400
500
tlv7
VCC = 3.3 V to 5 V
Figure 6-26. Propagation Delay (H-L) vs Input Overdrive
Submit Document Feedback
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
15
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
7 Detailed Description
7.1 Overview
The TLV703x-Q1 and TLV704x-Q1 devices are single-channel, nano-power comparators with push-pull and
open-drain outputs. Operating from 1.6 V to 6.5 V and consuming only 315 nA, the TLV703x-Q1 and TLV704xQ1 are designed for portable and industrial applications.
7.2 Functional Block Diagram
VCC
IN+
+
IN-
-
OUT
Power-on-reset
Bias
VEE
7.3 Feature Description
The TLV703x-Q1 and TLV704x-Q1 comparators are nanopower comparators that are capable of operating at
low voltages. The TLV703x-Q1 and TLV704x-Q1 feature a rail-to-rail input stage capable of operating up to 100
mV beyond the VCC power supply rail. The TLV703x-Q1 (push-pull) and TLV704x-Q1 (open-drain) also feature
internal hysteresis.
7.4 Device Functional Modes
The TLV703x-Q1 and TLV704x-Q1 have a power-on-reset (POR) circuit. While the power supply (VS) is less
than the minimum supply voltage, either upon ramp-up or ramp-down, the POR circuitry is activated.
For the TLV703x-Q1, the POR circuit holds the output low (at VEE) while activated.
For the TLV704x-Q1, the POR circuit keeps the output high impedance (logical high) while activated.
When the supply voltage is greater than, or equal to, the minimum supply voltage, the comparator output reflects
the state of the differential input (VID).
16
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
7.4.1 Inputs
The TLV703x-Q1 and TLV704x-Q1 input common-mode extends from VEE to 100 mV above VCC. The differential
input voltage (VID) can be any voltage within these limits. No phase inversion of the comparator output occurs
when the input pins exceed VCC and VEE.
The input of TLV703x-Q1 and TLV704x-Q1 is fault tolerant. It maintains the same high input impedance when
VCC is unpowered or ramping up. The input can be safely driven up to the specified maximum voltage (7 V) with
VCC = 0 V or any value up to the maximum specified. The VCC is isolated from the input such that it maintains its
value even when a higher voltage is applied to the input.
The input bias current is typically 1 pA for input voltages between VCC and VEE. The comparator inputs are
protected from voltages below VEE by internal diodes connected to VEE. As the input voltage goes under VEE,
the protection diodes become forward biased and begin to conduct causing the input bias current to increase
exponentially. Input bias current typically doubles every 10°C temperature increases.
7.4.2 Internal Hysteresis
The device hysteresis transfer curve is shown in Figure 7-1. This curve is a function of three components: VTH,
VOS, and VHYST:
• VTH is the actual set voltage or threshold trip voltage.
• VOS is the internal offset voltage between VIN+ and VIN–. This voltage is added to VTH to form the actual trip
point at which the comparator must respond to change output states.
• VHYST is the internal hysteresis (or trip window) that is designed to reduce comparator sensitivity to noise
(7 mV for both TLV703x-Q1 and TLV704x-Q1).
VTH + VOS - (VHYST / 2)
VTH + VOS
VTH + VOS + (VHYST / 2)
Figure 7-1. Hysteresis Transfer Curve
7.4.3 Output
The TLV703x-Q1 features a push-pull output stage eliminating the need for an external pullup resistor. On the
other hand, the TLV704x-Q1 features an open-drain output stage enabling the output logic levels to be pulled up
to an external source up to 6.5 V independent of the supply voltage.
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
17
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
8 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
The TLV703x-Q1 and TLV704x-Q1 are nano-power comparators with reasonable response time. The
comparators have a rail-to-rail input stage that can monitor signals beyond the positive supply rail with integrated
hysteresis. When higher levels of hysteresis are required, positive feedback can be externally added. The pushpull output stage of the TLV703x-Q1 is optimal for reduced power budget applications and features no shootthrough current. When level shifting or wire-ORing of the comparator outputs is needed, the TLV704x-Q1 with
its open-drain output stage is well suited to meet the system needs. In either case, the wide operating voltage
range, low quiescent current, and small size of the TLV703x-Q1 and TLV704x-Q1 make these comparators
excellent candidates for battery-operated and portable, handheld designs.
8.1.1 Inverting Comparator With Hysteresis for TLV703x-Q1
The inverting comparator with hysteresis requires a three-resistor network that is referenced to the comparator
supply voltage (VCC), as shown in Figure 8-1. When VIN at the inverting input is less than VA, the output voltage
is high (for simplicity, assume VO switches as high as VCC). The three network resistors can be represented as
R1 || R3 in series with R2. Equation 1 defines the high-to-low trip voltage (VA1).
VA1 = VCC ´
R2
(R1 || R3) + R2
(1)
When VIN is greater than VA, the output voltage is low, very close to ground. In this case, the three network
resistors can be presented as R2 || R3 in series with R1. Use Equation 2 to define the low to high trip voltage
(VA2).
VA2 = VCC ´
R2 || R3
R1 + (R2 || R3)
(2)
Equation 3 defines the total hysteresis provided by the network.
DVA = VA1 - VA2
18
Submit Document Feedback
(3)
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
+VCC
+5 V
R1
1 MW
VIN
5V
RLOAD
100 kW
VA
VO
VA2
VA1
0V
1.67 V
R3
1 MW
R2
1 MW
VO High
+VCC
R1
VIN
3.33 V
VO Low
+VCC
R3
R1
VA1
VA2
R2
R2
R3
Copyright © 2016, Texas Instruments Incorporated
Figure 8-1. TLV703x-Q1 in an Inverting Configuration With Hysteresis
8.1.2 Noninverting Comparator With Hysteresis for TLV703x-Q1
A noninverting comparator with hysteresis requires a two-resistor network, as shown in Figure 8-2, and a voltage
reference (VREF) at the inverting input. When VIN is low, the output is also low. For the output to switch from low
to high, VIN must rise to VIN1. Use Equation 4 to calculate VIN1.
VREF
VIN1 = R1 ´
R2
+ VREF
(4)
When VIN is high, the output is also high. For the comparator to switch back to a low state, VIN must drop to VIN2
such that VA is equal to VREF. Use Equation 5 to calculate VIN2.
VIN2 =
VREF (R1 + R2) - VCC ´ R1
(5)
R2
The hysteresis of this circuit is the difference between VIN1 and VIN2, as shown in Equation 6.
DVIN = VCC ´
R1
R2
Copyright © 2021 Texas Instruments Incorporated
(6)
Submit Document Feedback
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
19
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
+VCC
+5 V
VREF
+2.5 V
VO
VA
VIN
RLOAD
R1
330 kW
R2
1 MW
VO High
+VCC
VO Low
VIN1
5V
R2
R1
VA = VREF
VA = VREF
R1
R2
VO
VIN2
VIN1
0V
1.675 V
3.325 V
VIN
VIN2
Copyright © 2016, Texas Instruments Incorporated
Figure 8-2. TLV703x-Q1 in a Noninverting Configuration With Hysteresis
20
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
8.2 Typical Applications
8.2.1 Window Comparator
Window comparators are commonly used to detect undervoltage and overvoltage conditions. Figure 8-3 shows a
simple window comparator circuit.
3.3V
RPU
R1
UV_OV
+
MicroController
Sensor
R2
+
R3
Figure 8-3. TLV704x-Q1-Based Window Comparator
8.2.1.1 Design Requirements
For this design, follow these design requirements:
• Alert (logic low output) when an input signal is less than 1.1 V
• Alert (logic low output) when an input signal is greater than 2.2 V
• Alert signal is active low
• Operate from a 3.3-V power supply
8.2.1.2 Detailed Design Procedure
Configure the circuit as shown in Figure 8-3. Connect VCC to a 3.3-V power supply and VEE to ground. Make R1,
R2, and R3 each 10-MΩ resistors. These three resistors are used to create the positive and negative thresholds
for the window comparator (VTH+ and VTH–). With each resistor being equal, VTH+ is 2.2 V and VTH- is 1.1 V.
Large resistor values such as 10 MΩ are used to minimize power consumption. The sensor output voltage is
applied to the inverting and noninverting inputs of the two TLV704x-Q1 devices. The TLV704x-Q1 is used for
its open-drain output configuration. Using the TLV704x-Q1 allows the two comparator outputs to be wire-ored
together. The respective comparator outputs are low when the sensor is less than 1.1 V or greater than 2.2 V.
VOUT is high when the sensor is in the range of 1.1 V to 2.2 V.
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
21
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
8.2.1.3 Application Curve
VIN
VTH+ = 2.2 V
VTH± = 1.1 V
Time (usec)
VOUT
50
100
150
200
Time (usec)
Figure 8-4. Window Comparator Results
8.2.2 IR Receiver Analog Front End
A single TLV703x-Q1 device can be used to build a complete IR receiver analog front end (AFE). The nanoamp
quiescent current and low input bias current make it possible to be powered with a coin cell battery, which could
last for years.
Vref
470 k
3V
R2
IR LED
470 k
R3
10M
R4
+
U1
Output to MCU
(Also to wake-up MCU)
±
10M
C1
VIN
VOUT
TLV7031
R1
0.01 F
GND
Copyright © 2017, Texas Instruments Incorporated
Figure 8-5. IR Receiver Analog Front End Using TLV703x-Q1
8.2.2.1 Design Requirements
For this design, follow these design requirements:
• Use a proper resistor (R1) value to generate an adequate signal amplitude applied to the inverting input of the
comparator.
• The low input bias current IB (2 pA typical) ensures that a greater value of R1 to be used.
• The RC constant value (R2 and C1) must support the targeted data rate (that is, 9,600 bauds) in order to
maintain a valid tripping threshold.
• The hysteresis introduced with R3 and R4 helps to avoid spurious output toggles.
22
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
8.2.2.2 Detailed Design Procedure
The IR receiver AFE design is highly streamlined and optimized. R1 converts the IR light energy induced current
into voltage and applies to the inverting input of the comparator. The RC network of R2 and C1 establishes
a reference voltage Vref, which tracks the mean amplitude of the IR signal. The noninverting input is directly
connected to Vref through R3. R3 and R4 are used to produce a hysteresis to keep transitions free of spurious
toggles. To reduce the current drain from the coin cell battery, data transmission must be short and infrequent.
More technical details are provided in the TI TechNote Low Power Comparator for Signal Processing and
Wake-Up Circuit in Smart Meters (SNVA808).
8.2.2.3 Application Curve
1.8 V
VIN
1.2 V
4.0 V
VOUT
0.0 V
1.61 V
VREF
1.58 V
0.0
200.0 u
400.0 u
600.0 u
800.0 u
Time
Figure 8-6. IR Receiver AFE Waveforms
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
23
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
8.2.3 Square-Wave Oscillator
A square-wave oscillator can be used as low-cost timing reference or system supervisory clock source.
Figure 8-7. Square-Wave Oscillator
8.2.3.1 Design Requirements
The square-wave period is determined by the RC time constant of the capacitor and resistor. The maximum
frequency is limited by the propagation delay of the device and the capacitance load at the output. The low input
bias current allows a lower capacitor value and larger resistor value combination for a given oscillator frequency,
which may help reduce BOM cost and board space.
8.2.3.2 Detailed Design Procedure
The oscillation frequency is determined by the resistor and capacitor values. The following section provides
details to calculate these component values.
Figure 8-8. Square-Wave Oscillator Timing Thresholds
First consider the output of figure Figure 8-7 is high, which indicates the inverted input VC is lower than the
noninverting input (VA). This causes the C1 to be charged through R4, and the voltage VC increases until it is
equal to the noninverting input. The value of VA at the point is calculated by Equation 7.
VA1
VCC u R 2
R 2 R 1 IIR 3
(7)
If R1 = R2= R3, then VA1 = 2 VCC/ 3
24
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
At this time the comparator output trips pulling down the output to the negative rail. The value of VA at this point
is calculated by Equation 8.
VA 2
VCC (R 2IIR 3 )
R 1+ R 2IIR 3
(8)
If R1 = R2 = R3, then VA2 = VCC/3
The C1 now discharges though the R4, and the voltage VCC decreases until it reaches VA2. At this point, the
output switches back to the starting state. The oscillation period equals the time duration from 2 VCC / 3 to
VCC / 3 then back to 2 VCC / 3, which is given by R4C1 × ln2 for each trip. Therefore, the total time duration is
calculated as 2 R4C1 × ln2. The oscillation frequency can be obtained by Equation 9:
f
1/ 2 R4 u C1u In2
(9)
8.2.3.3 Application Curve
Figure 8-9 shows the simulated results of an oscillator using the following component values:
•
•
•
•
R1 = R2 = R3 = R4 = 100 kΩ
C1 = 100 pF, CL = 20 pF
V+ = 5 V, V– = GND
Cstray (not shown) from VA to GND = 10 pF
Figure 8-9. Square-Wave Oscillator Output Waveform
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
25
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
9 Power Supply Recommendations
The TLV703x-Q1 and TLV704x-Q1 have a recommended operating voltage range (VS) of 1.6 V to 6.5 V. VS is
defined as VCC – VEE. Therefore, the supply voltages used to create VS can be single-ended or bipolar. For
example, single-ended supply voltages of 5 V and 0 V and bipolar supply voltages of +2.5 V and –2.5 V create
comparable operating voltages for VS. However, when bipolar supply voltages are used, it is important to realize
that the logic low level of the comparator output is referenced to VEE.
Output capacitive loading and output toggle rate will cause the average supply current to rise over the quiescent
current.
26
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
10 Layout
10.1 Layout Guidelines
Figure 10-1 shows the typical connections for the TLV7031-Q1. To minimize supply noise, power supplies
must be capacitively decoupled by a 0.1-µF ceramic capacitor in parallel with a 10-µF electrolytic capacitor.
Comparators are very sensitive to input noise. Proper grounding (the use of a ground plane) helps to maintain
the specified performance of the TLV70x1-Q1 family.
For best results, maintain the following layout guidelines:
1. Use a printed-circuit board (PCB) with a good, unbroken low-inductance ground plane.
2. Place a decoupling capacitor (0.1-µF ceramic, surface-mount capacitor) as close as possible to VCC.
3. On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback
around the comparator. Keep inputs away from the output.
4. Solder the device directly to the PCB rather than using a socket.
5. For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less)
placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes
some degradation to propagation delay when the impedance is low. The top-side ground plane runs between
the output and inputs.
6. The ground pin ground trace runs under the device up to the bypass capacitor, shielding the inputs from the
outputs.
10.2 Layout Example
VEE
VOUT
VCC
VEE
IN+
IN-
Figure 10-1. TLV7031-Q1 Layout Example
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
27
TLV7031-Q1, TLV7041-Q1, TLV7032-Q1, TLV7042-Q1, TLV7034-Q1, TLV7044-Q1
www.ti.com
SNOSDA5C – MAY 2020 – REVISED OCTOBER 2021
11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
11.1.1.1 Evaluation Module
An evaluation module (EVM) is available to assist in the initial circuit performance evaluation using the TLV703xQ1, TLV704x-Q1 device family. The DIP Adapter EVM can be requested at the Texas Instruments website
through the product folder or purchased directly from the TI eStore.
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
28
Submit Document Feedback
Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: TLV7031-Q1 TLV7041-Q1 TLV7032-Q1 TLV7042-Q1 TLV7034-Q1 TLV7044-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
8-Nov-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TLV7031QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
7031
TLV7031QDCKRQ1
ACTIVE
SC70
DCK
5
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1GP
TLV7032QDGKRQ1
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
7032
TLV7034QPWRQ1
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
7034Q
TLV7041QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
7041
TLV7041QDCKRQ1
ACTIVE
SC70
DCK
5
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
1GQ
TLV7042QDGKRQ1
ACTIVE
VSSOP
DGK
8
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
7042
TLV7044QPWRQ1
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
7044Q
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
