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TMUX1133PWR

TMUX1133PWR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    TSSOP16

  • 描述:

    IC SWITCH

  • 数据手册
  • 价格&库存
TMUX1133PWR 数据手册
Product Folder Order Now Support & Community Tools & Software Technical Documents TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 TMUX113x 5-V, Low-Leakage-Current, 2:1 (SPDT), 3 or 4-Channel Precision Switches 1 Features 3 Description • • • • • • • • • • • • The TMUX113x devices are precision complementary metal-oxide semiconductor (CMOS) switches with multiple channels. The TMUX1133 is a 2:1, singlepole double-throw (SPDT), configuration with three independently controlled channels and an EN pin to enable or disable all three switches. The TMUX1134 contains four independently controlled SPDT switches. Wide operating supply of 1.08 V to 5.5 V, or ±2.75 V dual supply, allows for use in a broad array of applications from medical equipment to industrial systems. The device supports bidirectional analog and digital signals on the source (Sx) and drain (Dx) pins ranging from VSS to VDD. For single supply applications VSS must be connected to GND. 1 Single supply range: 1.08 V to 5.5 V Dual supply range: ±2.75 V Low leakage current: 3 pA Low charge injection: -1 pC Low on-resistance: 2 Ω -40°C to +125°C operating temperature 1.8 V Logic Compatible Fail-Safe Logic Rail to Rail Operation Bidirectional Signal Path Break-before-make switching ESD protection HBM: 2000 V All logic inputs have 1.8 V logic compatible thresholds, ensuring both TTL and CMOS logic compatibility when operating in the valid supply voltage range. Fail-Safe Logic circuitry allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage. 2 Applications • • • • • • • • • • • • • • • • Field transmitters Programmable logic controllers (PLC) Factory automation and control Ultrasound scanners Patient monitoring & diagnostics Electrocardiogram (ECG) Data acquisition systems (DAQ) ATE test equipment Battery test equipment Instrumentation: lab, analytical, portable Smart meters: Water and Gas Optical networking Optical test equipment Portable POS Remote radio units Active antenna system (mMIMIO) The TMUX113x devices are part of the precision switches and multiplexers family. These devices have very low on and off leakage currents and low charge injection, allowing them to be used in high precision measurement applications. A low supply current of 8 nA enables use in portable applications. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TMUX1133 TSSOP (16) (PW) 5.00 mm × 4.40 mm TMUX1134 TSSOP (20) (PW) 6.50 mm × 4.40 mm (1) For all available packages, see the package option addendum at the end of the data sheet. TMUX113x Block Diagrams TMUX1133 S1A S1B S2A S2B S3A S3B EN TMUX1134 D1 SEL1 D2 SEL2 D3 SEL3 S1A S1B S2A S2B S3A S3B S4A S4B D1 SEL1 D2 SEL2 D3 SEL3 D4 SEL4 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Comparison Table..................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 3 5 7.1 7.2 7.3 7.4 7.5 7.6 7.7 Absolute Maximum Ratings ...................................... 5 ESD Ratings.............................................................. 5 Recommended Operating Conditions....................... 5 Thermal Information .................................................. 5 Electrical Characteristics (VDD = 5 V ±10 %) ............ 6 Electrical Characteristics (VDD = 3.3 V ±10 %) ......... 8 Electrical Characteristics (VDD = 2.5 V ±10 %), (VSS = –2.5 V ±10 %) .......................................................... 10 7.8 Electrical Characteristics (VDD = 1.8 V ±10 %) ....... 12 7.9 Electrical Characteristics (VDD = 1.2 V ±10 %) ....... 14 7.10 Typical Characteristics .......................................... 16 8 Parameter Measurement Information ................ 19 8.1 8.2 8.3 8.4 8.5 8.6 8.7 8.8 8.9 On-Resistance ........................................................ Off-Leakage Current ............................................... On-Leakage Current ............................................... Transition Time ....................................................... Break-Before-Make ................................................. tON(EN) and tOFF(EN).................................................. Charge Injection ...................................................... Off Isolation ............................................................. Crosstalk ................................................................. 19 19 20 20 21 21 22 22 23 8.10 Bandwidth ............................................................. 23 9 Detailed Description ............................................ 24 9.1 9.2 9.3 9.4 9.5 Overview ................................................................. Functional Block Diagram ....................................... Feature Description................................................. Device Functional Modes........................................ Truth Tables ............................................................ 24 24 24 26 26 10 Application and Implementation........................ 27 10.1 10.2 10.3 10.4 10.5 Application Information.......................................... Typical Application ............................................... Design Requirements............................................ Detailed Design Procedure ................................... Application Curve .................................................. 27 27 27 28 28 11 Power Supply Recommendations ..................... 29 12 Layout................................................................... 29 12.1 Layout Guidelines ................................................. 29 12.2 Layout Example .................................................... 30 13 Device and Documentation Support ................. 31 13.1 13.2 13.3 13.4 13.5 13.6 13.7 Documentation Support ........................................ Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 31 31 31 31 31 31 31 14 Mechanical, Packaging, and Orderable Information ........................................................... 32 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (June 2019) to Revision A • 2 Page Changed the device From: Advanced Information To: Production data ............................................................................... 1 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 5 Device Comparison Table PRODUCT DESCRIPTION TMUX1133 2:1 (SPDT), 3-Channel Switch TMUX1134 2:1 (SPDT), 4-Channel Switch 6 Pin Configuration and Functions TMUX1133: PW Package 16-Pin TSSOP Top View S2B 1 16 V S2A 2 15 D2 S3B 3 14 D1 D3 4 13 S1B S3A 5 12 S1A 6 11 SEL1 7 10 SEL2 8 9 SEL3 V SS GND DD Not to scale Pin Functions TMUX1133 PIN NAME NO. TYPE (1) DESCRIPTION (2) S2B 1 I/O Source pin 2B. Can be an input or output. S2A 2 I/O Source pin 2A. Can be an input or output. S3B 3 I/O Source pin 3B. Can be an input or output. D3 4 I/O Drain pin 3. Can be an input or output. S3A 5 I/O Source pin 3A. Can be an input or output. EN 6 I Active low logic enable. When this pin is high, all switches are turned off. When this pin is low, the SELx inputs determine switch connection as shown in Table 1. VSS 7 P Negative power supply. This pin is the most negative power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VSS and GND. VSS must be connected to ground for single supply voltage applications. GND 8 P Ground (0 V) reference SEL3 9 I Logic control select pin 3. Controls switch 3 connection as shown in Table 1. SEL2 10 I Logic control select pin 2. Controls switch 2connection as shown in Table 1. SEL1 11 I Logic control select pin 1. Controls switch 1 connection as shown in Table 1. S1A 12 I/O Source pin 1A. Can be an input or output. S1B 13 I/O Source pin 1B. Can be an input or output. D1 14 I/O Drain pin 1. Can be an input or output. D2 15 I/O Drain pin 2. Can be an input or output. VDD 16 P (1) (2) Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND. I = input, O = output, I/O = input and output, P = power Refer to Device Functional Modes for what to do with unused pins Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 3 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com TMUX1134: PW Package 20-Pin TSSOP Top View SEL1 1 20 SEL4 S1A 2 19 S4A D1 3 18 D4 S1B 4 17 S4B V 5 16 V GND 6 15 N.C. S2B 7 14 S3B D2 8 13 D3 S2A 9 12 S3A SEL2 10 11 SEL3 SS DD Not to scale Pin Functions TMUX1134 PIN TYPE (1) DESCRIPTION (2) NAME NO. SEL1 1 I S1A 2 I/O Source pin 1A. Can be an input or output. D1 3 I/O Drain pin 1. Can be an input or output. S1B 4 I/O Source pin 1B. Can be an input or output. VSS 5 P Negative power supply. This pin is the most negative power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VSS and GND. VSS must be connected to ground for single supply voltage applications. GND 6 P .Ground (0 V) reference. S2B 7 I/O Source pin 2B. Can be an input or output. D2 8 I/O Drain pin 2. Can be an input or output. S2A 9 I/O Source pin 2A. Can be an input or output. SEL2 10 I Logic control select pin 2. Controls switch 2 connection as shown in Table 2. SEL3 11 I Logic control select pin 3. Controls switch 3 connection as shown in Table 2. S3A 12 I/O Source pin 3A. Can be an input or output. D3 13 I/O Drain pin 3. Can be an input or output. S3B 14 I/O Source pin 3B. Can be an input or output. N.C. 15 Not Connected VDD 16 P S4B 17 I/O Source pin 4B. Can be an input or output. D4 18 I/O Drain pin 4. Can be an input or output. S4A 19 I/O Source pin 4A. Can be an input or output. SEL4 20 I (1) (2) 4 Logic control select pin 1. Controls switch 1 connection as shown in Table 2. Not Connected. Can be shorted to GND or left floating. Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND. Logic control select pin 4. Controls switch 4 connection as shown in Table 2. I = input, O = output, I/O = input and output, P = power Refer to Device Functional Modes for what to do with unused pins Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) (3) VDD–VSS VDD Supply voltage VSS MIN MAX –0.5 6 UNIT V –0.5 6 V V –3.0 0.3 VSEL or VEN Logic control input pin voltage (EN, SELx) –0.5 6 V ISEL or IEN Logic control input pin current (EN, SELx) –30 30 mA VS or VD Source or drain voltage (SxA, SxB, Dx) –0.5 VDD + 0.5 IS or ID (CONT) Source or drain continuous current (SxA, SxB, Dx) –30 30 mA Tstg Storage temperature –65 150 °C TJ Junction temperature 150 °C (1) (2) (3) V Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum. All voltages are with respect to ground, unless otherwise specified. 7.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±2000 Charged device model (CDM), per JEDEC specification JESD22-C101 or ANSI/ESDA/JEDEC JS-002, all pins (2) ±750 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VDD Positive power supply voltage (single) 1.08 5.5 V VSS Negative power supply voltage (dual) –2.75 0 V VDD - VSS Supply rail voltage difference 1.08 5.5 V VS or VD Signal path input/output voltage (source or drain pin) (SxA, SxB, Dx) VSS VDD V VSEL or VEN Logic control input pin voltage (EN, SELx) 0 5.5 V TA Ambient temperature –40 125 °C 7.4 Thermal Information THERMAL METRIC (1) TMUX1133 TMUX1134 PW (TSSOP) PW (TSSOP) 16 PINS 16 PINS UNIT RθJA Junction-to-ambient thermal resistance 120.6 102.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 51.0 43.1 °C/W RθJB Junction-to-board thermal resistance 66.8 53.6 °C/W ΨJT Junction-to-top characterization parameter 8.7 6.6 °C/W ΨJB Junction-to-board characterization parameter 66.2 53.1 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 5 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com 7.5 Electrical Characteristics (VDD = 5 V ±10 %) at TA = 25°C, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance ΔRON RON On-resistance matching between channels On-resistance flatness FLAT IS(OFF) ID(OFF) ID(ON) IS(ON) Source off leakage current (1) Drain off leakage current (1) Channel on leakage current VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 4 Ω –40°C to +85°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VDD = 5 V Switch Off VD = 4.5 V / 1.5 V VS = 1.5 V / 4.5 V Refer to Off-Leakage Current 25°C VDD = 5 V Switch Off VD = 4.5 V / 1.5 V VS = 1.5 V / 4.5 V Refer to Off-Leakage Current 25°C VDD = 5 V Switch On VD = VS = 4.5 V / 1.5 V Refer to On-Leakage Current 25°C 2 4.5 Ω –40°C to +125°C 4.9 Ω 0.18 Ω –40°C to +85°C 0.4 Ω –40°C to +125°C 0.5 Ω 0.85 Ω –40°C to +85°C 1.6 Ω –40°C to +125°C 1.6 Ω 0.08 nA –40°C to +85°C –0.08 –0.3 0.3 nA –40°C to +125°C –0.9 0.9 nA –0.1 –40°C to +85°C –40°C to +125°C 0.1 nA –0.35 0.35 nA –2 2 nA 0.1 nA –0.35 0.35 nA –2 2 nA 1.49 5.5 V 0 0.87 V –0.1 –40°C to +85°C –40°C to +125°C ±0.003 ±0.003 ±0.003 LOGIC INPUTS (EN, SELx) VIH Input logic high VIL Input logic low IIH IIL Input leakage current 25°C IIH IIL Input leakage current –40°C to +125°C CIN Logic input capacitance –40°C to +125°C ±0.005 25°C µA ±0.05 1 –40°C to +125°C µA pF 2 pF POWER SUPPLY IDD (1) 6 VDD supply current Logic inputs = 0 V or 5.5 V 25°C 0.008 –40°C to +125°C µA 1 µA When VS is 4.5 V, VD is 1.5 V or when VS is 1.5 V, VD is 4.5 V. Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 Electrical Characteristics (VDD = 5 V ±10 %) (continued) at TA = 25°C, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN tOPEN Transition time between channels Break before make time (BBM) tON(EN) tOFF(EN) QC OISO XTALK Enable turn-on time (TMUX1133 Only) Enable turn-off time (TMUX1133 Only) Charge Injection Off Isolation Crosstalk VS = 3 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C VS = 3 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C VS = 3 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C VS = 3 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 12 –40°C to +85°C –40°C to +125°C ns 18 ns 19 ns 8 ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns 12 ns –40°C to +85°C 21 ns –40°C to +125°C 22 ns 6 ns –40°C to +85°C 11 ns –40°C to +125°C 12 ns VS = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –1 pC RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –100 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –90 dB 220 MHz BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CDOFF Drain off capacitance f = 1 MHz 25°C 17 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 7 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com 7.6 Electrical Characteristics (VDD = 3.3 V ±10 %) at TA = 25°C, VDD = 3.3 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX 3.7 UNIT ANALOG SWITCH RON On-resistance ΔRON RON On-resistance matching between channels On-resistance flatness FLAT IS(OFF) ID(OFF) ID(ON) IS(ON) Source off leakage current (1) Drain off leakage current (TMUX1133 Only) (1) Channel on leakage current VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 8.8 Ω –40°C to +85°C 9.5 Ω –40°C to +125°C 9.8 Ω VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VDD = 3.3 V Switch Off VD = 3 V / 1 V VS = 1 V / 3 V Refer to Off-Leakage Current 25°C VDD = 3.3 V Switch Off VD = 3 V / 1 V VS = 1 V / 3 V Refer to Off-Leakage Current 25°C VDD = 3.3 V Switch On VD = VS = 3 V / 1 V Refer to On-Leakage Current 25°C 0.13 Ω –40°C to +85°C 0.4 Ω –40°C to +125°C 0.5 Ω –40°C to +85°C –40°C to +125°C –0.05 1.9 Ω 2 Ω 2.2 Ω 0.05 nA –40°C to +85°C –0.1 0.1 nA –40°C to +125°C –0.7 0.7 nA –0.1 –40°C to +85°C –40°C to +125°C 0.1 nA –0.35 0.35 nA –2 2 nA 0.1 nA –0.35 0.35 nA –2 2 nA 1.35 5.5 V 0 0.8 V –0.1 –40°C to +85°C –40°C to +125°C ±0.001 ±0.005 ±0.005 LOGIC INPUTS (EN, SELx) VIH Input logic high VIL Input logic low IIH IIL Input leakage current 25°C IIH IIL Input leakage current –40°C to +125°C CIN Logic input capacitance –40°C to +125°C ±0.005 25°C µA ±0.05 1 –40°C to +125°C µA pF 2 pF POWER SUPPLY IDD (1) 8 VDD supply current Logic inputs = 0 V or 5.5 V 25°C 0.006 –40°C to +125°C µA 1 µA When VS is 3 V, VD is 1 V or when VS is 1 V, VD is 3 V. Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 Electrical Characteristics (VDD = 3.3 V ±10 %) (continued) at TA = 25°C, VDD = 3.3 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN tOPEN Transition time between channels Break before make time (BBM) tON(EN) tOFF(EN) QC OISO XTALK Enable turn-on time (TMUX1133 Only) Enable turn-off time (TMUX1133 Only) Charge Injection Off Isolation Crosstalk VS = 2 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C VS = 2 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C VS = 2 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C VS = 2 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 14 –40°C to +85°C –40°C to +125°C ns 22 ns 22 ns 9 ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns 15 ns –40°C to +85°C 22 ns –40°C to +125°C 23 ns 8 ns –40°C to +85°C 13 ns –40°C to +125°C 14 ns VS = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –1 pC RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –100 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –90 dB 220 MHz BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CDOFF Drain off capacitance f = 1 MHz 25°C 17 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 9 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com 7.7 Electrical Characteristics (VDD = 2.5 V ±10 %), (VSS = –2.5 V ±10 %) at TA = 25°C, VDD = +2.5 V, VSS = –2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance ΔRON RON On-resistance matching between channels On-resistance flatness FLAT IS(OFF) ID(OFF) ID(ON) IS(ON) Source off leakage current (1) Drain off leakage current (1) Channel on leakage current VS = VSS to VDD ISD = 10 mA Refer to On-Resistance 25°C 4 Ω –40°C to +85°C VS = VSS to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = VSS to VDD ISD = 10 mA Refer to On-Resistance 25°C VDD = +2.5 V, VSS = –2.5 V Switch Off VD = +2 V / –1 V VS = –1 V / +2 V Refer to Off-Leakage Current 25°C VDD = +2.5 V, VSS = –2.5 V Switch Off VD = +2 V / –1 V VS = –1 V / +2 V Refer to Off-Leakage Current 25°C VDD = +2.5 V, VSS = –2.5 V Switch On VD = VS = +2 V / –1 V Refer to On-Leakage Current 25°C 2 4.5 Ω –40°C to +125°C 4.9 Ω 0.18 Ω –40°C to +85°C 0.4 Ω –40°C to +125°C 0.5 Ω 0.85 Ω –40°C to +85°C 1.6 Ω –40°C to +125°C 1.6 Ω 0.08 nA –40°C to +85°C –0.08 –0.3 0.3 nA –40°C to +125°C –0.9 0.9 nA –0.1 –40°C to +85°C –40°C to +125°C 0.1 nA –0.35 0.35 nA –2 2 nA 0.1 nA –0.35 0.35 nA –2 2 nA 1.2 2.75 V 0 0.73 V –0.1 –40°C to +85°C –40°C to +125°C ±0.005 ±0.01 ±0.01 LOGIC INPUTS (EN, SELx) VIH Input logic high VIL Input logic low IIH IIL Input leakage current 25°C IIH IIL Input leakage current –40°C to +125°C CIN Logic input capacitance –40°C to +125°C ±0.005 25°C µA ±0.05 1 –40°C to +125°C µA pF 2 pF POWER SUPPLY IDD ISS (1) 10 VDD supply current VSS supply current Logic inputs = 0 V or 2.75 V Logic inputs = 0 V or 2.75 V 25°C 0.008 –40°C to +125°C 25°C µA 1 0.008 –40°C to +125°C µA µA 1 µA When VS is positive, VD is negative or when VS is negative, VD is positive. Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 Electrical Characteristics (VDD = 2.5 V ±10 %), (VSS = –2.5 V ±10 %) (continued) at TA = 25°C, VDD = +2.5 V, VSS = –2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN tOPEN Transition time between channels Break before make time (BBM) tON(EN) tOFF(EN) QC OISO XTALK Enable turn-on time (TMUX1133 Only) Enable turn-off time (TMUX1133 Only) Charge Injection Off Isolation Crosstalk VS = 1.5 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C VS = 1.5 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C VS = 1.5 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C VS = 1.5 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 12 –40°C to +85°C –40°C to +125°C ns 20 ns 21 ns 8 ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns 12 ns –40°C to +85°C 21 ns –40°C to +125°C 22 ns 6 ns –40°C to +85°C 14 ns –40°C to +125°C 15 ns VS = –1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –1 pC RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –100 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –90 dB 220 MHz BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CDOFF Drain off capacitance f = 1 MHz 25°C 17 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 11 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com 7.8 Electrical Characteristics (VDD = 1.8 V ±10 %) at TA = 25°C, VDD = 1.8 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance ΔRON IS(OFF) ID(OFF) ID(ON) IS(ON) On-resistance matching between channels Source off leakage current (1) Drain off leakage current (1) Channel on leakage current VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C VDD = 1.98 V Switch Off VD = 1.62 V / 1 V VS = 1 V / 1.62 V Refer to Off-Leakage Current 25°C 40 Ω –40°C to +85°C 80 Ω –40°C to +125°C 80 Ω 0.4 Ω –40°C to +85°C 1.5 Ω –40°C to +125°C 1.5 Ω 0.05 nA –40°C to +85°C –0.05 –0.1 0.1 nA –40°C to +125°C –0.5 0.5 nA VDD = 1.98 V Switch Off VD = 1.62 V / 1 V VS = 1 V / 1.62 V Refer to Off-Leakage Current 25°C –0.1 0.1 nA –40°C to +85°C –0.5 0.5 nA –2 2 nA VDD = 1.98 V Switch On VD = VS = 1.62 V / 1 V Refer to On-Leakage Current 25°C –0.1 0.1 nA –40°C to +85°C –0.5 0.5 nA –2 2 nA 1.07 5.5 V 0 0.68 V –40°C to +125°C –40°C to +125°C ±0.003 ±0.005 ±0.005 LOGIC INPUTS (EN, SELx) VIH Input logic high VIL Input logic low IIH IIL Input leakage current 25°C IIH IIL Input leakage current –40°C to +125°C CIN Logic input capacitance –40°C to +125°C ±0.005 25°C µA ±0.05 1 –40°C to +125°C µA pF 2 pF POWER SUPPLY IDD (1) 12 VDD supply current Logic inputs = 0 V or 5.5 V 25°C 0.001 –40°C to +125°C µA 0.85 µA When VS is 1.62 V, VD is 1 V or when VS is 1 V, VD is 1.62 V. Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 Electrical Characteristics (VDD = 1.8 V ±10 %) (continued) at TA = 25°C, VDD = 1.8 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN tOPEN Transition time between channels Break before make time (BBM) tON(EN) tOFF(EN) QC OISO XTALK Enable turn-on time (TMUX1133 Only) Enable turn-off time (TMUX1133 Only) Charge Injection Off Isolation Crosstalk VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C VS = 1 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C VS = 1 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C 28 –40°C to +85°C –40°C to +125°C ns 48 ns 48 ns 16 ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns 28 ns –40°C to +85°C 48 ns –40°C to +125°C 48 ns 16 ns –40°C to +85°C 27 ns –40°C to +125°C 27 ns VS = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –1 pC RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –100 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –90 dB 220 MHz BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CDOFF Drain off capacitance f = 1 MHz 25°C 17 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 13 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com 7.9 Electrical Characteristics (VDD = 1.2 V ±10 %) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C On-resistance matching between channels VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 25°C Source off leakage current (1) VDD = 1.32 V Switch Off VD = 1 V / 0.8 V VS = 0.8 V / 1 V Refer to Off-Leakage Current On-resistance ΔRON IS(OFF) ID(OFF) ID(ON) IS(ON) Drain off leakage current (1) Channel on leakage current 70 –40°C to +85°C –40°C to +125°C Ω 105 Ω 105 Ω 0.4 –40°C to +85°C Ω 1.5 –40°C to +125°C –0.05 ±0.003 Ω 1.5 Ω 0.05 nA –40°C to +85°C –0.1 0.1 nA –40°C to +125°C –0.5 0.5 nA VDD = 1.32 V Switch Off VD = 1 V / 0.8 V VS = 0.8 V / 1 V Refer to Off-Leakage Current 25°C –0.1 0.1 nA –40°C to +85°C –0.5 0.5 nA –2 2 nA VDD = 1.32 V Switch On VD = VS = 1 V / 0.8 V Refer to On-Leakage Current 25°C –0.1 0.1 nA –40°C to +85°C –0.5 0.5 nA –2 2 nA 0.96 5.5 V 0 0.36 V –40°C to +125°C –40°C to +125°C ±0.005 ±0.005 LOGIC INPUTS (EN, SELx) VIH Input logic high VIL Input logic low IIH IIL Input leakage current 25°C IIH IIL Input leakage current –40°C to +125°C CIN Logic input capacitance –40°C to +125°C ±0.005 25°C µA ±0.05 1 –40°C to +125°C µA pF 2 pF POWER SUPPLY IDD (1) 14 VDD supply current Logic inputs = 0 V or 5.5 V 25°C 0.001 –40°C to +125°C µA 0.7 µA When VS is 1 V, VD is 0.8 V or when VS is 0.8 V, VD is 1 V. Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 Electrical Characteristics (VDD = 1.2 V ±10 %) (continued) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN tOPEN VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Transition Time 25°C VS = 1 V RL = 200 Ω, CL = 15 pF Refer to Break-Before-Make 25°C VS = 1 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C Enable turn-off time (TMUX1133 Only) VS = 1 V RL = 200 Ω, CL = 15 pF Refer to tON(EN) and tOFF(EN) 25°C Charge Injection VS = 1 V RS = 0 Ω, CL = 1 nF Refer to Charge Injection 25°C –1 pC RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –100 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –90 dB MHz Transition time between channels Break before make time (BBM) tON(EN) tOFF(EN) QC OISO XTALK Enable turn-on time (TMUX1133 Only) Off Isolation Crosstalk 55 ns –40°C to +85°C 201 ns –40°C to +125°C 201 ns 28 –40°C to +85°C 1 –40°C to +125°C 1 ns ns ns 60 –40°C to +85°C –40°C to +125°C ns 201 ns 201 ns 45 ns –40°C to +85°C 150 ns –40°C to +125°C 150 ns BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C 220 CSOFF Source off capacitance f = 1 MHz 25°C 6 pF CDOFF Drain off capacitance f = 1 MHz 25°C 17 pF CSON CDON On capacitance f = 1 MHz 25°C 20 pF Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 15 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com 7.10 Typical Characteristics at TA = 25°C, VDD = 5 V (unless otherwise noted) 6 5 VDD = 3 V 4.5 4 VDD = 3.63 V On Resistance (:) On Resistance (:) 5 4 VDD = 4.5 V 3 VDD = 5.5 V 2 TA = 85qC 3 2.5 2 1.5 1 1 TA = -40qC 0.5 0 1 2 3 4 VS or VD - Source or Drain Voltage (V) 5 5.5 0 1 2 3 4 VS or VD - Source or Drain Voltage (V) D001 TA = 25°C Figure 1. On-Resistance vs Source or Drain Voltage D002 Figure 2. On-Resistance vs Temperature 8 VDD = 2.25V VSS = -2.25V 4 3.5 7 TA = 85qC 6 On Resistance (:) On Resistance (:) 5 VDD = 5 V 4.5 VDD = 2.5V VSS = -2.5V 3 2.5 2 1.5 5 4 3 1 0.5 0 -3 TA = 125qC 2 VDD = 2.75V VSS = -2.75V 1 TA = -40qC TA = 25qC 0 -2 -1 0 1 2 VS or VD - Source or Drain Voltage (V) 3 0 0.5 D003 1 1.5 2 2.5 3 VS or VD - Source or Drain Voltage (V) VDD = ±2.5 V 3.5 D004 VDD = 3.3 V Figure 3. On-Resistance vs Temperature Figure 4. On-Resistance vs Temperature 80 40 VDD = 1.08 V 70 30 VDD = 1.32 V 20 On-Leakage (pA) 60 On Resistance (:) TA = 25qC 0 0 50 VDD = 1.62 V 40 30 VDD = 1.98 V 20 VDD = 1.32 V 10 VDD = 1.98 V VDD = 3.63 V 0 -10 -20 10 -30 0 -40 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 VS or VD - Source or Drain Voltage (V) 1.8 2 D005 0 0.5 1 1.5 2 2.5 3 3.5 VS or VD - Source or Drain Voltage (V) TA = 25°C 4 D006 TA = 25°C Figure 5. On-Resistance vs Source or Drain Voltage 16 TA = 125qC 3.5 Figure 6. On-Leakage vs Source or Drain Voltage Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 Typical Characteristics (continued) 100 3 80 2 VDD = 2.5V VSS = -2.5V 40 20 Leakage Current (nA) On-Leakage (pA) 60 VDD = 5V VSS = 0V 0 -20 -40 -60 IS(OFF) 1 0 -1 IS(ON) -2 -80 -100 -3 -2 -1 0 1 2 3 VS or VD - Source or Drain Voltage (V) 4 -3 -40 5 -20 0 D007 VDD = 5 V 80 100 120 D008 VDD = 3.3 V Figure 7. On-Leakage vs Source or Drain Voltage Figure 8. Leakage Current vs Temperature 3 0.6 2 0.5 VDD = 5 V IS(OFF) Supply Current (PA) Leakage Current (nA) 20 40 60 Temperature (qC) 1 0 -1 0.4 0.3 VDD = 3.3 V 0.2 VDD = 1.8 V 0.1 IS(ON) -2 0 VDD = 1.2 V -3 -40 -20 0 20 40 60 Temperature (qC) 80 100 -0.1 -40 120 -20 0 D009 VDD = 5 V 40 60 80 Temperature (qC) 100 120 140 D010 VSEL = VDD Figure 9. Leakage Current vs Temperature Figure 10. Supply Current vs Temperature 1600 20 VDD = 5 V VDD = 3.3 V VDD = ±2.5 V VDD = 1.8 V 1200 15 Charge Injection (pC) 1400 Supply Current (PA) 20 1000 800 600 400 200 VDD = 3.3 V VSS = 0 V 10 5 0 -5 -10 VDD = +2.5 V VSS = -2.5 V VDD = 5 V VSS = 0 V -15 0 0 0.5 1 1.5 2 2.5 3 3.5 Logic Voltage (V) 4 4.5 5 -20 -3 -2 D011 TA = 25°C -1 0 1 2 Source Voltage (V) 3 4 5 D012 TA = -40°C to 125°C Figure 11. Supply Current vs Logic Voltage Figure 12. Charge Injection vs Source Voltage Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 17 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com Typical Characteristics (continued) 10 8 4 Magnitude (dB) Charge Injection (pC) 6 VDD = 1.2V 2 0 -2 -4 VDD = 1.8 V -6 -8 -10 0 0.25 0.5 0.75 1 1.25 Source Voltage (V) 1.5 1.75 2 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 100k Off-Isolation Crosstalk 1M D013 TA = -40°C to 125°C 10M Frequency (Hz) 100M D014 TA = -40°C to +125°C Figure 13. Charge Injection vs Source Voltage Figure 14. Xtalk and Off-Isolation vs Frequency 0 -1 Gain (dB) -2 -3 -4 -5 -6 1M 10M Frequency (Hz) 100M D015 TA = -40°C to +125°C Figure 15. On Response vs Frequency 18 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 8 Parameter Measurement Information 8.1 On-Resistance The on-resistance of a device is the ohmic resistance between the source (Sx) and drain (Dx) pins of the device. The on-resistance varies with input voltage and supply voltage. The symbol RON is used to denote on-resistance. The measurement setup used to measure RON is shown in Figure 16. Voltage (V) and current (ISD) are measured using this setup, and RON is computed with RON = V / ISD: V ISD Sx D VS Figure 16. On-Resistance Measurement Setup 8.2 Off-Leakage Current There are two types of leakage currents associated with a switch during the off state: 1. Source off-leakage current 2. Drain off-leakage current Source leakage current is defined as the leakage current flowing into or out of the source pin when the switch is off. This current is denoted by the symbol IS(OFF). Drain leakage current is defined as the leakage current flowing into or out of the drain pin when the switch is off. This current is denoted by the symbol ID(OFF). The setup used to measure both off-leakage currents is shown in Figure 17. VDD VSS VDD 0.1…F 0.1…F VSS 0.1…F 0.1…F Is (OFF) A ID (OFF) S1A S1A D1 D1 S1B S1B VS A VD VD VS VD Is (OFF) A ID (OFF) S4A S4A D4 D4 S4B S4B VS VD VD GND A VD VS GND Figure 17. Off-Leakage Measurement Setup Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 19 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com 8.3 On-Leakage Current Source on-leakage current is defined as the leakage current flowing into or out of the source pin when the switch is on. This current is denoted by the symbol IS(ON). Drain on-leakage current is defined as the leakage current flowing into or out of the drain pin when the switch is on. This current is denoted by the symbol ID(ON). Either the source pin or drain pin is left floating during the measurement. Figure 18 shows the circuit used for measuring the on-leakage current, denoted by IS(ON) or ID(ON). VDD VDD VSS 0.1…F VSS 0.1…F 0.1…F 0.1…F IS (ON) N.C. N.C. ID (ON) S1A D1 S1B S1A A D1 A N.C. VS N.C. S1B VD IS (ON) N.C. N.C. ID (ON) S4A D4 S4B S4A A D4 A N.C. VS N.C. S4B VD GND GND Figure 18. On-Leakage Measurement Setup 8.4 Transition Time Transition time is defined as the time taken by the output of the device to rise or fall 10% after the address signal has risen or fallen past the logic threshold. The 10% transition measurement is utilized to provide the timing of the device. System level timing can then account for the time constant added from the load resistance and load capacitance. Figure 19 shows the setup used to measure transition time, denoted by the symbol tTRANSITION. VDD VSS 0.1…F 0.1…F VDD Log ic Control (VSEL) tf < 5ns tr < 5ns VIH VS VIL 0V S1A D1 OUTPUT S1B RL tTRAN SITION tTRAN SITION VS CL S4A D4 OUTPUT S4B RL 90% OUTPUT CL SEL x 10% VSEL GND 0V Figure 19. Transition-Time Measurement Setup 20 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 8.5 Break-Before-Make Break-before-make delay is a safety feature that prevents two inputs from connecting when the device is switching. The output first breaks from the on-state switch before making the connection with the next on-state switch. The time delay between the break and the make is known as break-before-make delay. Figure 20 shows the setup used to measure break-before-make delay, denoted by the symbol tOPEN(BBM). VDD VSS 0.1…F 0.1…F VDD VSEL tr < 5ns S1A VS tf < 5ns D1 OUTPUT S1B 0V RL S4A VS 90% CL D4 Output OUTPUT S4B tBBM 1 tBBM 2 RL CL 0V tOPEN (BBM) = min ( tBBM 1, tBBM 2) SELx VSEL GND Figure 20. Break-Before-Make Delay Measurement Setup 8.6 tON(EN) and tOFF(EN) Turn-on time is defined as the time taken by the output of the device to rise to 10% after the enable has risen past the logic threshold. The 10% measurement is utilized to provide the timing of the device. System level timing can then account for the time constant added from the load resistance and load capacitance. Figure 21 shows the setup used to measure turn-on time, denoted by the symbol tON(EN). Turn-off time is defined as the time taken by the output of the device to fall to 90% after the enable has fallen past the logic threshold. The 90% measurement is utilized to provide the timing of the device. System level timing can then account for the time constant added from the load resistance and load capacitance. Figure 21 shows the setup used to measure turn-off time, denoted by the symbol tOFF(EN). VDD VSS 0.1…F 0.1…F VDD Enable Control (VEN) VIH VIL tr < 5ns tf < 5ns VS S1A D1 OUTPUT S1B RL CL 0V tOFF (EN) tON (EN) VS S4A D4 OUTPUT S4B 90% RL 90% CL OUTPUT EN 0V VEN GND Figure 21. Turn-On and Turn-Off Time Measurement Setup Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 21 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com 8.7 Charge Injection The TMUX1133 has a transmission-gate topology. Any mismatch in capacitance between the NMOS and PMOS transistors results in a charge injected into the drain or source during the falling or rising edge of the gate signal. The amount of charge injected into the source or drain of the device is known as charge injection, and is denoted by the symbol QC. Figure 22 shows the setup used to measure charge injection from source (Sx) to drain (D). VDD VSS 0.1…F VDD VS VEN 0.1…F S1A D1 OUTPUT S1B VOUT CL 0V VS Output QC = CL × D4 OUTPUT S4B VOUT VS S4A VOUT CL VOUT EN VEN GND Figure 22. Charge-Injection Measurement Setup 8.8 Off Isolation Off isolation is defined as the ratio of the signal at the drain pin (D) of the device when a signal is applied to the source pin (Sx) of an off-channel. Figure 23 shows the setup used to measure, and the equation used to calculate off isolation. VDD VSS 0.1µF 0.1µF NETWORK VS ANALYZER 50Ÿ S VSIG D VOUT RL 50Ÿ SxA / SxB / Dx GND RL 50Ÿ Figure 23. Off Isolation Measurement Setup Off Isolation 22 §V · 20 ˜ Log ¨ OUT ¸ V © S ¹ (1) Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 8.9 Crosstalk Crosstalk is defined as the ratio of the signal at the drain pin (D) of a different channel, when a signal is applied at the source pin (Sx) of an on-channel. Figure 24 shows the setup used to measure, and the equation used to calculate crosstalk. VDD VSS 0.1µF 0.1µF S1A D1 S4A D4 NETWORK ANALYZER VOUT RL 50Ÿ RL 50Ÿ VS RL 50Ÿ 50Ÿ SxA / SxB / Dx VSIG = 200 mVpp VBIAS = VDD / 2 RL GND 50Ÿ Figure 24. Crosstalk Measurement Setup §V · 20 ˜ Log ¨ OUT ¸ © VS ¹ Channel-to-Channel Crosstalk (2) 8.10 Bandwidth Bandwidth is defined as the range of frequencies that are attenuated by less than 3 dB when the input is applied to the source pin (Sx) of an on-channel, and the output is measured at the drain pin (D) of the device. Figure 25 shows the setup used to measure bandwidth. VDD VSS 0.1µF 0.1µF NETWORK VS ANALYZER 50Ÿ S VSIG D VOUT RL SxA / SxB / Dx 50Ÿ GND RL 50Ÿ Figure 25. Bandwidth Measurement Setup Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 23 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com 9 Detailed Description 9.1 Overview The TMUX1133 contains three independently controlled single-pole double-throw (SPDT) switches and has an active low EN pin to enable or disable all three switches simultaneously. The TMUX1134 contains four independently controlled SPDT switches. 9.2 Functional Block Diagram TMUX1133 S1A S1B TMUX1134 D1 SEL1 S2A S2B D2 SEL2 S3A S3B D3 SEL3 EN S1A S1B D1 SEL1 S2A S2B D2 SEL2 S3A S3B D3 SEL3 S4A S4B D4 SEL4 Figure 26. TMUX1133 Functional Block Diagram 9.3 Feature Description 9.3.1 Bidirectional Operation The TMUX113x devices conduct equally well from source (Sx) to drain (Dx) or from drain (Dx) to source (Sx). Each channel has very similar characteristics in both directions and supports both analog and digital signals. 9.3.2 Rail to Rail Operation The valid signal path input/output voltage for TMUX113x ranges from VSS to VDD. For single supply applications VSS can be connected to GND. 9.3.3 1.8 V Logic Compatible Inputs The TMUX113x devices have 1.8-V logic compatible control for all logic control inputs. The logic input thresholds scale with supply but still provide 1.8-V logic control when operating at 5.5 V supply voltage. 1.8-V logic level inputs allows the TMUX113x devices to interface with processors that have lower logic I/O rails and eliminates the need for an external translator, which saves both space and BOM cost. The current consumption of the TMUX113x devices increase when using 1.8V logic with higher supply voltage as shown in Figure 11. For more information on 1.8 V logic implementations refer to Simplifying Design with 1.8 V logic Muxes and Switches 9.3.4 Fail-Safe Logic The TMUX113x devices support Fail-Safe Logic on the control input pins (SELx and EN) allowing for operation up to 5.5 V, regardless of the state of the supply pins. This feature allows voltages on the control pins to be applied before the supply pins, protecting the device from potential damage. Fail-Safe Logic minimizes system complexity by removing the need for power supply sequencing on the logic control pins. For example, the FailSafe Logic feature allows the select pins of the TMUX113x devices to be ramped to 5.5 V while VDD = 0 V. Additionally, the feature enables operation of the TMUX113x devices with VDD = 1.2 V while allowing the select pins to interface with a logic level of another device up to 5.5 V. 24 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 Feature Description (continued) 9.3.5 Ultra-low Leakage Current The TMUX1133 and TMUX1134 provide extremely low on-leakage and off-leakage currents. The TMUX113x devices are capable of switching signals from high source-impedance inputs into a high input-impedance op amp with minimal offset error because of the ultra-low leakage currents. Figure 27 shows typical leakage currents of the TMUX113x devices versus input voltage. 40 30 On-Leakage (pA) 20 VDD = 1.32 V 10 VDD = 1.98 V VDD = 3.63 V 0 -10 -20 -30 -40 0 0.5 1 1.5 2 2.5 3 3.5 VS or VD - Source or Drain Voltage (V) 4 D006 Figure 27. Leakage Current vs Input Voltage 9.3.6 Ultra-low Charge Injection The TMUX113x devices have a transmission gate topology, as shown in Figure 28. Any mismatch in the stray capacitance associated with the NMOS and PMOS causes an output level change whenever the switch is opened or closed. The TMUX113x devices have special charge-injection cancellation circuitry that reduces the source-to-drain charge injection to -1 pC at VS = 1 V as shown in Figure 29. 20 OFF ON CGSN D S CGDP CGSP Charge Injection (pC) 15 CGDN 5 0 -5 -10 Figure 28. Transmission Gate Topology VDD = +2.5 V VSS = -2.5 V VDD = 5 V VSS = 0 V -15 -20 -3 OFF ON VDD = 3.3 V VSS = 0 V 10 -2 -1 0 1 2 Source Voltage (V) 3 4 5 D012 Figure 29. Charge Injection vs Source Voltage Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 25 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com 9.4 Device Functional Modes The select (SELx) pins are logic pins that control the connection between the source (SxA, SxB) and drain (Dx) pins of the TMUX113x devices. When a source pin is not selected that pin is in an open state (HI-Z). When a source pin is selected the switch conducts to drain. The logic control pins can be as high as 5.5 V. When the EN pin of the TMUX1133 is pulled low the SELx logic control inputs determine which source input is selected. When the EN pin is pulled high, all of the switches are in an open state regardless of the state of the SELx logic control inputs. The TMUX1134 SELx logic control inputs determine which source pin is connected to the drain pin for each channel. The TMUX113x devices can be operated without any external components except for the supply decoupling capacitors. Unused logic control pins must be tied to GND or VDD in order to ensure the device does not consume additional current as highlighted in Implications of Slow or Floating CMOS Inputs. Unused signal path inputs (SxA, SxB or Dx) should be connected to GND. 9.5 Truth Tables Table 1 and Table 2 show the truth tables for the TMUX1133 and TMUX1134 respectively. Table 1. TMUX1133 Truth table (1) (1) EN SEL1 SEL2 SEL3 Selected Source Pins Connected To Drain Pins 0 0 X X S1A to D1 0 1 X X S1B to D1 0 X 0 X S2A to D2 0 X 1 X S2B to D2 0 X X 0 S3A to D3 0 X X 1 S3B to D3 1 X X X Hi-Z (OFF) X denotes don't care. Table 2. TMUX1134 Truth table (1) (1) 26 SEL1 SEL2 SEL3 SEL4 Selected Source Pins Connected To Drain Pins 0 X X X S1B to D1 1 X X X S1A to D1 X 0 X X S2B to D2 X 1 X X S2A to D2 X X 0 X S3B to D3 X X 1 X S3A to D3 X X X 0 S4B to D4 X X X 1 S4A to D4 X denotes don't care. Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 10 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 10.1 Application Information The TMUX11xx family offers ultra-low input/output leakage currents and low charge injection. These devices operate up to 5.5 V, and offer true rail-to-rail input and output switching of both analog and digital signals. The TMUX113x devices have low on-capacitance which allows faster settling time when switching between inputs in the time domain. These features make the TMUX11xx devices a family of precision, high-performance switches and multiplexers for low-voltage applications. 10.2 Typical Application Figure 30 shows an example circuit where the TMUX1133 or TMUX1134 can be used to minimize board space by integrating various applications into a multi-channel 2:1 (SPDT) switch. The application uses a 3-channel, or 4-channel SPDT switch in order to optimize the tradeoffs of system flexibility and board space. 0.1µF VDD VSS 0.1µF System 0 V-5 V Voltage Input S1A D1 Calibration Path S1B SEL1 Precision DAC + To µC RPD 10 k 0 V-5 V Voltage Input S2A 4-20 mA Current Input S2B D2 SEL2 250 0 V-5 V To µC 0 V-5 V Precision ADC - + To µC RPD 10 k Analog Input / Output Op Amp Op Amp Precision ADC - S4A Voltage Input S4B Voltage Ouput Precision ADC D4 SEL4 Precision DAC RPD 10 k Figure 30. Multi-channel 2:1, Switching Applications 10.3 Design Requirements For this design example, use the parameters listed in Table 3. Table 3. Design Parameters PARAMETERS VALUES Supply (VDD) 5V Input / Output Voltage range 0 V to 5V Input / Output Current range 4 mA to 20 mA Control logic thresholds 1.8 V compatible Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 27 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com 10.4 Detailed Design Procedure The TMUX113x devices can be operated without any external components except for the supply decoupling capacitors, however pull-down or pull-up resistors are recommended on the logic control inputs to ensure each channel is in a known state. All inputs passing through the switch must fall within the recommend operating conditions, including signal range and continuous current. For this design with a single supply of 5 V the signal range can be 0 V to 5 V, and the max continuous current can be 30 mA. Industrial applications such as in Factory Automation & Control and Test & Measurement benefit from using a multi-channel 2:1 switch because it allows additional flexibility in the design. A single 2:1 switch has numerous applications such as: 1. Switching between an analog signal path and a calibration path in order to ensure the system is calibrated across the life of a product or after installation. 2. Configuring a single channel to accept either a voltage or current input through software - allowing for system flexibility across applications where the end users input signals may differ. 3. Allowing a single channel to be configured as either an analog input or analog output. Providing additional control to a system while minimizing the number of physical connectors Figure 30 shows how to configure a multi-channel analog switch to address these design implementations for additional control and flexibility in the system. The on-resistance of the TMUX113x devices is very low, 2Ω typical, and has a max on-leakage current of 2nA which allows the devices to be used in precision measurement applications. A system with a 4mA to 20mA signal can achieve >20bits of precision due to the extremely low leakage current of the TMUX113x devices. 10.5 Application Curve The TMUX113x devices are capable of switching signals with minimal distortion because of the ultra-low leakage currents and low on-resistance. Figure 31 shows how the leakage current of the TMUX113x varies with different input voltages. 100 80 On-Leakage (pA) 60 VDD = 2.5V VSS = -2.5V 40 20 VDD = 5V VSS = 0V 0 -20 -40 -60 -80 -100 -3 -2 -1 0 1 2 3 VS or VD - Source or Drain Voltage (V) 4 5 D007 TA = 25°C Figure 31. On-Leakage vs Source or Drain Voltage 28 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 11 Power Supply Recommendations The TMUX113x devices operate across a wide supply range of 1.08 V to 5.5 V single supply, or ±2.75 V for dual supply applications. For single supply voltage applications VSS must be connected to GND. Do not exceed the absolute maximum ratings because stresses beyond the listed ratings can cause permanent damage to the devices. Power-supply bypassing improves noise margin and prevents switching noise propagation from the VDD and VSS supplies to other components. Good power-supply decoupling is important to achieve optimum performance. For improved supply noise immunity, use a supply decoupling capacitor ranging from 0.1 μF to 10 μF from VDD and VSS to ground. Place the bypass capacitors as close to the power supply pins of the device as possible using low-impedance connections. TI recommends using multi-layer ceramic chip capacitors (MLCCs) that offer low equivalent series resistance (ESR) and inductance (ESL) characteristics for power-supply decoupling purposes. For very sensitive systems, or for systems in harsh noise environments, avoiding the use of vias for connecting the capacitors to the device pins may offer superior noise immunity. The use of multiple vias in parallel lowers the overall inductance and is beneficial for connections to ground planes. 12 Layout 12.1 Layout Guidelines 12.1.1 Layout Information When a PCB trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs primarily because of the change of width of the trace. At the apex of the turn, the trace width increases to 1.414 times the width. This increase upsets the transmission-line characteristics, especially the distributed capacitance and self–inductance of the trace which results in the reflection. Not all PCB traces can be straight and therefore some traces must turn corners.Figure 32 shows progressively better techniques of rounding corners. Only the last example (BEST) maintains constant trace width and minimizes reflections. BETTER BEST 2W WORST 1W min. W Figure 32. Trace Example Route high-speed signals using a minimum of vias and corners which reduces signal reflections and impedance changes. When a via must be used, increase the clearance size around it to minimize its capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of picking up interference from the other layers of the board. Be careful when designing test points, throughhole pins are not recommended at high frequencies. Figure 33 and Figure 34 illustrate examples of a PCB layout with the TMUX1133 and TMUX1134 respectively. Some key considerations are: • • • • Decouple the VDD and VSS pins with a 0.1-µF capacitor, placed as close to the pin as possible. Make sure that the capacitor voltage rating is sufficient for the supply voltage. Keep the input lines as short as possible. Use a solid ground plane to help reduce electromagnetic interference (EMI) noise pickup. Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when necessary. Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 29 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com 12.2 Layout Example Figure 33 shows an example board layout for the TMUX1133. Via to GND plane C S2B S2A D2 S3B D1 D3 Wide (low inductance) trace for power C VDD TMUX1133 Wide (low inductance) trace for power S1B S3A S1A EN SEL1 VSS SEL2 GND SEL3 Figure 33. TMUX1133 Layout Example Figure 34 shows an example board layout for the TMUX1134. Via to GND plane SEL1 SEL4 S1A S4A D1 C Wide (low inductance) trace for power TMUX1134 D4 S1B S4B VSS VDD GND N.C. S2B S3B D2 D3 S2A S3A SEL2 SEL3 C Wide (low inductance) trace for power Figure 34. TMUX1134 Layout Example 30 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 TMUX1133, TMUX1134 www.ti.com SCDS412A – JUNE 2019 – REVISED AUGUST 2019 13 Device and Documentation Support 13.1 Documentation Support 13.1.1 Related Documentation Texas Instruments, Ultrasonic Gas Meter Front-End With MSP430™ Reference Design. Texas Instruments, True Differential, 4 x 2 MUX, Analog Front End, Simultaneous-Sampling ADC Circuit. Texas Instruments, Improve Stability Issues with Low CON Multiplexers. Texas Instruments, Simplifying Design with 1.8 V logic Muxes and Switches. Texas Instruments, Eliminate Power Sequencing with Powered-off Protection Signal Switches. Texas Instruments, System-Level Protection for High-Voltage Analog Multiplexers. Texas Instruments, QFN/SON PCB Attachment. Texas Instruments, Quad Flatpack No-Lead Logic Packages. 13.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to order now. Table 4. Related Links PARTS PRODUCT FOLDER ORDER NOW TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY TMUX1133 Click here Click here Click here Click here Click here TMUX1134 Click here Click here Click here Click here Click here 13.3 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 13.4 Community Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 13.5 Trademarks E2E is a trademark of Texas Instruments. 13.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 13.7 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 31 TMUX1133, TMUX1134 SCDS412A – JUNE 2019 – REVISED AUGUST 2019 www.ti.com 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 32 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Product Folder Links: TMUX1133 TMUX1134 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TMUX1133PWR ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TM1133 TMUX1134PWR ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 TM1134 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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TMUX1133PWR
  •  国内价格 香港价格
  • 1+29.290811+3.63352
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  • 100+17.02850100+2.11238
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TMUX1133PWR
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    TMUX1133PWR
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      • 1+14.13720
      • 10+12.18530
      • 30+10.96100
      • 100+9.41090
      • 500+8.86190
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