TPA3111D1PWP

Product Folder Sample & Buy Support & Community Tools & Software Technical Documents TPA3111D1 SLOS618F – AUGUST 2009 – REVISED JULY 2016 TPA3111D1 10-W Filter-Free Mono Class-D Audio Power Amplifier With Speaker Guard™ 1 Features 3 Description • The TPA3111D1 device is a 10-W, efficient, Class-D audio power amplifier for driving a bridge tied speaker. Advanced EMI suppression technology enables the use of inexpensive ferrite bead filters at the outputs while meeting EMC requirements. SpeakerGuard speaker protection system includes an adjustable power limiter and a DC detection circuit. The adjustable power limiter lets the user to set a virtual voltage rail lower than the chip supply to limit the current through the speaker. The DC Detect circuit measures the frequency and amplitude of the PWM signal and shuts off the output stage if the input capacitors are damaged or shorts exist on the inputs. 1 • • • • • • • • • • 10-W into an 8-Ω Load at 10% THD+N From a 12-V Supply 7-W into an 4-Ω Load at 10% THD+N From a 8-V Supply 94% Efficient Class-D Operation into 8-Ω Load Eliminates Need for Heat Sinks Wide Supply Voltage Range Allows Operation from 8 to 26 V Filter-Free Operation SpeakerGuard™ Speaker Protection Includes Adjustable Power Limiter Plus DC Protection Flow-Through Pinout Facilitates Easy Board Layout Robust Pin-to-Pin Short-Circuit Protection and Thermal Protection With Auto-Recovery Option Excellent THD+N and Pop-Free Performance Four Selectable, Fixed Gain Settings Differential Inputs The TPA3111D1 can drive a mono speaker as low as 4 Ω. The high efficiency of the TPA3111D1, >90%, eliminates the requirement for an external heat sink when playing music. The outputs are fully protected against shorts to GND, VCC, and output-to-output. The short-circuit protection and thermal protection includes an autorecovery feature. 2 Applications • • • Device Information(1) PART NUMBER Televisions Monitors and Laptops Consumer Audio Equipment TPA3111D1 PACKAGE HTSSOP (28) BODY SIZE (NOM) 4.40 mm × 9.70 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Application Diagram 1uF Audio Source OUT+ INP OUT - INN TPA3111D1 OUTP OUTN FERRITE BEAD FILTER 10W 8Ω GAIN0 GAIN1 PLIMIT Fault SD PVCC 8 to 26V Copyright © 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPA3111D1 SLOS618F – AUGUST 2009 – REVISED JULY 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 4 4 5 5 5 5 6 6 7 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. DC Characteristics – VCC = 24 V .............................. DC Characteristics – VCC = 12 V .............................. AC Characteristics – VCC = 24 V .............................. AC Characteristics – VCC = 12 V .............................. Typical Characteristics .............................................. Detailed Description ............................................ 10 7.1 Overview ................................................................. 10 7.2 Functional Block Diagram ....................................... 11 7.3 Feature Description................................................. 11 7.4 Device Functional Modes........................................ 14 8 Application and Implementation ........................ 15 8.1 Application Information............................................ 15 8.2 Typical Application .................................................. 15 9 Power Supply Recommendations...................... 20 10 Layout................................................................... 21 10.1 Layout Guidelines ................................................. 21 10.2 Layout Example .................................................... 22 11 Device and Documentation Support ................. 23 11.1 11.2 11.3 11.4 11.5 11.6 11.7 Device Support...................................................... Documentation Support ........................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 23 23 23 23 23 23 23 12 Mechanical, Packaging, and Orderable Information ........................................................... 23 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision E (August 2012) to Revision F • Page Added Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section....................................... 1 Changes from Revision D (July 2012) to Revision E Page • Changed 0.1 mF to 0.1 µF and 220 mF to 220 µF .............................................................................................................. 20 • Changed 0.1 mF to 0.1 µF and 1 mF to 1 µF ...................................................................................................................... 21 Changes from Revision C (October 2010) to Revision D • Added a 100-kΩ resistor to AVCC (Pin 14) and Note 1 to Figure 17................................................................................... 15 Changes from Revision B (August 2010) to Revision C • Page Page Added < 10 V/ms to VI ............................................................................................................................................................ 4 Changes from Revision A (July 2010) to Revision B Page • Replaced the Dissipations Ratings Table with the Thermal Information Table...................................................................... 5 • Changed the 220-nf capacitor rated for at least 25 V to 470-nF capacitor rated to at least 16 V ....................................... 19 Changes from Original (August 2009) to Revision A • 2 Page Added slew rate adjustment information .............................................................................................................................. 11 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: TPA3111D1 TPA3111D1 www.ti.com SLOS618F – AUGUST 2009 – REVISED JULY 2016 5 Pin Configuration and Functions PWP Package 28-Pin HTSSOP Top View SD 1 28 PVCC FAULT 2 27 PVCC GND 3 26 BSN GND 4 25 OUTN GAIN0 5 24 PGND GAIN1 6 23 OUTN AVCC 7 22 BSN AGND 8 21 BSP GVDD 9 20 OUTP PLIMIT 10 19 PGND INN 11 18 OUTP INP 12 17 BSP NC 13 16 PVCC AVCC 14 15 PVCC Not to scale Pin Functions PIN I/O DESCRIPTION NAME NO. AGND 8 — Analog supply ground. Connect to the thermal pad. AVCC 7 P Analog supply. A 100-kΩ resistor in series with AVCC is needed if the PVCC slew rate is greater than 10 V/ms. AVCC 14 P Connect AVCC supply to this pin. BSP 17 I Bootstrap I/O for positive high-side FET. BSP 21 I Bootstrap I/O for positive high-side FET. BSN 22 I Bootstrap I/O for negative high-side FET. BSN 26 I Bootstrap I/O for negative high-side FET. FAULT 2 O Open-drain output used to display short-circuit or DC Detect Fault status. Voltage compliant to AVCC. Short-circuit faults can be set to auto-recovery by connecting FAULT pin to SD pin. Otherwise both shortcircuit faults and DC Detect Faults must be reset by cycling PVCC. GAIN0 5 I Gain select least significant bit. TTL logic levels with compliance to AVCC. GAIN1 6 I Gain select most significant bit. TTL logic levels with compliance to AVCC. GND 3 — Connect to local ground GND 4 — Connect to local ground GVDD 9 O High-side FET gate drive supply. Nominal voltage is 7 V. Can also be used as supply for PLILMIT divider. Add a 1-µF capacitor to ground at this pin. INP 12 I Positive audio input. Biased at 3 V. INN 11 I Negative audio input. Biased at 3 V. NC 13 — Not connected Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: TPA3111D1 3 TPA3111D1 SLOS618F – AUGUST 2009 – REVISED JULY 2016 www.ti.com Pin Functions (continued) PIN I/O DESCRIPTION NAME NO. OUTP 18 O Class-D H-bridge positive output. OUTP 20 O Class-D H-bridge positive output. OUTN 23 O Class-D H-bridge negative output. OUTN 25 O Class-D H-bridge negative output. PGND 24 — Power ground for the H-bridges. PGND 19 — Power ground for the H-bridges. PLIMIT 10 I Power limit level adjust. Connect directly to GVDD pin for no power limiting. Add a 1-µF capacitor to ground at this pin. PVCC 15 P Power supply for H-bridge. PVCC pins are also connected internally. PVCC 16 P Power supply for H-bridge. PVCC pins are also connected internally. PVCC 27 P Power supply for H-bridge. PVCC pins are also connected internally. PVCC 28 P Power supply for H-bridge. PVCC pins are also connected internally. SD 1 I Shutdown logic input for audio amplifier (LOW = outputs Hi-Z, HIGH = outputs enabled). TTL logic levels with compliance to AVCC. 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) Supply voltage, VCC AVCC, PVCC SD, FAULT, GAIN0, GAIN1, AVCC (Pin 14) (2) Interface pin voltage, VI Minimum load resistance, RL MIN MAX UNIT –0.3 30 V –0.3 VCC + 0.3