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TPS1H000AQDGNRQ1

TPS1H000AQDGNRQ1

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    HVSSOP8_EP

  • 描述:

    IC PWR DRIVER N-CHAN 1:1 8MSOP

  • 数据手册
  • 价格&库存
TPS1H000AQDGNRQ1 数据手册
Order Now Product Folder Support & Community Tools & Software Technical Documents TPS1H000-Q1 SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 TPS1H000-Q1 40-V, 1-Ω, Single-Channel Smart High-Side Switch 1 Features 2 Applications • • • • • • 1 • • • • • • • • Qualified for Automotive Applications AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range – Device HBM ESD Classification Level H2 – Device CDM ESD Classification Level C4B Single-Channel 1000-mΩ Smart High-Side Switch Wide Operating Voltage: 3.4 V to 40 V Low Standby Current: T(SD). current limit is removed when IN is high. Connect to GND directly When hitting a current limit, the output current holds at the setting current, but latches off after a preset DELAY time (tdl1+ tdl2). tdl1 is the default delay time; tdl2 is a capacitor-configurable delay time. Connect to GND through a capacitor FAULT clears when IN turns low for a duration longer than tFAULT. The output stays latched off regardless of whether the current limit is removed. The output recovers only when IN is toggling. Auto-retry When hitting a current limit, the output current FAULT clears when IN turns low for a holds at the setting current, but periodically comes duration longer than tFAULT OR when the on for thic(on) and turns off for thic(off). current limit is removed for thic(on) External pullup 7.3.2.1 Holding Mode Holding mode is active when the DELAY pin connects to GND directly. When hitting a current limit, the output current holds at the setting current. The device enters into thermal shutdown mode when TJ > T(SD). DELAY TPS1H000-Q1 Figure 14. Holding Mode Connection IOUT tCL(deg) Holding the current VFAULT Current Limit Figure 15. Holding Mode Example 7.3.2.2 Latch-Off Mode Latch-off mode is active when the DELAY pin connects to GND through a capacitor. When hitting a current limit, the output current holds at the setting current, but latches off after a preset DELAY time (tdl1+ tdl2). tdl1 is the default delay time, tdl2 is a configurable delay time set by a capacitor. The output stays latched off regardless of whether the current limit is removed. The output recovers only when IN is toggling. tdl2 can be calculated by Equation 2. The Idl(chg)is the device charging current in latch-off mode, Vdl(ref) is the internal reference voltage in latch off mode, tdl2 is the user-setting delay time, and CDELAY is the capacitor connected on the DELAY pin. 12 Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 TPS1H000-Q1 www.ti.com CDELAY SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 I dl chg u t dl2 Vdl ref (2) DELAY TPS1H000-Q1 Figure 16. Latch-Off-Mode Connection IOUT tdl2 tCL(deg) tdl1 Latch off VFAULT Current Limit Figure 17. Latch-Off-Mode Example 7.3.2.3 Auto-Retry Mode Auto-retry mode is active when the DELAY pin is externally pulled up. The pullup voltage must be higher than Vdl(th). When hitting the current limit, the output current holds at the setting current, but periodically comes on for thic(on) and turns off for thic(off). DELAY TPS1H000-Q1 Figure 18. Auto-Retry-Mode Connection IOUT tCL(deg) thic(on) thic(off) tCL(deg) thic(on) thic(off) VFAULT Current Limit Figure 19. Auto-Retry-Mode Example 7.3.3 Standalone Operation In a typical application, the TPS1H000-Q1 device is controlled by a microcontroller. The device also supports standalone operation. IN and DIAG_EN have a 40-V maximum dc rating, and can be connected to the VS pin directly. In auto-retry mode, the DELAY pin can also be connected to the VS pin through a 100-kΩ resistor. Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 13 TPS1H000-Q1 SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 www.ti.com 3.4V - 40V IN DIAG_EN 1 8 2 7 Tab FAULT 3 6 CL 4 5 VS OUT Load GND DELAY Figure 20. Standalone Operation in Latch-Off Mode 3.4V - 40V IN DIAG_EN 1 8 2 7 Tab FAULT 3 6 CL 4 5 VS OUT Load GND DELAY Figure 21. Standalone Operation in Auto-Retry Mode 7.3.4 Fault Truth Table The DIAG_EN pin enables or disables the diagnostic functions. If multiple devices are used, but the ADC resource is limited in the microcontroller, the microcontroller can use GPIOs to set DIAG_EN high to enable the diagnostics of one device while disabling the diagnostics of the other devices by setting DIAG_EN low. In addition, the device can keep the power consumption to a minimum by setting DIAG_EN and IN low. Table 2 applies when the DIAG_EN pin is enabled. Table 3 applies when the DIAG_EN pin is disabled. 14 Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 TPS1H000-Q1 www.ti.com SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 Table 2. Fault Truth Table CONDITION IN OUT CRITERION FAULT L L — H H H — H H L Current limit triggered. L See Table 1. H H IOUT < l(ol,on) L FAULT clears when IN turns low for a duration longer than tFAULT. OR FAULT clears when the open load is removed. L (1) H VVS – VOUT < V(ol,off) L FAULT clears when IN is toggling OR FAULT clears when the open load is removed. Thermal shutdown H — Thermal shutdown triggered L FAULT clears when IN turns low for a duration longer than tFAULT. OR FAULT clears when thermal shutdown quits. Thermal swing H — Thermal swing triggered L FAULT clears when IN turns low for a duration longer than tFAULT. OR FAULT clears when thermal swing quits. Normal Overload or short to GND Open load or short to battery (1) FAULT RECOVERY — An external pullup is required for open-load detection. Table 3. DIAG_EN Disabled Condition DIAG_EN LOW IN PROTECTIONS AND DIAGNOSTICS ON Diagnostics disabled, full protections OFF Diagnostics disabled, no protection 7.3.5 Full Diagnostics 7.3.5.1 Short-to-GND and Overload Detection When the output is on, a short to GND or an overload condition causes overcurrent. If the overcurrent triggers either the internal or external current-limit threshold, a fault condition is reported out as FAULT pin = low. 7.3.5.2 Open-Load Detection 7.3.5.2.1 Output On When the output is on, if the current flowing through the output IOUT < l(ol,on), the device recognizes an open-load fault. For open-load detection in output on, no external circuitry is required. 7.3.5.2.2 Output Off When the output is off, if a load is connected, the output is pulled down to GND. But if an open load occurs, the output voltage is close to the supply voltage (VVS – VOUT < V(ol,off)), and the device recognizes an open-load fault. There is always a leakage current I(ol,off) present on the output due to the internal logic control path or external humidity, corrosion, and so forth. So an external pullup resistor is recommended to offset the leakage current when an open load is detected. The recommended pullup resistance is 15 kΩ. Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 15 TPS1H000-Q1 SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 www.ti.com Open Load Detection in Off-State R(pullup) V(ol,off) Vds Load Figure 22. Open-Load Detection in Output Off 7.3.5.3 Short-to-Battery Detection Short-to-battery has the same detection mechanism and behavior as open-load detection, in both the on-state and off-state. 7.3.5.4 Thermal Fault Detection To protect the device in severe power stressing cases, the device implements two types of thermal fault detection, absolute temperature protection (thermal shutdown) and dynamic temperature protection (thermal swing). Thermal behaviors after Short to GND IN TJ T(SD) T(hys) T(SD,rst) T(hys) T(SW) ICL ICL(TSD) IOUT FAULT Figure 23. Thermal Behavior Diagram 7.3.5.4.1 Thermal Shutdown Thermal shutdown is active when the absolute temperature TJ > T(SD). When thermal shutdown occurs, the output turns off. 16 Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 TPS1H000-Q1 www.ti.com SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 7.3.5.4.2 Thermal Swing Thermal swing activates when the power FET temperature is increasing sharply, that is, when ΔT = T(FET) – T(Logic) > T(sw), then the output turns off. The output automatically recovers and the fault signal clears when ΔT = T(FET) – T(Logic) < T(sw) – T(hys). The thermal swing function improves the device reliability when subjected to repetitive fast thermal variation. 7.3.5.4.3 Fault Report Holding When using PWM dimming, FAULT is easily cleared by the PWM falling edge. Even if the fault condition remains all the time, FAULT is discontinuous. To avoid this unexpected fault report behavior, the device implements faultreport holding time. Figure 24 shows a typical issue when PWM dimming, the FAULT is cleared unexpectedly even when the short-to-GND still exists. The TPS1H000-Q1 device with fault-report holding function allows the right behavior as shown in Figure 25. Short-to-GND IN Fault cleared FAULT Figure 24. Without Fault-Report Holding Short-to-GND IN Fault not cleared t < tFAULT FAULT Figure 25. With Fault-Report Holding 7.3.6 Full Protections 7.3.6.1 UVLO Protection The device monitors the supply voltage, VVS, to prevent unpredicted behaviors when VVS is too low. When VVS falls down to VVS(uvf), the device shuts down. When VVS rises up to VVS(uvr), the device turns on. 7.3.6.2 Inductive Load Switching Off Clamp When switching an inductive load off, the inductive reactance tends to pull the output voltage negative. Excessive negative voltage could cause the power FET to break down. To protect the power FET, an internal clamp between drain and source is implemented, namely VDS(clamp). Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 17 TPS1H000-Q1 SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 www.ti.com VS VDS(clamp) OUT L R GND + Figure 26. Drain-to-Source Clamping Structure IN VVS VOUT VDS(clamp) IOUT t(decay) Figure 27. Inductive-Load Switching-Off Diagram 7.3.6.3 Loss-of-GND Protection When loss of GND occurs, the output is shut down regardless of whether the IN pin is high or low. The device can protect against two ground-loss conditions, loss of device GND and loss of module GND. 7.3.6.4 Loss-of-Power-Supply Protection When loss of supply occurs, the output is shut down regardless of whether the IN pin is high or low. For a resistive or a capacitive load, loss of supply has no risk. But for a charged inductive load, the current is driven from all the logic control pins to maintain the inductance current. To protect the system in this condition, TI recommends protection with an external free-wheeling diode. 18 Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 TPS1H000-Q1 www.ti.com SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 Vs VS MCU IOs High-side Switch OUT D L Figure 28. Protection for Loss of Power Supply 7.3.6.5 Reverse-Current Protection Reverse current occurs in two conditions: short to supply and reverse polarity. • When a short to the supply occurs, there is only reverse current through the body diode. IR(1) specifies the limit of the reverse current. • In a reverse-polarity condition, there are reverse currents through the body diode and the device GND pin. IR(2) specifies the limit of the reverse current. To protect the device, TI recommends two types of external circuitry. • Adding a blocking diode (method 1). Both the device and load are protected when in reverse polarity. • Adding a GND network (method 2). The reverse current through the device GND is blocked. The reverse current through the FET is limited by the load itself. TI recommends a resistor in parallel with the diode as a GND network. The recommended configuration is a 1-kΩ resistor in parallel with a >100-mA diode. The reverse current protection diode in the GND network forward voltage should be less than 0.6 V in any circumstances. In addition a minimum resistance of 4.7 K is recommended on the I/O pins. Load Figure 29. Reverse-Current External Protection, Method 1 Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 19 TPS1H000-Q1 SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 www.ti.com Load Figure 30. Reverse-Current External Protection, Method 2 7.3.6.6 MCU I/O Protection TI recommends series resistors to protect the microcontroller, for example, 4.7-kΩ when using a 3.3-V microcontroller and 10-kΩ for a 5-V microcontroller. IOs MCU TPS1H000-Q1 Load Figure 31. MCU I/O External Protection 7.4 Device Functional Modes 7.4.1 Working Modes The device has three working modes, the normal mode, the standby mode, and the standby mode with diagnostics, as shown in Figure 32. 20 Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 TPS1H000-Q1 www.ti.com SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 Device Functional Modes (continued) Standby Mode (IN low, DIAG_EN low) DIAG_EN high to low IN low to high DIAG_EN low AND IN high to low AND t > t(off,deg) DIAG_EN low to high Standby Mode With DIAG IN low to high Normal Mode (IN high) (IN low, DIAG_EN high) IN high to low AND DIAG_EN high AND t > t(off,deg) Figure 32. Working Modes 7.4.1.1 Normal Mode When IN is high, the device enters normal mode. 7.4.1.2 Standby Mode When IN is low and DIAG_EN is low, the device enters standby mode with ultralow power consumption. 7.4.1.3 Standby Mode With Diagnostics When IN is low and DIAG_EN is high, the device enters standby mode with diagnostics. The device still supports open-load and short-to-battery detection even when IN is low. Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 21 TPS1H000-Q1 SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The TPS1H000-Q1 device is a smart high-side switch, with an internal charge pump and single-channel integrated NMOS power FET. The adjustable current-limit function greatly improves the reliability of the whole system. Full diagnostic features enable intelligent control of the load. The TPS1H000-Q1 device can be used for a wide variety of resistive, inductive, and capacitive loads, including LEDs, relays, and sub-modules. 8.2 Typical Application Figure 33 shows an example of how to design the external circuitry parameters. Supply Voltage R(SER) VS IN R(SER) DIAG_EN MCU R(SER) General Resistive, Capacitive, Inductive Loads OUT 3.3/5V R(pullup) FAULT DELAY C(DELAY) CL GND R(CL) Figure 33. Typical Application Circuitry 8.2.1 Design Requirements • VVS range from 6 V to 18 V • Nominal current of 100 mA • Expected current limit value of 500 mA • Thermal sensitive system, when current limit occurs, the output latches off after 0.2 s. The 0.2 s is to ensure the safe start-up for a capacitive load, clamping the inrush current but without latch-off during start-up. • Full diagnostics with 5-V MCU, including on-state open-load detection, short-to-GND or overcurrent detection, and thermal shutdown detection 8.2.2 Detailed Design Procedure To set the adjustable current limit value at 500 mA, calculate R(CL) as follows: 22 Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 TPS1H000-Q1 www.ti.com SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 Typical Application (continued) R (CL) VCL(th) u K (CL) IOUT 0.8 u 600 0.5 960 (3) To set the adjustable latch-off delay at 0.2 s, calculate C(DELAY) as follows: t dl t CL(deg) t dl1 t dl2 0.2 | t dl2 C DELAY I dl(chg) u t dl2 Vdl(ref) 4.5 u 0.2 u 10 1.45 6 0.62 PF (4) TI recommends R(SER) = 10 kΩ for a 5-V MCU, and R(pullup) = 10 kΩ as the pullup resistor. 8.2.3 Application Curves The following curves are test examples of hard short conditions. The load is 0.1 A and the current limit value is 0.5 A. Figure 34 shows a waveform of the latch-off mode. Figure 35 shows a waveform of the auto-retry mode. Load = 0.1 A Current limit = 0.5 A Load = 0.1 A Figure 34. Hard-Short Condition in Latch-Off Mode Current limit = 0.5 A Figure 35. Hard-Short Condition in Auto-Retry Mode 9 Power Supply Recommendations The device can be used for both 12-V and 24-V applications. The normal power supply connection is a 12-V or 24-V system. Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 23 TPS1H000-Q1 SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 www.ti.com 10 Layout 10.1 Layout Guidelines To prevent thermal shutdown, TJ must be less than 175°C. If the output current is very high, the power dissipation may be large. However, the PCB layout is very important. Good PCB design can optimize heat transfer, which is absolutely essential for the long-term reliability of the device. • Maximize the copper coverage on the PCB to increase the thermal conductivity of the board. The major heatflow path from the package to the ambient is through the copper on the PCB. Maximum copper is extremely important when there are not any heat sinks attached to the PCB on the other side of the board opposite the package. • Add as many thermal vias as possible directly under the package thermal pad to optimize the thermal conductivity of the board. • All thermal vias should either be plated shut or plugged and capped on both sides of the board to prevent solder voids. To ensure reliability and performance, the solder coverage should be at least 85%. 10.2 Layout Example IN DIAG_EN 1 8 2 7 OUT 6 GND 5 DELAY 3 Thermal Pad FAULT CL 4 VS Figure 36. Layout Example 24 Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 TPS1H000-Q1 www.ti.com SLVSDO6C – AUGUST 2017 – REVISED JUNE 2019 11 Device and Documentation Support 11.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.3 Trademarks PowerPAD, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 11.4 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the mostcurrent data available for the designated device. This data is subject to change without notice and without revision of this document. For browser-based versions of this data sheet, see the left-hand navigation pane. Submit Documentation Feedback Copyright © 2017–2019, Texas Instruments Incorporated Product Folder Links: TPS1H000-Q1 25 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPS1H000AQDGNRQ1 ACTIVE HVSSOP DGN 8 2500 RoHS & Green NIPDAUAG Level-2-260C-1 YEAR -40 to 125 17SX (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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