TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
D
D
D
D
D
D
D
D
D
D
D
D
80-mΩ High-Side MOSFET Switch
500 mA Continuous Current Per Channel
Independent Thermal and Short-Circuit
Protection With Overcurrent Logic Output
Operating Range . . . 2.7 V to 5.5 V
CMOS- and TTL-Compatible Enable Inputs
2.5-ms Typical Rise Time
Undervoltage Lockout
10 µA Maximum Standby Supply Current
for Single and Dual (20 µA for Triple and
Quad)
Bidirectional Switch
Ambient Temperature Range, 0°C to 85°C
ESD Protection
UL Listed – File No. E169910
description
TPS2041A, TPS2051A
D PACKAGE
(TOP VIEW)
GND
IN
IN
EN†
1
8
2
7
3
6
4
OUT
OUT
OUT
OC
5
TPS2043A, TPS2053A
D PACKAGE
(TOP VIEW)
GNDA
IN1
EN1†
EN2†
GNDB
IN2
EN3†
NC
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
OC1
OUT1
OUT2
OC2
OC3
OUT3
NC
NC
TPS2042A, TPS2052A
D PACKAGE
(TOP VIEW)
GND
IN
EN1†
EN2†
1
8
2
7
3
6
4
5
OC1
OUT1
OUT2
OC2
TPS2044A, TPS2054A
D PACKAGE
(TOP VIEW)
GNDA
IN1
EN1†
EN2†
GNDB
IN2
EN3†
EN4†
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
OC1
OUT1
OUT2
OC2
OC3
OUT3
OUT4
OC4
The TPS2041A through TPS2044A and
† All enable inputs are active high for the TPS205xA series.
TPS2051A through TPS2054A power-distribution
NC – No connect
switches are intended for applications where
heavy capacitive loads and short circuits are likely to be encountered. These devices incorporate 80-mΩ
N-channel MOSFET high-side power switches for power-distribution systems that require multiple power
switches in a single package. Each switch is controlled by an independent logic enable input. Gate drive is
provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize
current surges during switching. The charge pump requires no external components and allows operation from
supplies as low as 2.7 V.
When the output load exceeds the current-limit threshold or a short is present, these devices limit the output
current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low.
When continuous heavy overloads and short circuits increase the power dissipation in the switch, causing the
junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from
a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures the switch
remains off until valid input voltage is present. These power-distribution switches are designed to current limit
at 0.9 A.
GENERAL SWITCH CATALOG
33 mΩ, single TPS201xA 0.2 A – 2 A
TPS202x
TPS203x
80 mΩ, single TPS2014
TPS2015
TPS2041
TPS2051
TPS2045
TPS2055
80 mΩ, dual
0.2 A – 2 A
0.2 A – 2 A
600 mA
1A
500 mA
500 mA
250 mA
250 mA
260 mΩ
IN1
OUT
IN2
1.3 Ω
TPS2042
TPS2052
TPS2046
TPS2056
500 mA
500 mA
250 mA
250 mA
TPS2100/1
IN1 500 mA
IN2 10 mA
TPS2102/3/4/5
IN1
500 mA
IN2
100 mA
80 mΩ, dual
TPS2080
TPS2081
TPS2082
TPS2090
TPS2091
TPS2092
500 mA
500 mA
500 mA
250 mA
250 mA
250 mA
80 mΩ, triple
TPS2043
TPS2053
TPS2047
TPS2057
500 mA
500 mA
250 mA
250 mA
80 mΩ, quad
TPS2044
TPS2054
TPS2048
TPS2058
500 mA
500 mA
250 mA
250 mA
80 mΩ, quad
TPS2085
TPS2086
TPS2087
TPS2095
TPS2096
TPS2097
500 mA
500 mA
500 mA
250 mA
250 mA
250 mA
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
AVAILABLE OPTIONS
TA
ENABLE
RECOMMENDED
MAXIMUM CONTINUOUS
LOAD CURRENT
(A)
TYPICAL SHORT-CIRCUIT
CURRENT LIMIT AT 25°C
(A)
PACKAGED DEVICES
NUMBER OF
SWITCHES
Active low
Single
Active high
Active low
0°C to 85°C
Active high
Active low
Dual
05
0.5
09
0.9
Triple
Active high
Active low
Active high
† The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2041ADR)
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
Quad
SOIC
(D)†
TPS2041AD
TPS2051AD
TPS2042AD
TPS2052AD
TPS2043AD
TPS2053AD
TPS2044AD
TPS2054AD
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
functional block diagrams
TPS2041A
Power Switch
†
CS
IN
OUT
Charge
Pump
EN‡
Current
Limit
Driver
OC
UVLO
Thermal
Sense
GND
† Current sense
‡ Active high for TPS205xA series
TPS2042A
OC1
Thermal
Sense
GND
EN1‡
Current
Limit
Driver
Charge
Pump
†
CS
OUT1
UVLO
Power Switch
†
IN
CS
OUT2
Charge
Pump
Driver
Current
Limit
OC2
EN2‡
Thermal
Sense
† Current sense
‡ Active high for TPS205xA series
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
functional block diagrams
TPS2043A
OC1
Thermal
Sense
GNDA
EN1‡
Current
Limit
Driver
Charge
Pump
†
CS
OUT1
UVLO
Power Switch
†
CS
IN1
OUT2
Charge
Pump
Current
Limit
Driver
OC2
EN2‡
Thermal
Sense
Power Switch
†
CS
IN2
OUT3
Charge
Pump
EN3‡
Driver
Current
Limit
OC3
UVLO
Thermal
Sense
GNDB
† Current sense
‡ Active high for TPS205xA series
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
functional block diagrams
OC1
TPS2044A
Thermal
Sense
GNDA
EN1‡
Driver
Current
Limit
Charge
Pump
†
CS
OUT
1
UVLO
Power Switch
†
IN1
OUT
2
CS
Charge
Pump
Driver
Current
Limit
OC2
EN2‡
Thermal
Sense
OC3
Thermal
Sense
GNDB
EN3‡
Driver
Current
Limit
Charge
Pump
†
CS
OUT3
UVLO
Power Switch
†
CS
IN2
OUT4
Charge
Pump
Driver
Current
Limit
OC4
EN4‡
Thermal
Sense
† Current sense
‡ Active high for TPS205xA series
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
Terminal Functions
TPS2041A and TPS2051A
TERMINAL
NAME
I/O
NO.
DESCRIPTION
TPS2041A
TPS2051A
EN
4
–
I
Enable input. Logic low turns on power switch.
EN
–
4
I
Enable input. Logic high turns on power switch.
GND
1
1
I
Ground
IN
2, 3
2, 3
I
Input voltage
OC
5
5
O
Overcurrent. Logic output active low
6, 7, 8
6, 7, 8
O
Power-switch output
OUT
TPS2042A and TPS2052A
TERMINAL
NAME
I/O
NO.
DESCRIPTION
TPS2042A
TPS2052A
EN1
3
–
I
Enable input. Logic low turns on power switch, IN-OUT1.
EN2
4
–
I
Enable input. Logic low turns on power switch, IN-OUT2.
EN1
–
3
I
Enable input. Logic high turns on power switch, IN-OUT1.
EN2
–
4
I
Enable input. Logic high turns on power switch, IN-OUT2.
GND
1
1
I
Ground
IN
2
2
I
Input voltage
OC1
8
8
O
Overcurrent. Logic output active low, for power switch, IN-OUT1
OC2
5
5
O
Overcurrent. Logic output active low, for power switch, IN-OUT2
OUT1
7
7
O
Power-switch output
OUT2
6
6
O
Power-switch output
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
Terminal Functions (Continued)
TPS2043A and TPS2053A
TERMINAL
NAME
I/O
NO.
DESCRIPTION
TPS2043A
TPS2053A
EN1
3
–
I
Enable input, logic low turns on power switch, IN1-OUT1.
EN2
4
–
I
Enable input, logic low turns on power switch, IN1-OUT2.
EN3
7
–
I
Enable input, logic low turns on power switch, IN2-OUT3.
EN1
–
3
I
Enable input, logic high turns on power switch, IN1-OUT1.
EN2
–
4
I
Enable input, logic high turns on power switch, IN1-OUT2.
EN3
–
7
I
Enable input, logic high turns on power switch, IN2-OUT3.
GNDA
1
1
Ground for IN1 switch and circuitry.
GNDB
5
5
Ground for IN2 switch and circuitry.
IN1
2
2
I
Input voltage
IN2
6
6
I
Input voltage
NC
8, 9, 10
8, 9, 10
OC1
16
16
O
Overcurrent, logic output active low, IN1-OUT1
OC2
13
13
O
Overcurrent, logic output active low, IN1-OUT2
OC3
12
12
O
Overcurrent, logic output active low, IN2-OUT3
OUT1
15
15
O
Power-switch output, IN1-OUT1
OUT2
14
14
O
Power-switch output, IN1-OUT2
OUT3
11
11
O
Power-switch output, IN2-OUT3
No connection
TPS2044A and TPS2054A
TERMINAL
NAME
NO.
I/O
DESCRIPTION
TPS2044A
TPS2054A
EN1
3
–
I
Enable input. logic low turns on power switch, IN1-OUT1.
EN2
4
–
I
Enable input. Logic low turns on power switch, IN1-OUT2.
EN3
7
–
I
Enable input. Logic low turns on power switch, IN2-OUT3.
EN4
8
–
I
Enable input. Logic low turns on power switch, IN2-OUT4.
EN1
–
3
I
Enable input. Logic high turns on power switch, IN1-OUT1.
EN2
–
4
I
Enable input. Logic high turns on power switch, IN1-OUT2.
EN3
–
7
I
Enable input. Logic high turns on power switch, IN2-OUT3.
EN4
–
8
I
Enable input. Logic high turns on power switch, IN2-OUT4.
GNDA
1
1
Ground for IN1 switch and circuitry.
GNDB
5
5
Ground for IN2 switch and circuitry.
IN1
2
2
I
Input voltage
IN2
6
6
I
Input voltage
OC1
16
16
O
Overcurrent. Logic output active low, IN1-OUT1
OC2
13
13
O
Overcurrent. Logic output active low, IN1-OUT2
OC3
12
12
O
Overcurrent. Logic output active low, IN2-OUT3
OC4
9
9
O
Overcurrent. Logic output active low, IN2-OUT4
OUT1
15
15
O
Power-switch output, IN1-OUT1
OUT2
14
14
O
Power-switch output, IN1-OUT2
OUT3
11
11
O
Power-switch output, IN2-OUT3
OUT4
10
10
O
Power-switch output, IN2-OUT4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
detailed description
power switch
The power switch is an N-channel MOSFET with a maximum on-state resistance of 135 mΩ (VI(IN) = 5 V).
Configured as a high-side switch, the power switch prevents current flow from OUT to IN and IN to OUT when
disabled. The power switch supplies a minimum of 500 mA per switch.
charge pump
An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate
of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires
very little supply current.
driver
The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated
electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and
fall times of the output voltage. The rise and fall times are typically in the 2-ms to 4-ms range.
enable (ENx, ENx)
The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce
the supply current. The supply current is reduced to less than 10 µA on the single and dual devices (20 µA on
the triple and quad devices) when a logic high is present on ENx (TPS204xA†) or a logic low is present on ENx
(TPS205xA†). A logic zero input on ENx or a logic high on ENx restores bias to the drive and control circuits
and turns the power on. The enable input is compatible with both TTL and CMOS logic levels.
overcurrent (OCx)
The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature condition is
encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.
current sense
A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than
conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry
sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into
its saturation region, which switches the output into a constant-current mode and holds the current constant
while varying the voltage on the load.
thermal sense
The TPS204xA and TPS205xA implement a dual-threshold thermal trip to allow fully independent operation of
the power distribution switches. In an overcurrent or short-circuit condition the junction temperature rises. When
the die temperature rises to approximately 140°C, the internal thermal sense circuitry checks to determine which
power switch is in an overcurrent condition and turns off that switch, thus isolating the fault without interrupting
operation of the adjacent power switch. Hysteresis is built into the thermal sense, and after the device has cooled
approximately 20 degrees, the switch turns back on. The switch continues to cycle off and on until the fault is
removed. The (OCx) open-drain output is asserted (active low) when overtemperature or overcurrent occurs.
undervoltage lockout
A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control
signal turns off the power switch.
† Product series designations TPS204x and TPS205x refer to devices presented in this data sheet and not necessarily to other TI devices
numbered in this sequence.
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Input voltage range, VI(IN) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
Output voltage range, VO(OUT) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VI(IN) + 0.3 V
Input voltage range, VI(ENx) or VI(ENx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
Continuous output current, IO(OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260°C
Electrostatic discharge (ESD) protection: Human body model MIL-STD-883C . . . . . . . . . . . . . . . . . . . . . 2 kV
Machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 kV
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltages are with respect to GND.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
D–8
725 mW
5.9 mW/°C
464 mW
377 mW
D–16
1123 mW
9 mW/°C
719 mW
584 mW
recommended operating conditions
MIN
MAX
2.7
5.5
V
Input voltage, VI(EN) or VI(EN)
0
5.5
V
Continuous output current, IO(OUT) (per switch)
0
500
mA
Operating virtual junction temperature, TJ
0
125
°C
Input voltage, VI(IN)
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
9
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
electrical characteristics over recommended operating junction temperature range, VI(IN)= 5.5 V,
IO = rated current, VI(EN) = 0 V, VI(EN) = VI(IN) (unless otherwise noted)
power switch
PARAMETER
Static drain-source on-state
resistance, 5-V operation
rDS(
DS(on))
Static drain-source on-state
resistance, 3.3-V operation
tr
tf
Rise time,
time output
Fall time,
time output
TEST CONDITIONS†
TPS204xA
MIN
TPS205xA
TYP
MAX
MIN
TYP
MAX
VI(IN) = 5 V,
IO = 0.5 A
TJ = 25°C,
80
100
80
100
VI(IN) = 5 V,
IO = 0.5 A
TJ = 85°C,
90
120
90
120
VI(IN) = 5 V,
IO = 0.5 A
TJ = 125°C,
100
135
100
135
VI(IN) = 3.3 V,
IO = 0.5 A
TJ = 25°C,
90
125
90
125
VI(IN) = 3.3 V,
IO = 0.5 A
TJ = 85°C,
110
145
110
145
VI(IN) = 3.3 V,
IO = 0.5 A
TJ = 125°C,
120
160
120
160
VI(IN) = 5.5 V,
CL = 1 µF,
TJ = 25°C,
RL=10 Ω
2.5
2.5
VI(IN) = 2.7 V,
CL = 1 µF,
TJ = 25°C,
RL=10 Ω
3
3
VI(IN) = 5.5 V,
CL = 1 µF,
VI(IN) = 2.7 V,
CL = 1 µF,
TJ = 25°C,
RL=10 Ω
4.4
4.4
TJ = 25°C,
RL=10 Ω
2.5
2.5
UNIT
mΩ
ms
ms
† Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
enable input ENx or ENx
PARAMETER
VIH
High-level input voltage
VIL
Low level input voltage
Low-level
II
Input current
ton
toff
Turnon time
TPS204xA
TPS205xA
Turnoff time
TEST CONDITIONS
2.7 V ≤ VI(IN) ≤ 5.5 V
TPS204xA
MIN
TYP
TPS205xA
MAX
2
MIN
TYP
MAX
2
V
4.5 V ≤ VI(IN) ≤ 5.5 V
0.8
0.8
2.7 V≤ VI(IN) ≤ 4.5 V
0.4
0.4
VI(ENx) = 0 V or VI(ENx) = VI(IN)
VI(ENx) = VI(IN) or VI(ENx) = 0 V
–0.5
0.5
–0.5
CL = 100 µF, RL=10 Ω
CL = 100 µF, RL=10 Ω
UNIT
0.5
20
20
40
40
V
µA
ms
current limit
PARAMETER
IOS
Short-circuit output current
TEST CONDITIONS†
VI(IN) = 5 V, OUT connected to GND,
Device enabled into short circuit
TPS204xA
MIN
0.7
TYP
1
TPS205xA
MAX
MIN
1.3
0.7
TYP
1
MAX
1.3
UNIT
A
† Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
electrical characteristics over recommended operating junction temperature range, VI(IN)= 5.5 V,
IO = rated current, VI(EN) = 0 V, VI(EN) = VI(IN) (unless otherwise noted) (continued)
supply current (TPS2041A, TPS2051A)
PARAMETER
Supply
y current,, low-level
output
Supply
y current,,
high-level output
Leakage current
Reverse leakage current
TPS2041A
TEST CONDITIONS
MIN
VI(EN) = VI(IN)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN) = VI(IN)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
OUT
connected
to ground
VI(EN) = VI(IN)
–40°C ≤ TJ ≤ 125°C
VI(EN)= 0 V
–40°C ≤ TJ ≤ 125°C
IN = High
g
impedance
VI(EN) = 0 V
VI(EN) = VI(IN)
TJ = 25°C
No Load
on OUT
No Load
on OUT
TYP
0.025
TPS2051A
MAX
MIN
TYP
MAX
0.025
1
UNIT
1
10
µA
10
85
110
100
85
110
µA
100
100
µA
100
0.3
µA
0.3
supply current (TPS2042A, TPS2052A)
PARAMETER
Supply
y current,, low-level
output
Supply
y current,,
high-level output
Leakage current
Reverse leakage current
TPS2042A
TEST CONDITIONS
MIN
VI(ENx) = VI(IN)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN
I(ENx)) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(ENx)
(
)=0V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN
I(ENx)) = VI(IN)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
OUT
connected
to ground
VI(ENx) = VI(IN)
–40°C ≤ TJ ≤ 125°C
VI(ENx) = 0 V
–40°C ≤ TJ ≤ 125°C
IN = high
g
impedance
VI(EN) = 0 V
VI(EN) = VI(IN)
TJ = 25°C
No Load
on OUT
No Load
on OUT
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TYP
0.025
TPS2052A
MAX
MIN
TYP
MAX
0.025
1
UNIT
1
10
µA
10
85
110
100
85
110
µA
100
100
µA
100
0.3
0.3
µA
11
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
electrical characteristics over recommended operating junction temperature range, VI(IN)= 5.5 V,
IO = rated current, VI(EN) = 0 V, VI(EN) = VI(IN) (unless otherwise noted) (continued)
supply current (TPS2043A, TPS2053A)
PARAMETER
TPS2043A
TEST CONDITIONS
Supply
y current,,
low-level output
No Load
on OUTx
Supply
y current,,
high-level output
No Load
on OUTx
MIN
VI(ENx) = VI(INx)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN
I(ENx)) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(ENx) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN
I(ENx)) = VI(IN
I(INx))
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
Leakage current
OUTx connected
to ground
VI(ENx) = VI(INx)
VI(ENx) = 0 V
Reverse leakage
g
current
IN = high
g
impedance
VI(ENx) = 0 V
VI(ENx) = VI(IN)
TYP
0.05
TPS2053A
MAX
MIN
TYP
MAX
0.05
2
UNIT
2
20
µA
20
160
200
200
160
200
µA
200
–40°C ≤ TJ ≤ 125°C
200
–40°C ≤ TJ ≤ 125°C
µA
200
0.3
TJ = 25°C
µA
0.3
supply current (TPS2044A, TPS2054A)
PARAMETER
TPS2044A
TEST CONDITIONS
Supply
y current,,
low-level output
No Load
on OUTx
Supply
y current,,
high-level output
No Load
on OUTx
MIN
VI(ENx) = VI(INx)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN
I(ENx)) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(ENx) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN
I(ENx)) = VI(IN
I(INx))
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
Leakage current
OUTx connected
to ground
VI(ENx) = VI(INx)
VI(ENx) = 0 V
Reverse leakage
g
current
IN = high
g
impedance
VI(EN) = 0 V
VI(EN) = VI(IN)
TYP
0.05
TPS2054A
MAX
MIN
TYP
MAX
0.05
2
UNIT
2
20
µA
20
170
220
200
170
220
µA
200
–40°C ≤ TJ ≤ 125°C
200
–40°C ≤ TJ ≤ 125°C
µA
200
0.3
TJ = 25°C
µA
0.3
undervoltage lockout
PARAMETER
TEST CONDITIONS
TPS204xA
MIN
Low-level input voltage
Hysteresis
TYP
2
TJ = 25°C
TPS205xA
MAX
MIN
2.5
2
100
TYP
MAX
2.5
100
UNIT
V
mV
overcurrent OC
PARAMETER
Sink current†
Output low voltage
Off-state current†
TEST CONDITIONS
VO = 5 V
IO = 5 V,
VOL(OC)
VO = 5 V,
VO = 3.3 V
TPS204xA
MIN
† Specified by design, not production tested.
12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TYP
TPS205xA
MAX
MIN
TYP
MAX
UNIT
10
10
mA
0.5
0.5
V
1
1
µA
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
PARAMETER MEASUREMENT INFORMATION
OUT
RL
tf
tr
CL
VO(OUT)
90%
10%
90%
10%
TEST CIRCUIT
50%
50%
VI(EN)
toff
ton
50%
toff
ton
90%
VO(OUT)
50%
VI(EN)
90%
VO(OUT)
10%
10%
VOLTAGE WAVEFORMS
Figure 1. Test Circuit and Voltage Waveforms
VI(EN)
(5 V/div)
VI(EN)
(5 V/div)
VI(IN) = 5 V
TA = 25°C
CL = 0.1 µF
RL = 10 Ω
VO(OUT)
(2 V/div)
0
1
2
3
4
5
6
7
8
9
VI(IN) = 5 V
TA = 25°C
CL = 0.1 µF
RL = 10 Ω
VO(OUT)
(2 V/div)
10
0
2
t – Time – ms
Figure 2. Turnon Delay and Rise Time
with 0.1-µF Load
POST OFFICE BOX 655303
4
6
8
10 12
t – Time – ms
14
16
18
20
Figure 3. Turnoff Delay and Fall Time
with 0.1-µF Load
• DALLAS, TEXAS 75265
13
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
PARAMETER MEASUREMENT INFORMATION
VI(EN)
(5 V/div)
VI(EN)
(5 V/div)
VI(IN) = 5 V
TA = 25°C
CL = 1 µF
RL = 10 Ω
VO(OUT)
(2 V/div)
0
1
2
3
4
5
6
7
8
VI(IN) = 5 V
TA = 25°C
CL = 1 µF
RL = 10 Ω
VO(OUT)
(2 V/div)
9
0
10
2
4
6
8
10
12
14
16
18
20
t – Time – ms
t – Time – ms
Figure 4. Turnon Delay and Rise Time
with 1-µF Load
Figure 5. Turnoff Delay and Fall Time
with 1-µF Load
VI(IN) = 5 V
TA = 25°C
VI(EN)
(5 V/div)
VO(OUT)
(2 V/div)
VI(IN) = 5 V
TA = 25°C
IO(OUT)
(0.5 A/div)
0
1
2
3
4
5
6
7
8
9
IO(OUT)
(0.5 A/div)
10
0
10
Figure 6. TPS2051A, Short-Circuit Current,
Device Enabled into Short
14
20
30
40
50
60
70
80
90 100
t – Time – ms
t – Time – ms
POST OFFICE BOX 655303
Figure 7. TPS2051A, Threshold Trip Current
with Ramped Load on Enabled Device
• DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
PARAMETER MEASUREMENT INFORMATION
VI(EN)
(5 V/div)
VO(OC)
(5 V/div)
470 µF
220 µF
100 µF
VI(IN) = 5 V
TA = 25°C
Ramp = 1 A/100 ms
IO(OUT)
(0.5 A/div)
0
20
40
60
VI(IN) = 5 V
TA = 25°C
RL = 10 Ω
IO(OUT)
(0.2 A/div)
80 100 120 140 160 180 200
0
2
4
t – Time – ms
6
8
10
12
Figure 8. OC Response With Ramped Load
on Enabled Device
VO(OC)
(5 V/div)
IO(OUT)
(0.5 A/div)
IO(OUT)
(1 A/div)
2000
3000
18 20
VI(IN) = 5 V
TA = 25°C
VO(OC)
(5 V/div)
1000
16
Figure 9. Inrush Current with 100-µF, 220-µF
and 470-µF Load Capacitance
VI(IN) = 5 V
TA = 25°C
0
14
t – Time – ms
4000
5000
0
t – Time – µs
200
400
600
800
1000
t – Time – µs
Figure 10. 4-Ω Load Connected to Enabled Device
POST OFFICE BOX 655303
Figure 11. 1-Ω Load Connected
to Enabled Device
• DALLAS, TEXAS 75265
15
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
TYPICAL CHARACTERISTICS
TURNON DELAY TIME
vs
INPUT VOLTAGE
TURNOFF DELAY TIME
vs
INPUT VOLTAGE
3.5
12
CL = 1 µF
RL = 10 Ω
TA = 25°C
Turnon Delay Time – ms
Turnon Delay Time – ms
3.2
CL = 1 µF
RL = 10 Ω
TA = 25°C
2.9
2.6
10
8
6
2.3
2
2.5
3
3.5
4
4.5
5
5.5
4
2.5
6
3
VI – Input Voltage – V
3.5
4
4.5
5
VI – Input Voltage – V
Figure 12
5.5
6
5.5
6
Figure 13
RISE TIME
vs
INPUT VOLTAGE
FALL TIME
vs
INPUT VOLTAGE
3
2.2
CL = 1 µF
RL = 10 Ω
TA = 25°C
2.1
CL = 1 µF
RL = 10 Ω
TA = 25°C
f t – Fall Time – ms
r t – Rise Time – ms
2.7
2.4
2
1.9
1.8
1.7
2.1
1.6
1.8
2.5
3
3.5
4
4.5
5
5.5
6
1.5
2.5
3
VI – Input Voltage – V
Figure 14
16
3.5
4
4.5
5
VI – Input Voltage – V
Figure 15
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
TYPICAL CHARACTERISTICS
SUPPLY CURRENT, OUTPUT ENABLED
vs
JUNCTION TEMPERATURE
SUPPLY CURRENT, OUTPUT DISABLED
vs
JUNCTION TEMPERATURE
160
I I(IN) – Supply Current, Output Disabled – nA
I I(IN) – Supply Current, Output Enabled – µ A
100
90
VI(IN) = 5.5 V
VI(IN) = 5 V
80
VI(IN) = 4.5 V
70
VI(IN) = 2.7 V
60
VI(IN) = 3.3 V
50
40
–40
0
25
85
TJ – Junction Temperature – °C
140
VI(IN) = 5.5 V
120
VI(IN) = 5 V
100
VI(IN) = 4.5 V
80
VI(IN) = 3.3 V
60
VI(IN) = 2.7 V
40
20
0
–40
125
0
25
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
JUNCTION TEMPERATURE
IO = 0.5 A
140
VI(IN) = 2.7 V
VI(IN) = 3.3 V
120
VI(IN) = 3 V
100
80
VI(IN) = 5 V
60
VI(IN) = 4.5 V
40
20
0
0
25
125
Figure 17
85
INPUT-TO-OUTPUT VOLTAGE
vs
LOAD CURRENT
VI(IN) – VO(OUT) – Input-to-Output Voltage – mV
r DS(on) – Static Drain-Source On-State Resistance – m Ω
Figure 16
160
85
TJ – Junction Temperature – °C
125
70
TA = 25°C
VI(IN) = 2.7 V
60
VI(IN) = 4.5 V
50
VI(IN) = 3.3 V
40
VI(IN) = 5 V
30
20
10
0
100
TJ – Junction Temperature – °C
200
300
400
500
IL – Load Current – A
Figure 18
Figure 19
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
17
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
TYPICAL CHARACTERISTICS
SHORT-CIRCUIT OUTPUT CURRENT
vs
JUNCTION TEMPERATURE
THRESHOLD TRIP CURRENT
vs
INPUT VOLTAGE
1.2
TA = 25°C
Load Ramp = 1 A/10 ms
VI(IN) = 5.5 V
1.1
VI(IN) = 5 V
1.16
VI(IN) = 4.5 V
Threshold Trip Current – A
I OS – Short-circuit Output Current – A
1.2
1
VI(IN) = 3.3 V
0.9
VI(IN) = 2.7 V
0.8
1.08
1.04
0.7
0.6
–40
1.12
25
85
0
TJ – Junction Temperature – °C
1
2.5
125
3
Figure 20
6
CURRENT-LIMIT RESPONSE
vs
PEAK CURRENT
2.35
250
VI(IN) = 5 V
TA = 25°C
2.3
Start Threshold
Current Limit Response – µ s
UVLO – Undervoltage Lockout – V
5.5
Figure 21
UNDERVOLTAGE LOCKOUT
vs
JUNCTION TEMPERATURE
2.25
Stop Threshold
2.2
200
150
100
50
2.15
2.1
0
–40
0
25
85
TJ – Junction Temperature – °C
125
0
2.5
5
Figure 23
POST OFFICE BOX 655303
7.5
Peak Current – A
Figure 22
18
3.5
4
4.5
5
VI – Input Voltage – V
• DALLAS, TEXAS 75265
10
12.5
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
TPS2041A
2,3
Power Supply
2.7 V to 5.5 V
IN
0.1 µF
OUT
6,7,8
Load
0.1 µF
5
4
22 µF
OC
EN
GND
1
Figure 24. Typical Application (Example, TPS2041A)
power-supply considerations
A 0.01-µF to 0.1-µF ceramic bypass capacitor between INx and GND, close to the device, is recommended.
Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy.
This precaution reduces power-supply transients that may cause ringing on the input. Additionally, bypassing
the output with a 0.01-µF to 0.1-µF ceramic capacitor improves the immunity of the device to short-circuit
transients.
overcurrent
A sense FET is employed to check for overcurrent conditions. Unlike current-sense resistors, sense FETs do
not increase the series resistance of the current path. When an overcurrent condition is detected, the device
maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs
only if the fault is present long enough to activate thermal limiting.
Three possible overload conditions can occur. In the first condition, the output has been shorted before the
device is enabled or before VI(IN) has been applied (see Figure 6). The TPS204xA and TPS205xA sense the
short and immediately switch into a constant-current output.
In the second condition, a short or an overload occurs while the device is enabled. At the instant the overload
occurs, very high currents may flow for a short time before the current-limit circuit can react. After the
current-limit circuit has tripped (reached the overcurrent trip threshhold) the device switches into
constant-current mode.
In the third condition, the load has been gradually increased beyond the recommended operating current. The
current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is
exceeded (see Figure 7). The TPS204xA and TPS205xA are capable of delivering current up to the current-limit
threshold without damaging the device. Once the threshold has been reached, the device switches into its
constant-current mode.
OC response
The OC open-drain output is asserted (active low) when an overcurrent or overtemperature condition is
encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.
Connecting a heavy capacitive load to an enabled device can cause momentary false overcurrent reporting from
the inrush current flowing through the device, charging the downstream capacitor. The TPS204xA and
TPS205xA family of devices are designed to reduce false overcurrent reporting. An internal overcurrent
transient filter eliminates the need for external components to remove unwanted pulses. Using low-ESR
electrolytic capacitors on the output lowers the inrush current flow through the device during hot-plug events
by providing a low-impedance energy source, also reducing erroneous overcurrent reporting.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
19
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
TPS2041A
GND
OUT
IN
OUT
IN
OUT
EN
V+
Rpullup
OC
Figure 25. Typical Circuit for OC Pin (Example, TPS2041A)
power dissipation and junction temperature
The low on-resistance on the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass
large currents. The thermal resistances of these packages are high compared to those of power packages; it
is good design practice to check power dissipation and junction temperature. Begin by determining the rDS(on)
of the N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use
the highest operating ambient temperature of interest and read rDS(on) from Figure 18. Using this value, the
power dissipation per switch can be calcultaed by:
P
D
+ rDS(on)
I2
Depending on which device is being used, multiply this number by the number of switches being used. This step
will render the total power dissipation from the N-channel MOSFETs.
Finally, calculate the junction temperature:
T
J
Where:
+ PD
R
qJA
) TA
TA = Ambient Temperature °C
RθJA = Thermal resistance SOIC = 172°C/W (for 8 pin), 111°C/W (for 16 pin)
PD = Total power dissipation based on number of switches being used.
Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,
repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally
sufficient to get a reasonable answer.
thermal protection
Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for
extended periods of time. The faults force the TPS204xA and TPS205xA into constant-current mode, which
causes the voltage across the high-side switch to increase; under short-circuit conditions, the voltage across
the switch is equal to the input voltage. The increased dissipation causes the junction temperature to rise to high
levels. The protection circuit senses the junction temperature of the switch and shuts it off. Hysteresis is built
into the thermal sense circuit, and after the device has cooled approximately 20 degrees, the switch turns back
on. The switch continues to cycle in this manner until the load fault or input power is removed.
The TPS204xA and TPS205xA implement a dual thermal trip to allow fully independent operation of the power
distribution switches. In an overcurrent or short-circuit condition the junction temperature will rise. Once the die
temperature rises to approximately 140°C, the internal thermal sense circuitry checks which power switch is
in an overcurrent condition and turns that power switch off, thus isolating the fault without interrupting operation
of the adjacent power switch. Should the die temperature exceed the first thermal trip point of 140°C and reach
160°C, both switches turn off. The OC open-drain output is asserted (active low) when overtemperature or
overcurrent occurs.
20
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
undervoltage lockout (UVLO)
An undervoltage lockout ensures that the power switch is in the off state at power up. Whenever the input voltage
falls below approximately 2 V, the power switch will be quickly turned off. This facilitates the design of
hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The
UVLO will also keep the switch from being turned on until the power supply has reached at least 2 V, even if
the switch is enabled. Upon reinsertion, the power switch will be turned on, with a controlled rise time to reduce
EMI and voltage overshoots.
universal serial bus (USB) applications
The universal serial bus (USB) interface is a 12-Mb/s, or 1.5-Mb/s, multiplexed serial bus designed for
low-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). The four-wire USB
interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for
differential data, and two lines are provided for 5-V power distribution.
USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V
from the 5-V input or its own internal power supply.
The USB specification defines the following five classes of devices, each differentiated by power-consumption
requirements:
D
D
D
D
D
Hosts/self-powered hubs (SPH)
Bus-powered hubs (BPH)
Low-power, bus-powered functions
High-power, bus-powered functions
Self-powered functions
Self-powered and bus-powered hubs distribute data and power to downstream functions. The TPS204xA and
TPS205xA can provide power-distribution solutions for many of these classes of devices.
host/self-powered and bus-powered hubs
Hosts and self-powered hubs have a local power supply that powers the embedded functions and the
downstream ports (see Figures 26 and 27). This power supply must provide from 5.25 V to 4.75 V to the board
side of the downstream connection under full-load and no-load conditions. Hosts and SPHs are required to have
current-limit protection and must report overcurrent conditions to the USB controller. Typical SPHs are desktop
PCs, monitors, printers, and stand-alone hubs.
Power Supply
3.3 V
Downstream
USB Ports
5V
TPS2041A
2, 3
IN
0.1 µF
OUT
D+
D–
7
0.1 µF
5
USB
Control
4
120 µF
VBUS
GND
OC
EN
GND
Figure 26. Typical One-Port Solution
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
21
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
Downstream
USB Ports
D+
Power Supply
D–
3.3 V
5V
+
TPS2044A
2
6
IN1
OUT1
IN2
33 µF
15
D+
0.1 µF
D–
14
OUT2
11
3
13
USB
Controller
4
12
7
9
8
OC1
OUT3
VBUS
GND
+
33 µF
VBUS
GND
11
EN1
D+
OC2
D–
EN2
+
10
OC3
33 µF
VBUS
GND
OUT4
EN3
OC4
D+
EN4
D–
GNDA GNDB
1
5
+
33 µF
VBUS
GND
Figure 27. Typical Four-Port USB Host/Self-Powered Hub
Bus-powered hubs obtain all power from upstream ports and often contain an embedded function. The hubs
are required to power up with less than one unit load. The BPH usually has one embedded function, and power
is always available to the controller of the hub. If the embedded function and hub require more than 100 mA
on powerup, the power to the embedded function may need to be kept off until enumeration is completed. This
can be accomplished by removing power or by shutting off the clock to the embedded function. Power switching
the embedded function is not necessary if the aggregate power draw for the function and controller is less than
one unit load. The total current drawn by the bus-powered device is the sum of the current to the controller, the
embedded function, and the downstream ports, and it is limited to 500 mA from an upstream port.
22
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2041A, TPS2042A, TPS2043A, TPS2044A
TPS2051A, TPS2052A, TPS2053A, TPS2054A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS247 – SEPTEMBER 2000
APPLICATION INFORMATION
low-power bus-powered functions and high-power bus-powered functions
Both low-power and high-power bus-powered functions obtain all power from upstream ports; low-power
functions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and
can draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of
44 Ω and 10 µF at power up, the device must implement inrush current limiting (see Figure 28).
Power Supply
D+
3.3 V
TPS2041A
D–
VBUS
GND
2,3
10 µF
0.1 µF
IN
OUT
6, 7, 8
0.1 µF
5
USB
Control
4
10 µF
Internal
Function
OC
EN
GND
1
Figure 28. High-Power Bus-Powered Function (Example, TPS2041A)
USB power-distribution requirements
USB can be implemented in several ways, and, regardless of the type of USB device being developed, several
power-distribution features must be implemented.
D
D
D
Hosts/self-powered hubs must:
–
Current-limit downstream ports
–
Report overcurrent conditions on USB VBUS
Bus-powered hubs must:
–
Enable/disable power to downstream ports
–
Power up at
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