TPS22968EVM-007

User's Guide SLVUA30 – January 2014 TPS22968EVM-007 Dual 4A Load Switch The TPS22968EVM-007 evaluation module contains a dual channel, ultra low ON resistance, 4-A load switch with controlled turn and adjustable rise time. 1 2 3 4 5 6 7 8 Contents Description ................................................................................................................... 2 1.1 Typical Applications ................................................................................................ 2 1.2 Features ............................................................................................................. 2 Electrical Performance Specifications .................................................................................... 3 Schematic .................................................................................................................... 3 Layout ........................................................................................................................ 4 Setup ......................................................................................................................... 6 5.1 J1 VIN1/J2 VIN2 – Input Connections .......................................................................... 6 5.2 J3 VOUT1/J4 VOUT2 – Output Connections .................................................................. 6 5.3 JP1 – VBIAS ........................................................................................................ 6 5.4 JP2/JP3 - Input Capacitors ....................................................................................... 7 5.5 JP4/JP5 - Output Capacitors ..................................................................................... 7 5.6 JP6/JP7/JP8/JP9 – Output Resistors ........................................................................... 7 5.7 JP10/JP11/JP12/JP13 – Output Parallel Connections ........................................................ 7 5.8 TP1/TP2 – VIN1-VIN2 ............................................................................................. 7 5.9 TP3/TP4 - VIN Sense, TP7/TP8 - VOUT Sense ............................................................... 7 5.10 TP5/TP6 – VOUT1-VOUT2 ....................................................................................... 7 5.11 TP10 – VBIAS ...................................................................................................... 7 5.12 TP9/TP11 – ON1-ON2 ............................................................................................ 7 5.13 TP12 – VOUT1 // VOUT2 ......................................................................................... 7 5.14 TP13 – TP16 GND ................................................................................................. 7 5.15 List of Test Points .................................................................................................. 8 5.16 Test Procedure ..................................................................................................... 8 5.17 RON Test Procedure ................................................................................................ 9 5.18 tR, tON, tF, tOFF Test Procedure ..................................................................................... 9 Test Setup .................................................................................................................. 10 Performance Data and Typical Characteristic Curves ................................................................ 12 7.1 tR and tON Scope Capture ........................................................................................ 12 7.2 tF and tOFF Scope Capture ........................................................................................ 13 7.3 Parallel Switch Operation ........................................................................................ 13 Bill of Materials ............................................................................................................. 14 SLVUA30 – January 2014 Submit Documentation Feedback TPS22968EVM-007 Dual 4A Load Switch Copyright © 2014, Texas Instruments Incorporated 1 Description 1 www.ti.com Description The TPS22968 device contains two N-channel MOSFETs that can operate over an input voltage range of 0.8V to 5.5 V and can support a maximum continuous current of up to 4-A per channel. Each switch is independently controlled by an on/off input (ON1, ON2), which is capable of interfacing directly with lowvoltage GPIO control signals. In the TPS22968, a 260-Ω on-chip load resistor is added for quick output discharge (QOD) when the switch is turned off. The rise time of the device is internally controlled in order to avoid in-rush current and can be adjusted using a ceramic capacitor on the CTx pins. The TPS22968 is available in a small, space-saving 2mm x 3mm 14-pin SON package with integrated thermal pad allowing for high power dissipation. The TPS22968 device is demonstrated using the TPS22968EVM-007 module. The TPS22968 Dual Load Switch device can be configured in either a dual switch configuration or a parallel switch configuration using the TPS22968EVM-007. 1.1 Typical Applications ● ● ● ● 1.2 UltrabooksTM Notebooks/Netbooks Tablet PC Consumer Electronics ● Set-top Boxes ● Industrial Systems ● Telecom Systems Features ● External capacitors for configurable rise time ● EVM configurable for single or parallel switch configurations ● Connection points to VIN, VOUT, VBIAS, ON pins as well as SENSE connections for accurate measurement of VIN and VOUT voltages 2 ● High current connection terminals available for 4A maximum continuous switch current operation ● VIN input voltage range: 0.8V to 5.5V ● VBIAS voltage range: 2.5V to 5.5V TPS22968EVM-007 Dual 4A Load Switch Copyright © 2014, Texas Instruments Incorporated SLVUA30 – January 2014 Submit Documentation Feedback Electrical Performance Specifications www.ti.com 2 Electrical Performance Specifications Reference Datasheet SLVSCG3 3 Schematic Figure 1. TPS22968EVM-007 Schematic SLVUA30 – January 2014 Submit Documentation Feedback TPS22968EVM-007 Dual 4A Load Switch Copyright © 2014, Texas Instruments Incorporated 3 Layout 4 www.ti.com Layout Figure 2. TPS22968EVM-007 Top Assembly 4 TPS22968EVM-007 Dual 4A Load Switch Copyright © 2014, Texas Instruments Incorporated SLVUA30 – January 2014 Submit Documentation Feedback Layout www.ti.com Figure 3. TPS22968EVM-007 Top SLVUA30 – January 2014 Submit Documentation Feedback TPS22968EVM-007 Dual 4A Load Switch Copyright © 2014, Texas Instruments Incorporated 5 Setup www.ti.com Figure 4. TPS22968EVM-007 Bottom 5 Setup This section describes the jumpers and connectors on the EVM as well as how to properly connect, set up, and use the EVM. 5.1 J1 VIN1/J2 VIN2 – Input Connections These are the high current input connections from the input source. Connect the positive lead to J1 and J2 terminal and the negative lead to a GND connection point. 5.2 J3 VOUT1/J4 VOUT2 – Output Connections These are the high current connections for the outputs of the EVM. Connect the positive lead to J3 and J4 terminal and the negative lead to GND connection point. 5.3 JP1 – VBIAS This jumper connects VBIAS to VIN1 voltage source. VBIAS must be maintained between 2.5V – 5.5V for proper operation on the TPS22968 device. If testing conditions involve taking VIN1 levels Below 2.5V, remove the shunt across JP1 and connect VBIAS voltage at TP10. 6 TPS22968EVM-007 Dual 4A Load Switch Copyright © 2014, Texas Instruments Incorporated SLVUA30 – January 2014 Submit Documentation Feedback Setup www.ti.com 5.4 JP2/JP3 - Input Capacitors During normal operation the shorting jumper is removed on JP2 and JP3. These jumpers connect C1 and C2 capacitors (unpopulated) from the input of the device to ground. Refer to the Applications Section of the Datasheet for additional information on selecting the input capacitor. 5.5 JP4/JP5 - Output Capacitors During normal operation the shorting jumper is removed on JP4 and JP5. These jumpers connect C7 and C10 capacitors (unpopulated) from the output of the device to ground. Refer to the Applications Section of the Datasheet for additional information on selecting the output capacitor. 5.6 JP6/JP7/JP8/JP9 – Output Resistors During normal operation no shorting jumper is placed on JP6-JP9. A shorting jumper may be used on JP6-JP9 to connect R1-R4 load resistors from the output of the device to ground. R1-R4 is for user selected values and are unpopulated. 5.7 JP10/JP11/JP12/JP13 – Output Parallel Connections JP10-JP12 connects VOUT1 and VOUT2 together and is used when testing both device switches in parallel configuration. 5.8 TP1/TP2 – VIN1-VIN2 These are input connections to the device. 5.9 TP3/TP4 - VIN Sense, TP7/TP8 - VOUT Sense These two connections are used when very accurate measurements of the input or output are required. RON measurements should be made using these sense connections when measuring the voltage drop from VIN to VOUT and then calculating the resistance. 5.10 TP5/TP6 – VOUT1-VOUT2 These are output connections to the device. 5.11 TP10 – VBIAS This is the VBIAS connection point. VBIAS must be applied to the TPS22968 device at a voltage level of 2.5V to 5.5V level for proper operation. VBIAS may be applied direct at this connection point or applied using JP1. 5.12 TP9/TP11 – ON1-ON2 These are the enable inputs for the device. Apply an external enable/disable source to TP9 and TP11. The TPS22968 is active High. ON1 and ON2 must not be left floating. Refer to the datasheet for proper ON and OFF voltage level settings. A switching signal may also be used and connected at these points. 5.13 TP12 – VOUT1 // VOUT2 This is the common connection point for VOUT when the switch output are connected in parallel configuration. 5.14 TP13 – TP16 GND These are the GND connection points to the EVM. SLVUA30 – January 2014 Submit Documentation Feedback TPS22968EVM-007 Dual 4A Load Switch Copyright © 2014, Texas Instruments Incorporated 7 Setup www.ti.com 5.15 List of Test Points Table 1. The Functions of Each Test Points Test Points Name Description J1 VIN1 DC Input to VIN1 J2 VIN2 DC Input to VIN2 J3 VOUT1 DC Output from VOUT1 J4 VOUT2 DC Output from VOUT2 JP1 VBIAS Connects VBIAS to VIN1 JP2 C2 Connects C2 from VIN2 to GND JP3 C1 Connects C1 from VIN1 to GND JP4 C10 Connects C10 from VOUT2 to GND JP5 C7 Connects C7 from VOUT1 to GND JP6 R2 Connects R2 from VOUT2 to GND JP7 R1 Connects R1 from VOUT1 to GND JP8 R4 Connects R4 from VOUT2 to GND JP9 R3 Connects R3 from VOUT1 to GND JP10, JP11, JP12, JP13 VOUT1 // VOUT2 Shorts VOUT1 and VOUT2 together used in parallel switch configuration TP1 VIN1 VIN1 connection TP2 VIN2 VIN2 connection TP3 VIN1 SEN Sense connect to VIN1 TP4 VIN2 SEN Sense connect to VIN2 TP5 VOUT1 VOUT1 connection TP6 VOUT2 VOUT2 connection TP7 VOUT1 SEN Sense connect to VOUT1 TP8 VOUT2 SEN Sense connect to VOUT2 TP9 ON1 ON1 connection TP10 VBIAS VBIAS connection TP11 VOUT1 VOUT2 ON2 connection TP12 VOUT1 // VOUT2 VOUT1 VOUT2 connected in parallel configuration TP13 AGND Ground Connection TP14 AGND Ground Connection TP15 AGND Ground Connection TP16 AGND Ground Connection 5.16 Test Procedure Figure 5 shows a typical setup for the RON test of the EVM. VBIAS voltage must be present for the device to function, keep this voltage level constant between 2.5V-5.25V. Adding a shunt across JP1 will connect the VBIAS pin to VIN1. When testing with VIN1 below 2.5V JP1 shunt must be removed and VBIAS tied to another voltage source. 8 TPS22968EVM-007 Dual 4A Load Switch Copyright © 2014, Texas Instruments Incorporated SLVUA30 – January 2014 Submit Documentation Feedback Setup www.ti.com 5.17 RON Test Procedure 1. 2. 3. 4. Setup the EVM per Figure 5. Set SOURCE1 level to 5.0V. Place a shunt across JP1. Connect ON1 to a DC source between 1.05v and 5.5v, SOURCE1 supply can be used for this. (When testing RON it is desired to have the switch operating in the always ON condition.) 5. Connect ON2 to GND. This keeps switch 2 in the off state. 6. Place a load on VOUT1 and VOUT2. 7. Turn on SOURCE1. 8. Record the voltage reading from METER1, record the input current reading from SOURCE1. Calculate Ron by dividing METER1 voltage level by the current reading from SOURCE1. The result will be the RON value for switch 1. 9. Turn SOURCE1 off. 10. Remove ON1 from SOURCE1 and connect to GND. 11. Remove ON2 from GND and connect to SOURCE1. 12. Turn SOURCE1 on. 13. Record the voltage reading from METER2, record the input current reading from SOURCE1. Calculate RON by dividing the voltage reading of METER2 by the current reading from SOURCE1. The results will be the RON value for switch 2. 14. Turn SOURCE1 off. 5.18 tR, tON, tF, tOFF Test Procedure 1. The rise time (tR) is selected by the CT capacitor value on each switch channel. The EVM is shipped with a default CT value of 1nF. 2. Set up the EVM per Figure 6 3. Set SOURCE1 level to 5.0V. 4. Place a shunt across JP1. 5. Place a load on VOUT1 and VOUT2 (a 10Ω, 3.25W resistor is recommended for this test). 6. Set Signal Generator output to 0-2Vpp, 10-100Hz, and 25% duty cycle. 7. Turn SOURCE1 on. 8. Enable the Signal Generator output. 9. Rise time (tR) and turn-on time (tON) can be observed with a Oscilloscope sync the scope trigger on the rising edge of the on signal.. A detailed description of tR, tON, tF and tOFF are listed in the TPS22968 Datasheet under the Switching Characteristics Section. 10. Fall time (tF) and turn-of time (tOFF) can be observed from the oscilloscope by charging the scope triggering to sync with the falling edge of the ON signal. 11. Turn SOURCE1 off and disable the signal Generator output. SLVUA30 – January 2014 Submit Documentation Feedback TPS22968EVM-007 Dual 4A Load Switch Copyright © 2014, Texas Instruments Incorporated 9 Test Setup Test Setup TP13 TP13 J3 JP9 JP11 JP13 J3 TP12 TP12 JP4 JP6 JP8 R4 C10 R2 R4 JP10 JP12 JP12 JP8 C4 C2 JP6 TP11 TP11 C10 C8 R2 C6 C8 C4 J4 TP6 TP6 J4 JP1 C13 U1 JP4 JP2 JP2 C9 JP13 JP9 C6 C12 C13 C12 C2 C5 U1 TP10 C5 C3 C11 TP10 C3 TP5 C9 C11 TP5 JP11 JP7 JP7 C7 R3 C1 R1 JP3 R3 R1 JP5 JP1 1 TPS22966EVM-007 JP3 C7 TP9 TP9 C1 JP10 J1 TP1 TP1 J1 J2 TP2 TP2 TP16 TP8 TP8 J2 TP14 TP14 TP7 TP7 TP3 TP3 JP5 6 www.ti.com TP4 TP16 TP4 TP15 TP15 HVL007 Rev. A Figure 5. TPS22968EVM-007 Recommended Ron Test Set Up 10 TPS22968EVM-007 Dual 4A Load Switch SLVUA30 – January 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Test Setup www.ti.com TP1 TP3 TP3 TP13 TP13 JP11 JP10 JP12 J3 JP9 JP13 J3 TP12 TP12 JP8 C10 C2 C10 R2 R4 J4 TP6 TP6 J4 JP6 R4 JP4 R2 C4 TP11 TP11 JP8 C8 JP6 C8 C4 JP13 JP7 JP1 C13 U1 JP11 JP10 JP9 JP5 C7 JP7 TP5 C6 C12 C9 JP4 JP2 JP2 C5 C6 C12 C2 C5 C13 U1 C11 TP10 C3 C3 C11 TP5 C9 C1 R3 JP3 TP10 R3 R1 JP5 JP1 1 TPS22966EVM-007 JP3 C7 TP9 TP9 R1 C1 JP12 J1 J1 J2 TP2 TP2 TP16 TP8 TP8 J2 TP14 TP14 TP7 TP7 TP1 TP4 TP4 TP16 TP15 TP15 HVL007 Rev. A Figure 6. TPS22968EVM-007 Recommended Trise Test Set Up SLVUA30 – January 2014 Submit Documentation Feedback TPS22968EVM-007 Dual 4A Load Switch Copyright © 2014, Texas Instruments Incorporated 11 Performance Data and Typical Characteristic Curves 7 www.ti.com Performance Data and Typical Characteristic Curves Figure 7 through Figure 8 present typical performance curves for TPS22968EVM-007. 7.1 tR and tON Scope Capture Figure 7. TPS22968EVM-007 tR with VIN=5V, CT=1nF and Load =10Ω. 12 TPS22968EVM-007 Dual 4A Load Switch Copyright © 2014, Texas Instruments Incorporated SLVUA30 – January 2014 Submit Documentation Feedback www.ti.com 7.2 Performance Data and Typical Characteristic Curves tF and tOFF Scope Capture Figure 8. TPS22968EVM-007 7.3 Parallel Switch Operation The TPS22968 device switches can be connected in parallel configuration by adding shorting shunts across JP10, JP11, JP12, and JP13. Parallel switch configuration lowers RON and raises maximum continuous current capability. Refer to Applications Note SLVA585 for further details. SLVUA30 – January 2014 Submit Documentation Feedback TPS22968EVM-007 Dual 4A Load Switch Copyright © 2014, Texas Instruments Incorporated 13 Bill of Materials 8 www.ti.com Bill of Materials Table 2 is the EVM components list according to the schematic shown in Figure 1. Table 2. EVM Components List Count RefDes Value Description Size Part Number MFR 0 C1, C2, C7, C10 DNP Capacitor, Ceramic, 25V, X7R, 20% 603 Std Std 3 C11, C12, C13 0.01µF Capacitor, Ceramic, 16V, X7R, 20% 603 Std Std 2 C3, C4 1µF Capacitor, Ceramic,16V, X7R, 20% 603 Std Std 2 C5, C8 0.1µF Capacitor, Ceramic, 25V, X7R, 20% 603 Std Std 2 C6, C9 1nF Capacitor, Ceramic, 25V, X7R, 20% 603 Std Std 1 JP1 PEC02SAAN Header, Male 2-pin, 100mil spacing 0.100 inch x 2 PEC02SAAN Sullins 12 JP2, JP3, JP4, JP5, JP6, JP7, JP8, JP9, JP10, JP11, JP12, JP13 PEC02SAAN Header, Male 2-pin, 100mil spacing 0.100 inch x 2 PEC02SAAN Sullins 0 R1, R2, R3, R4 DNP Resistor, Chip, 1/16W, x% 805 Std Std 12 TP1, TP2, TP3, TP4, TP5, TP6, TP7, TP8, TP9, TP10, TP11, TP12 5010 Test Point, Red, Thru Hole Compact Style 0.125 x 0.125 inch 5010 Keystone 4 TP13, TP14, TP15, TP16 5011 Test Point, Black, Thru Hole Compact Style 0.125 x 0.125 inch 5011 Keystone 4 J1, J2, J3, J4 ED120/2DS Terminal Block, 2-pin, 15-A, 5.1mm 0.512 inch ED120/2DS OST 1 U1 TPS22968DPU IC, 6-A Dual Load Switch With Controlled Turn-On PWSON TPS22968DPU TI 1 -- HVL007 Any 929950-00 3M 1 PCB, 2.98 In x 2.22 In x 0.062 In Shunt, Black 100-mil Notes: 1. These assemblies are ESD sensitive, ESD precautions shall be observed. 2. These assemblies must be clean and free from flux and all contaminants. Use of no clean flux is not acceptable. 3. These assemblies must comply with workmanship standards IPC-A-610 Class 2. 4. Ref designators marked with an asterisk ('**') cannot be substituted. All other components can be substituted with equivalent MFG's components. 14 TPS22968EVM-007 Dual 4A Load Switch Copyright © 2014, Texas Instruments Incorporated SLVUA30 – January 2014 Submit Documentation Feedback EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. 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These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: • Reorient or relocate the receiving antenna. • Increase the separation between the equipment and receiver. • Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. • Consult the dealer or an experienced radio/TV technician for help. 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To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. Cet appareil numérique de la classe A ou B est conforme à la norme NMB-003 du Canada. Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité de l'utilisateur pour actionner l'équipement. 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Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur. SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER 【Important Notice for Users of EVMs for RF Products in Japan】 】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan, Use this product only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to this product, or Use of this product only after you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to this product. Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan. 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It is intended solely for use for preliminary feasibility evaluation in laboratory/development environments by technically qualified electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems and subsystems. It should not be used as all or part of a finished end product. Your Sole Responsibility and Risk. You acknowledge, represent and agree that: 1. 2. 3. 4. You have unique knowledge concerning Federal, State and local regulatory requirements (including but not limited to Food and Drug Administration regulations, if applicable) which relate to your products and which relate to your use (and/or that of your employees, affiliates, contractors or designees) of the EVM for evaluation, testing and other purposes. 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