TPS28226DRBTG4

Sample & Buy Product Folder Support & Community Tools & Software Technical Documents Reference Design TPS28226 SLUS791A – JULY 2007 – REVISED SEPTEMBER 2015 TPS28226 High-Frequency 4-A Sink Synchronous MOSFET Drivers 1 Features 2 Applications • • 1 • • • • • • • • • • • • • • Drives Two N-Channel MOSFETs with 14-ns Adaptive Dead Time Wide Gate Drive Voltage: 4.5 V Up to 8.8 V With Best Efficiency at 7 V to 8 V Wide Power System Train Input Voltage: 3 V Up to 27 V Wide Input PWM Signals: 2.0 V up to 13.2-V Amplitude Capable to Drive MOSFETs with ≥40-A Current per Phase High Frequency Operation: 14-ns Propagation Delay and 10-ns Rise/Fall Time Allow FSW – 2 MHz Capable to Propagate 160°C EN/PG FALLING > 1.0 V EN/PG RISING < 1.7 V PWM < 1 V PWM > 1.5 V AND TRISE/TFALL < 200 ns PWM SIGNAL SOURCE IMPEDANCE >40 kΩ FOR > 250 ns (3-State) (1) LGATE Low Low High Low Low UGATE Low Low Low High Low EN/PG Low – – – – (1) To exit the 3-state condition, the PWM signal should go low. One High PWM input signal followed by one Low PWM input signal is required before re-entering the 3-state condition. 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information To effect fast switching of power devices and reduce associated switching power losses, a powerful MOSFET driver is employed between the PWM output of controllers and the gates of the power semiconductor devices. Also, MOSFET drivers are indispensable when it is impossible for the PWM controller to directly drive the MOSFETs of the switching devices. With the advent of digital power, this situation will be often encountered because the PWM signal from the digital controller is often a 3.3-V logic signal which cannot effectively turn on a power switch. Level shifting circuitry is needed to boost the 3.3-V signal to the gate-drive voltage (such as 12 V) in order to fully turn on the power device and minimize conduction losses. Traditional buffer drive circuits based on NPN/PNP bipolar transistors in totem-pole arrangement, being emitter follower configurations, prove inadequate with digital power because they lack level-shifting capability. MOSFET drivers effectively combine both the level-shifting and buffer-drive functions. MOSFET drivers also find other needs such as minimizing the effect of high-frequency switching noise by locating the high-current driver physically close to the power switch, driving gate-drive transformers and controlling floating power-device gates, reducing power dissipation and thermal stress in controllers by moving gate charge power losses from the controller into the driver. Submit Documentation Feedback Copyright © 2007–2015, Texas Instruments Incorporated Product Folder Links: TPS28226 17 TPS28226 SLUS791A – JULY 2007 – REVISED SEPTEMBER 2015 www.ti.com 8.2 Typical Application The DC-DC converter in Figure 25 displays the schematic of the TPS28226 in a multiphase high-current stepdown power supply (only one phase is shown). This design uses a single high-side MOSFET Q10 and two lowside MOSFETs Q8 and Q9, the latter connected in parallel. The TPS28226 is controlled by multiphase buck DCto-DC controller like TPS40090. As TPS28226 has internal shoot-through protection only one PWM control signal is required for each channel. Figure 25. One of Four Phases Driven by TPS28226 Driver in 4-Phase VRM Reference Design 18 Submit Documentation Feedback Copyright © 2007–2015, Texas Instruments Incorporated Product Folder Links: TPS28226 TPS28226 www.ti.com SLUS791A – JULY 2007 – REVISED SEPTEMBER 2015 Typical Application (continued) 8.2.1 Design Requirements The VRM Reference Design is capable of driving 35 A per phase. In this example it has a nominal input voltage of 12 V within a tolerance range of ±5%. The switching frequency is 500 kHz. The nominal duty cycle is 10%, therefore the low-side MOSFETs are conducting 90% of the time. By choosing lower RDS(on) the conduction losses of the switching elements are minimized. Table 2. VRM Reference Design Requirements DESIGN PARAMETER VALUE Supply voltage 12 V ±5% Output voltage 0.83 V to 1.6 V Frequency 500 kHz Peak-to-peak output voltage variation on load current transient (0 A to 100 A ) within 1 µs