TPS62841YBGR

Order Now Product Folder Support & Community Tools & Software Technical Documents TPS62840 SLVSEC6D – JUNE 2019 – REVISED MARCH 2020 TPS62840 1.8-V to 6.5-V, 750-mA, 60-nA IQ Step-Down Converter 1 Features 3 Description • • • • • • • • • • • • The TPS62840 is a high-efficiency step-down converter with ultra-low operating quiescent current of typically 60 nA. The device contains special circuitry to achieve just 120 nA IQ in 100% mode to further extend battery life near the end of discharge. 1 60-nA operating quiescent current 100% duty-cycle mode with 120-nA IQ Input voltage range VIN from 1.8 V to 6.5 V Output current up to 750 mA RF friendly DCS-Control™ 80% efficiency at 1 µA IOUT (3.6 VIN to 1.8 VOUT) 16 selectable output voltages via VSET pin Auto transition PFM/PWM or forced-PWM mode Selectable forced PWM and STOP modes Output discharge function 25-nA shutdown current SON-8, WCSP-6 and thermally enhanced HVSSOP-8 packages 2 Applications • • • • • • • The device uses DCS-Control to cleanly power radios and operates with a typical switching frequency of 1.8 MHz. In Power-Save Mode, the device extends the light load efficiency down to a load current range of 1 μA and below. 16 predefined output voltages can be selected by connecting a resistor to pin VSET, making the device flexible for various applications with a minimum amount of external components. The STOP pin of the device immediately eliminates any switching noise in order to take a noise-free measurement in test and measurement systems. The TPS62840 provides an output current of up to 750 mA. With an input voltage of 1.8 V to 6.5 V, the device supports multiple power sources such as 2S to 4S Alkaline, 1S to 2S Li-MnO2, or 1S Li-Ion/LiSOCl2. Smart meters, smart thermostats Asset tracking devices Wearable electronics Medical sensor patches and patient monitors Industrial IoT (smart sensors) / NB-IoT Test and measurement ATEX / intrinsic safety Device Information(1) PART NUMBER TPS6284x PACKAGE BODY SIZE (NOM) 8 pin DLC (SON) 1.5 mm x 2 mm 6 pin YBG (WCSP) 0.97 mm x 1.47 mm 8 pin DGR (HVSSOP) 3 mm x 5 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Typical Application TPS62841DLC VIN CI 4.7 µF RUN /STOP VOUT VOS MODE STOP EN 90 CO 10µF VSET ENABLE 95 SW GND MODE 100 L 2.2 µH 85 Efficiency (%) VIN Efficiency versus Load Current (VOUT = 1.8 V) RSET 80 75 70 65 VIN VIN VIN VIN VIN VIN VIN 60 55 50 45 40 100n 1P 10P 100P 1m 10m Output Current (A) = = = = = = = 100m 1.8V 2.5V 3.0V 3.6V 4.2V 5.0V 6.5V 1 D002 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS62840 SLVSEC6D – JUNE 2019 – REVISED MARCH 2020 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Comparison Table..................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6 7.1 7.2 7.3 7.4 7.5 7.6 6 6 6 6 7 9 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description ............................................ 11 8.1 Overview ................................................................. 11 8.2 Functional Block Diagram ....................................... 11 8.3 Feature Description................................................. 12 8.4 Device Functional Modes........................................ 15 9 Application and Implementation ........................ 16 9.1 Application Information............................................ 16 9.2 Typical Application ................................................. 16 9.3 System Example ..................................................... 27 10 Power Supply Recommendations ..................... 28 11 Layout................................................................... 28 11.1 Layout Guidelines ................................................. 28 11.2 Layout Example .................................................... 28 12 Device and Documentation Support ................. 30 12.1 12.2 12.3 12.4 12.5 Device Support...................................................... Support Resources ............................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 30 30 30 30 30 13 Mechanical, Packaging, and Orderable Information ........................................................... 30 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (November 2019) to Revision D Page • Updated the Device Comparison Table ................................................................................................................................ 3 • Added efficiency graphs to the Application Curves .............................................................................................................. 20 Changes from Revision B (August 2019) to Revision C Page • Added SON-8, WCSP-6, and thermally enhanced HVSSOP-8 to Features .......................................................................... 1 • Added ATEX / Intrinsic safety to Applications ....................................................................................................................... 1 • Updated Typical Application image to show TPS62842DGR device ..................................................................................... 1 • Added orderable part number TPS62841DGR to Device Comparison Table ....................................................................... 3 • Added orderable part number TPS62842DGR to Device Comparison Table ....................................................................... 3 • Updated Thermal Information values to support TPS62842DGR .......................................................................................... 6 • Added low-side MOSFET switch current limit to Electrical Characteristics ........................................................................... 8 • Added TPS62841DGR to Output Voltage Selection ........................................................................................................... 13 • Updated Efficiency Power Save graphs in Application Curves ............................................................................................ 20 • Updated Load Transient waveform in Application Curves ................................................................................................... 24 • Added PCB layout for DGR package ................................................................................................................................... 29 Changes from Revision A (July 2019) to Revision B • 2 Page Changed Advance Information marketing status to Production Data ................................................................................... 1 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TPS62840 TPS62840 www.ti.com SLVSEC6D – JUNE 2019 – REVISED MARCH 2020 5 Device Comparison Table ORDERABLE PART NUMBER TPS62840DLC TPS62840YBG OUTPUT VOLTAGE 1.8 V to 3.3 V in 100-mV steps OUTPUT CURRENT 750 mA OUTPUT DISCHARGE MODE PIN STOP PIN PACKAGE PACKAGE MARKING yes yes SON-8 (DLC) E5 no no WCSP-6 (YBG) 62840 yes yes SON-8 (DLC) E9 no no WCSP-6 (YBG) 62841 yes no HVSSOP-8 (DGR) 62841 no HVSSOP-8 (DGR) 62842 yes SON-8 (DLC) FF yes TPS62841DLC TPS62841YBG 0.8 V to 1.55 V in 50-mV steps 750 mA yes TPS62841DGR TPS62842DGR TPS62849DLC 1.8 V, 2.0 V, 2.2 V, 2.4 V to 3.6 V in 100-mV steps 750 mA yes 3.4-V fixed output voltage yes Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TPS62840 3 TPS62840 SLVSEC6D – JUNE 2019 – REVISED MARCH 2020 www.ti.com 6 Pin Configuration and Functions DLC SON-8 Bottom view Top view GND VIN MODE EN VOS SW STOP VSET 8 1 2 7 3 6 4 5 VOS SW STOP VSET GND VIN MODE EN 1 8 7 2 6 3 5 4 DGR HVSSOP-8 Bottom view Top view VOS SW MODE VSET 1 8 2 7 EP 3 6 4 5 GND NC VIN EN GND NC VIN EN 8 1 7 2 EP 6 3 5 4 VOS SW MODE VSET YBG WCSP-6 Top view 4 1 2 A GND VOS B VIN C EN Bottom view 2 1 A VOS GND SW B SW VIN VSET C VSET EN Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TPS62840 TPS62840 www.ti.com SLVSEC6D – JUNE 2019 – REVISED MARCH 2020 Pin Functions PIN DLC (SON-8) DGR (HVSSOP-8) YBG (WCSP-6) I/O VIN 2 6 B1 PWR VIN power supply pin. Connect the input capacitor close to this pin for best noise and voltage spike suppression. A 4.7-µF ceramic capacitor is required. SW 7 2 B2 PWR The switch pin is connected to the internal MOSFET switches. Connect the inductor to this terminal. GND 1 8 A1 PWR GND supply pin. Connect this pin close to the GND terminal of the input and output capacitors. VSET 5 4 C2 IN Connecting a resistor to GND sets the output voltage when the converter is enabled. For the TPS62849, connect this pin to GND. VOS 8 1 A2 IN Output voltage sense pin for the internal feedback divider network and regulation loop. When the converter is disabled, this pin discharges VOUT by an internal MOSFET. Connect this pin directly to the output capacitor with a short trace. EN 4 5 C1 IN Enable pin. A high level enables the device and a low level turns the device off. The pin features an internal pulldown resistor, which is disabled once the device has started up and the output voltage is regulated. The pulldown resistor is activated again, once a low level has been detected. STOP 6 n/a n/a IN STOP Switching pin. When this pin is logic high, the converter stops switching in order to provide a quiet supply rail. The output is powered from the charge available in the output capacitor. When this pin is logic low, the device immediately resumes operation. The pin features an internal pulldown resistor, which is disabled once a high level is detected at the input. The pulldown resistor is activated again, once a low level has been detected. MODE 3 3 n/a IN MODE pin. A low level enables Power-Save Mode operation with an automatic transition between PFM and PWM modes. A high level forces the converter to operated in PWM mode. This pin can be toggled during operation. It must be terminated. NC n/a 7 n/a EP n/a 9 n/a NAME (1) DESCRIPTION This pin is not connected internally. Do not connect this pin. PWR Exposed thermal pad (1). The PowerPAD must be connected to GND. For more information about the PowerPAD, see the PowerPAD™ Thermally Enhanced Package application report. Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TPS62840 5 TPS62840 SLVSEC6D – JUNE 2019 – REVISED MARCH 2020 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings (1) MIN MAX VIN –0.3 7 V SW (DC) –0.3 VIN + 0.3 V SW (AC), less than 10ns (3) –2.0 8.5 V EN, MODE, STOP –0.3 6.5 V VSET –0.3 VIN + 0.3 < 3.6 V VOS –0.3 3.7 V Operating junction temperature, TJ –40 150 °C Storage temperature, Tstg –65 150 °C Pin voltage (2) (1) (2) (3) UNIT Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal GND. While switching. 7.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±2000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) ±500 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions MIN VIN Supply voltage VIN L Effective inductance COUT Effective output capacitance CIN Effective input capacitance CVSET External parasitic capacitance at VSET pin UNIT V 2.2 2.9 µH 3 10 40 µF 1 4.7 0.909 External voltage selection resistor tolerance µF 100 pF 267 kΩ 1% External voltage selection resistor temperature coefficient TJ MAX 6.5 1.51 Nominal resistance range for external voltage selection resistor (E96 resistor series) RSET NOM 1.8 ±200 ppm/°C Operating junction temperature range -40 125 °C 7.4 Thermal Information THERMAL METRIC (1) 8 Pins DLC Package 6 Pins YBG Package JEDEC PCB 51-7 RθJA DGR EVM JEDEC PCB 51-5 TPS62841-2EVM123 UNIT 105.6 133.4 54.4 46.9 °C/W RθJC(top) Junction-to-case (top) thermal resistance 75.7 0.4 58.1 N/A °C/W RθJB Junction-to-board thermal resistance 31.9 39.4 25.9 N/A °C/W ψJT Junction-to-top characterization parameter 2.3 0.1 1.2 0.9 °C/W ψJB Junction-to-board characterization parameter 31.5 39.4 25.9 17.4 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a 11.7 N/A °C/W (1) 6 Junction-to-ambient thermal resistance 8 Pins DGR Package For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TPS62840 TPS62840 www.ti.com SLVSEC6D – JUNE 2019 – REVISED MARCH 2020 7.5 Electrical Characteristics VIN = 3.6 V, TJ = –40°C to 125°C, STOP = GND, MODE = GND, typical values are at TJ = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY IQ_NO_LOAD No load operating input current EN = VIN, IOUT = 0µA, VOUT = 1.8V device switching 60 nA IQ_NO_LOAD No load operating input current EN = VIN, IOUT = 0µA, VOUT = 1.2V device switching 80 nA IQ_NO_LOAD No load operating input current (PWM Mode) EN = VIN, IOUT = 0µA, VOUT = 1.8V, MODE = VIN device switching 3 mA IQ_VIN Operating quiescent current into pin VIN EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT = 1.8V device not switching, TJ = 25°C (DLC package option) 36 100 nA IQ_VOS Operating quiescent current into pin VOS EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT = 1.8V device not switching, TJ = 25°C (DLC package option) 56 120 nA IQ_VIN Operating quiescent current into pin VIN EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT = 1.8V device not switching, TJ = -40°C to 85°C 36 360 nA IQ_VOS Operating quiescent current into pin VOS EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT = 1.8V device not switching, TJ = -40°C to 85°C 56 170 nA EN = VIN, VOUT = 3.3V device not switching 70 nA EN = VIN, VOUT < 1.5 V device not switching 5 nA EN, STOP = VIN, 3V < VOUT < 3.3V TJ = -40°C to 85°C 5 IQ_VOS Operating quiescent current into VOS pin 100 nA IQ_100%_MODE Operating quiescent current 100% Mode VIN = VOUT = 3.3V, TJ = -40°C to 85°C IQ_VIN_STOP Operating quiescent current into pin VIN STOP = High, VOUT = 1.8V, TJ = -40°C to 85°C 70 175 µA ISD Shutdown current EN = GND, shutdown current into VIN VSET = GND, TJ = -40°C to 85°C 25 300 nA VTH_UVLO+ VTH_UVLO– Undervoltage lockout threshold 120 nA Rising VIN 1.72 1.8 V Falling VIN 1.45 1.75 V EN, MODE, STOP INPUTS VIH_TH High level input voltage VIL_TH Low level input voltage 1.1 IIN Input bias current MODE input, TJ = -40°C to 85°C RPD Internal pull-down resistance EN, STOP inputs V 1 200 0.4 V 25 nA 450 Submit Documentation Feedback Copyright © 2019–2020, Texas Instruments Incorporated Product Folder Links: TPS62840 kΩ 7 TPS62840 SLVSEC6D – JUNE 2019 – REVISED MARCH 2020 www.ti.com Electrical Characteristics (continued) VIN = 3.6 V, TJ = –40°C to 125°C, STOP = GND, MODE = GND, typical values are at TJ = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SWITCHES RDS(ON) High-side MOSFET on-resistance (DLC, YBG package) VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C 430 600 VIN = 5V, I = 200mA, TJ = -40°C to 85°C 340 465 Low-side MOSFET on-resistance (DLC, YBG package) VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C 170 240 VIN = 5V, I = 200mA, TJ = -40°C to 85°C 135 180 High-side MOSFET on-resistance (DGR package) VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C 460 630 VIN = 5V, I = 200mA, TJ = -40°C to 85°C 370 495 Low-side MOSFET on-resistance (DGR package) VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C 200 270 VIN = 5V, I = 200mA, TJ = -40°C to 85°C 165 210 0.15 0.225 0.3 A 1.0 1.2 1.4 A Soft-start switch current limit (1) ILIMF_SS High-side MOSFET switch current limit (1) ILIMF mΩ mΩ mΩ mΩ Low-side MOSFET switch current limit 1.0 A ILIMN Negative current limit 533 mA tI_LIM_DELAY Current limit propagation delay 50 ns ILKG_SW Leakage current into SW pin 10 nA VSW = 1.8V, TJ = -40°C to 85°C OUTPUT VOLTAGE DISCHARGE IDISCHARGE_VOS Output discharge current EN = GND, sink current into VOS pin, over VIN range VOUT = 1.8V, TJ = -40°C to 85°C 16 35 44 mA THERMAL PROTECTION Thermal shutdown temperature TSD Rising junction temperature, PWM Mode Thermal shutdown hysteresis 160 °C 5 °C OUTPUT VOUT Output voltage accuracy PWM Mode, IOUT = 0 mA, VOUT >= 1.8 V PWM Mode, IOUT = 0 mA, VOUT