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TPS63805
SLVSDS9A – JULY 2018 – REVISED OCTOBER 2018
TPS63805 High Current, High Efficiency Single Inductor Buck-Boost Converter
1 Features
2 Applications
•
•
1
•
•
•
•
•
•
Input Voltage Range: 1.3 V to 5.5 V
(>1.8 V for Device Start-up)
Adjustable Output Voltage Range: 1.8 V to 5 V
2-A Output Current for VIN ≥ 2.3 V, VOUT = 3.3 V
High Efficiency over the entire load range
– 11-μA Operating Quiescent Current
– Power Save Mode with Mode Selection
Peak Current Buck-Boost Mode Architecture
– Seamless Transition within Operation Modes
– Wide Output Capacitor Selection
– Forward and Reverse Current Operation
Safety- and Robust Operation Features
– Integrated Soft Start
– Over-Temperature- and Over-VoltageProtection
– True Shutdown Function with Load Disconnect
Tiny Solution Size
– 1.4 mm x 2.3 mm Package size
– Small 0.47 µH inductor, Single 22 µF Output
Capacitor
•
•
•
•
System Pre-Regulator (Smartphone, Tablet, EFT
Terminal, Telematics)
Point-of-Load Regulation (Wired Sensor,
Port/Cable Adapter and Dongle)
Fingerprint / Face-ID / Camera Sensors
(Smartphone, Electronic Smart Lock, IP Network
Camera)
RF Amplifier Supply (Smart Sensors)
Thermoelectric Device (TEC) Supply (Datacom
Optical Modules)
3 Description
The TPS63805 is a high efficiency, high output
current buck-boost converter. It is used when the
input voltage is higher, equal, or lower than the output
voltage. Output currents up to 2 A are supported over
a wide voltage range. The device limits the peak
current at 4.5 A in Boost-Mode and 3.5 A in BuckMode. The device is adjusted to the programmed
output voltage. It automatically changes from buck to
boost operation based on the input voltage. It
remains in a 3-cycle buck-boost mode when the input
voltage is approximately equal to the output voltage.
The transitions happen seamlessly and avoids
unwanted toggling within the modes. The TPS63805
comes in a 1.4 mm x 2.3 mm package. The device
works with tiny passive components to keep the
overall solution size small.
Device Information(1)
PART NUMBER
TPS63805
PACKAGE
3x5 Balls WCSP
(0.4mm pitch)
BODY SIZE (NOM)
2.3 mm x 1.4 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Typical Application
Efficiency vs Output Current (VO = 3.3V)
0.47µH
1
0,96
0,92
L2
VIN
VOUT
3.3V / 2A
VOUT
22 …F
10 …F
EN
PG
MODE
FB
0,88
Efficiency
L1
VIN
1.3V t 5.5V
0,84
0,8
0,76
0,72
VIN
VIN
VIN
VIN
0,68
GND
AGND
TPS63805
0,64
0,6
100P
1m
10m
100m
Output Current (A)
=
=
=
=
2.5V
3.0V
3.7V
4.3V
1
2
D002
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS63805
SLVSDS9A – JULY 2018 – REVISED OCTOBER 2018
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
4
7.1
7.2
7.3
7.4
7.5
7.6
4
4
4
4
5
7
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
8.3 Feature Description................................................... 9
8.4 Device Functional Modes........................................ 12
9
Application and Implementation ........................ 17
9.1 Application Information............................................ 17
10 Power Supply Recommendations ..................... 24
11 Layout................................................................... 24
11.1 Layout Requirements ............................................ 24
11.2 Layout Example .................................................... 24
12 Device and Documentation Support ................. 25
12.1
12.2
12.3
12.4
12.5
12.6
Detailed Description .............................................. 8
8.1 Overview ................................................................... 8
8.2 Functional Block Diagram ......................................... 8
Device Support......................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
25
25
25
25
25
25
13 Mechanical, Packaging, and Orderable
Information ........................................................... 25
4 Revision History
2
DATE
REVISION
NOTES
October 2018
A
Initial release
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5 Device Comparison Table
PART NUMBER
VOUT
TPS63805
Adjustable
6 Pin Configuration and Functions
WCSP Package
Top View
Pin Functions table
PIN
NO
DESCRIPTION
NAME
A2, A3
VIN
Supply voltage
B2, B3
L1
Connection for inductor
A1
EN
Device Enable input. Set HIGH to enable and LOW to disable. It must not be left floating
GND
Power ground
B1
MODE
PFM/PWM mode selection. Set LOW for power safe mode, set HIGH for forced PWM mode. It must not be
left floating
C1
C2, C3
AGND
Analog ground
D2, D3
L2
Connection for inductor
E2, E3
VOUT
Power stage output
D1
FB
Voltage feedback sensing Pin
E1
PG
Power good indicator, open drain output
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7 Specifications
7.1 Absolute Maximum Ratings
over junction temperature range (unless otherwise noted) (1)
Voltage (2)
MIN
MAX
VIN, L1, L2, EN, PFM/PWM, VOUT, FB
–0.3
6.0
L1, L2 (AC, less than 10ns)
UNIT
V
-3.0
9.0
Operating junction temperature, TJ
–40
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground pin.
7.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
MIN
NOM
MAX
UNIT
VIN
Input voltage
1.3
5.5
V
VOUT
Output voltage
1.8
5.0
V
CIN
Effective capacitance connected to VIN (Ceramic-type placed close to VIN
Terminal)
L
Effective inductance
COUT
Effective capacitance connected to VOUT
TJ
Operating junction temperature
4
5
0.37
0.47
7
10
–40
μF
0.57
μH
μF
125
°C
7.4 Thermal Information
over operating free-air temperature range (unless otherwise noted)
TPS63805
THERMAL METRIC
3x5 Ball WCSP
UNIT
15 PINS
RΘJA
Junction-to-ambient thermal resistance
78.8
°C/W
RΘJC(top)
Junction-to-case (top) thermal resistance
0.6
°C/W
RΘJB
Junction-to-board thermal resistance
19.5
°C/W
ΨJT
Junction-to-top characterization parameter
0.3
°C/W
ΨJB
Junction-to-board characterization parameter
19.5
°C/W
RΘJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
4
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7.5 Electrical Characteristics
VIN= 1.8 V to 5.5 V, VOUT = 1.8 V - 5.0 V , TJ= –40°C to +125°C, typical values are at TJ= 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VOUT ≥ 1.8 V
VIN
Input voltage (operation)
VIN;START
Input voltage (Device start-up)
VIN;LOAD
Minimum input voltage for full load,
once started
IOUT = 2 A, VOUT = 3.3 V, TJ =
25°C
2.3
V
IQ;VIN
Quiescent current into VIN
TJ = 25°C, EN = VIN = 3.6 V, VOUT =
3.3 V, not switching
11
μA
ISD
Shutdown current into VIN
EN = low, -40°C ≤ TJ ≤ 85°C, VIN =
3.6 V, VOUT = 0 V
Undervoltage lockout threshold
VIN falling, VOUT ≥ 1.8 V, once
started
1.2
1.6
UVLO
Undervoltage lockout threshold
VIN rising
TSD
Thermal shutdown
Temperature rising
TSD;HYST
Thermal shutdown hysteresis
VIVP
Input Overvoltage Protection
1.3
5.5
V
1.8
5.5
V
5.50
0.01
0.6
µA
1.25
1.29
V
1.7
1.79
V
150
°C
20
°C
5.66
5.78
V
SOFT-START, POWER GOOD
tSS
Soft-start, Current limit ramp time
TJ = 25°C, from 0 V to 0.95xVOUT,
VIN = 3.6 V, VOUT = 3.3 V, no load
0.6
ms
tEN;DELAY
Delay from EN-edge until rising
VOUT
TJ = 25°C, VIN = 3.6 V
100
μs
LOGIC SIGNALS EN, MODE
VTHR;EN
Threshold Voltage rising for EN-Pin
1.07
1.1
1.13
V
VTHF;EN
Threshold Voltage falling for EN-Pin
0.97
1
1.03
V
VIH
High-level input voltage
VIL
Low-level input voltage
VPG;rising
Power Good threshold voltage
VPG;falling
1.2
V
0.4
VOUT rising, referenced to VOUT
nominal
95%
VOUT falling, referenced to VOUT
nominal
90%
VPG;Low
Power Good low-level output voltage ISINK = 1 mA
tPG;delay
Power Good delay time
Ilkg
Input leakage current
0.4
VFB falling
40
0.01
V
V
µS
0.2
µA
5.0
V
0.6
µA
OUTPUT
VOUT
Output Voltage
1.8
EN = low, -40°C ≤ TJ ≤ 85°C, VIN =
0.0 V, VOUT = 3.3 V
ISD
Shutdown current into VOUT
VFB
Feedback Regulation Voltage
VFB
Feedback Voltage accuracy
PWM mode
–1%
1%
VFB
Feedback Voltage accuracy
PFM mode
–1%
3%
VOVP
Overvoltage Protection
Clamping Voltage to protect the
device output
5.50
5.66
5.78
V
ISKIP
Peak Inductor Current to enter PFMVIN = 3.6 V; VOUT = 3.3 V
Mode
550
700
900
mA
IFB
Feedback Input Bias Current
VFB = 500 mV
10
100
nA
Peak Current Limit, Boost Mode
VIN ≥ 2.5V
3.5
4.8
5.8
A
Peak Current Limit, Buck-Boost
Mode
VIN ≥ 2.5V
4.5
A
Peak Current Limit, Buck Mode
VIN ≥ 2.5V
3.5
A
Peak Current Limit for Reverse
Operation
VIN = 3.6 V, VOUT = 3.3 V
-0.75
A
IPK
IPK;Reverse
0.01
500
-0.5
mV
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Electrical Characteristics (continued)
VIN= 1.8 V to 5.5 V, VOUT = 1.8 V - 5.0 V , TJ= –40°C to +125°C, typical values are at TJ= 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Buck
RDS;ON
High-side FET on-resistance
VIN = 3 V, VOUT = 3.3 V
47
mΩ
Low-side FET on-resistance
VIN = 3 V, VOUT = 3.3 V
30
mΩ
Boost
RDS;ON
High-side FET on-resistance
VIN = 3 V, VOUT = 3.3 V
43
mΩ
Low-side FET on-resistance
VIN = 3 V, VOUT = 3.3 V
18
mΩ
fSW
Inductor Switching Frequency, Boost VIN = 2.3V, VOUT = 3.3V, no Load,
Mode
MODE = HIGH, TJ = 25°C
2.1
MHz
fSW
Inductor Switching Frequency, Buck
Mode
2.7
MHz
fSW
Inductor Switching Frequency, Buck- VIN = 3.3V, VOUT = 3.3V, no Load,
Boost Mode
MODE = HIGH, TJ = 25°C
1.4
MHz
Line regulation
VIN = 2.4 V to 5.5 V, VOUT = 3.3V,
IOUT = 2 A
0.5%
Load regulation
VIN= 3.6 V, VOUT = 3.3V, IOUT = 0 A
to 2 A, PWM Mode
0.5%
6
VIN = 4.3, VOUT = 3.3V, no Load,
MODE = HIGH, TJ = 25°C
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7.6 Typical Characteristics
16
1.4
VI = 1.8V
VI = 3.6V
VI = 5.5V
1
12
0.8
10
0.6
8
0.4
6
0.2
4
0
2
-0.2
-40
-20
0
VI = 1.8V
VI = 3.6V
VI = 5.5V
14
IQ [PA]
ISD [PA]
1.2
20
40
60
80
Temperature [°C]
100
120
140
0
-40
-20
D001
fsw_
EN = LOW
MODE = LOW
Figure 1. Shutdown Current vs. Temperature
0
20
40
60
80
Temperature [°C]
100
120
140
D001
fsw_
VO = 3.3V, 0mA load, not switching
Figure 2. Quiescent Current vs Temperature
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8 Detailed Description
8.1 Overview
The TPS63805 Buck-Boost converter uses 4 internal switches to maintain synchronous power conversion at all
possible operating conditions. This enables the device to keep high efficiency over a wide input voltage and
output load range. To regulate the output voltage at all possible input voltage conditions, the device automatically
transits between buck, buck-boost and boost operation as required by the configuration. In buck and boost
modes, it always uses one active switch, one rectifying switch, one switch on, and one switch held off. Therefore,
it operates as a buck converter when the input voltage is higher than the output voltage, and as a boost
converter when the input voltage is lower than the output voltage. When the input voltage is close to the output
voltage, it operates in a 3-cycle buck-boost operation. In this mode all 4 switches are active (seeBuck-Boost
Operation) The RMS current through the switches and the inductor is kept at a minimum, to minimize switching
and conduction losses. Controlling the switches this way allows the converter to always keep high efficiency over
the complete input voltage range. The device provides a seamless transition between all modes.
8.2 Functional Block Diagram
L
L1
L2
VOUT
VIN
CIN
COUT
Current
Sensor
Gate
Driver
Gate
Driver
Device
Control
Device
Control
VIN
VMAX Switch
VOUT
PG
Device
Control
EN
+
Ref
1.1V
Device Control
FB
+
±
VIN
MODE
VOUT
GND
Power Safe Mode
Protection
Current Limit
Buck/Boost Control
Off-time calculation
Soft-Start
±
+
±
Gate
Driver
Ref
500mV
Power
Good
AGND
L1, L2
8
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8.3 Feature Description
8.3.1 Control Loop Description
TPS63805 uses a peak current mode control architecture. It has an inner current loop where it measures the
peak current of the boost High-Side MOSFET and compares it to a reference current. This current is the output
of the outer voltage loop. It measures the output voltage via the FB-Pin and compares it with the internal voltage
reference. That means, the outer voltage loop measures the voltage error (VREF-VFB) and transforms it into the
system current demand (IREF) for the inner Current Loop.
Figure 3 shows the simplified schematic of the control loop. The Error Amplifier and its Type-2 compensation
represent the voltage loop. Its voltage output is converted into ther reference current IREF and fed into the
current comparator.
The Scheme shows as well the Skip-Comparator handling the Power Safe Mode (PFM) to achieve high
Efficiency at light loads. See Power Save Mode Operation for further details.
VIN
L1
IPK
±
IREF
+
FB
VEA
+
Ref
500mV
Gate
Driver
±
+
ISKIP
±
Figure 3. Control Loop Architecture Scheme
8.3.2 Precise Device Enable: Threshold- or delayed Enable
The Enable-Pin is a digital input to enable or disable the device by applying a high- or low-level. The device
enters shutdown when EN is set low. In addition, this input features a precise threshold and can be used as a
comparator that enables/disables the part at a defined threshold. This allows to drive the state by a slowly
changing voltage and enables the use of an external RC network to achieve a precise power-up delay. The
enable pin can also be used with an external voltage divider to set a user-defined minimum supply voltage. For
proper operation, the EN pin must be terminated and must not be left floating.
VTHRESHOLD
VDELAY
R4
R4
EN
R5
EN
C5
Figure 4. Circuit Example how to use the Precise Device Enable feature
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Feature Description (continued)
8.3.3 Mode Selection (PFM/PWM)
The Mode-Pin is a digital input to enable the automatic PWM/PFM Mode that features highest efficiency by
allowing Pulse-Frequency-Modulation for lower output currents. This mode is enabled by applying a low level.
The device can be forced in PWM operation regardless of the output current to achieve minimum output ripple by
applying a high level. This pin must not be left floating
8.3.4 Undervoltage Lockout (UVLO)
To avoid mis-operation of the device at low input voltages, an undervoltage lockout is included. It activates the
device once the input voltage (VI) has risen the UVLOrising value. Once active, the device allows operation down
to even smaller input voltages which is determined by the UVLOfalling. This behavior requires VO to be higher than
the minimum value of 1.8V.
UVLOrising
UVLOfalling
VIN
Device
active
Figure 5. Rising and falling Undervoltage Lockout behavior
10
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Feature Description (continued)
8.3.5 Softstart
To minimize inrush current and output voltage overshoot during start-up, the device features a controlled soft
start-up. After device enable, the device starts all internal reference and control circuits within the enable delay
time Tdelay. After that, the maximum switch current limit raises monotonic from zero mA to the current limit. The
loop stops switching once VO is reached. This allows a quick output voltage raise for small capacitors at the
output. The bigger the output capacitor, the longer it takes to settle Vout. A potential load during start is
lengthening the ramp as well. The raise of the current limit allows smallest inrush current for no-load conditions,
as well as the possibility to start into high loads at start-up.
VIN
EN
Current
Limit
Inductor
Current
0.95 x VOUT
VOUT
Power
Good
Tde lay
Tramp
TStart-up
Figure 6. Device Start-up Scheme
8.3.6 Adjustable Output Voltage
The devices output voltage is adjusted by applying an external resistive divider between VO, FB-Terminal and
GND. This allows to program the output voltage in the recommended range. The divider should provide a lowside resistor of less than 100 KΩ. The high-side resistor is chosen accordingly.
8.3.7 Over Temperature Protection - Thermal Shutdown
The device has a built-in temperature sensor which monitors the IC temperature. If the temperature exceeds the
threshold, the device stops operating. As soon as the IC temperature has decreased below the programmed
threshold, it starts operating again. There is a built-in hysteresis to avoid unstable operation at IC temperatures at
the over-temperature threshold.
8.3.8 Input Overvoltage - Reverse-Boost Protection (IVP)
TPS63805 can operate in reverse mode where the device transfers energy from the output back to the input. If
the source would not be able to sink that current, potentially charge can build up uncontrolled and VIN rises. To
protect the device and other components from that scenario, the device features an Input Voltage Protection
(IVP) for reverse Boost Operation. Once the input voltage is above the threshold, the converter stops switching.
The PG signal goes low to indicate that behavior.
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Feature Description (continued)
8.3.9 Output Overvoltage Protection (OVP)
In case of a broken feedback-path connection the device can loose VO information and is not able to regulate. To
avoid a uncontrolled boosting of VO, TPS63805 features an Output Overvoltage Protection. It measures the
voltage on VOUT-Pin and stops switching when VO is greater than the threshold avoid harm of the converter and
of other components.
8.3.10 Power Good Indicator
The power good goes high-impedance once the output is above 95% of the nominal voltage, and is driven low
once the output voltage falls below typically 90% of the nominal voltage. This feature also indicates Overvoltage
and device shutdown cases as shown in the table The PG pin is an open-drain output and is specified to sink up
to 1 mA. The power good output requires a pull-up resistor connecting to any voltage rail less than 5.5 V. The
PG signal can be used for sequencing of multiple rails by connecting it to the EN pin of other converters. Leave
the PG pin unconnected when not used.
Table 1. Power Good Indicator Truth Table
Logic Signals
EN
VOUT
VIN
OVP
IVP
PG LOGIC STATUS
X
< 1.8V
< UVLO_R
X
X
undefined
LOW
X
> UVLO_F
X
X
LOW
HIGH
VOUT < 0.9 *
target-VOUT
> 1.3V
X
X
LOW
HIGH
X
> UVLO_F
HIGH
X
LOW
HIGH
X
> UVLO_F
X
HIGH
LOW
HIGH
VOUT > 0.95 *
target-VOUT
> UVLO_F
LOW
LOW
HIGH Z
8.4 Device Functional Modes
8.4.1 Peak Current Mode Architecture
The TPS63805 is based on a Peak Current Mode Architecture. The Error Amplifier provides a peak current target
(voltage that is translated into a equivalent current, see Figure 3 ), based on the current demand from the voltage
loop. This target is compared with the actual inductor current during the ON-time. The ON-time is ended once the
inductor current is equal to the current target and OFF-time is initiated. The OFF-time is calculated by the control
and a function of VI and VO.
12
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Device Functional Modes (continued)
IPEAK
VEAmp
IPK-PK
TON
IIND
TOFF
0
time
Figure 7. Peak Current Architecture Operation
8.4.1.1 Reverse Current Operation, Negative Current
When the TPS63805 is forced to PWM operation (MODE = HIGH), the device current can flow in reverse
direction. This happens by the negative current capability of the TPS63805. The Error Amplifier provides a peak
current target (voltage that is translated into a equivalent current, see Figure 3 ), even so the target has a
negative value. The maximum average current is even more negative than the peak current.
time
0
IPEAK
VEAmp
IIND
IAVG
IPK-PK
Figure 8. Peak Current Operation, Reverse Current
8.4.1.2 Boost Operation
When VI is smaller than VO (and the voltages are not close enough to trigger Buck-Boost operation), TPS63805
operates in Boost Mode where the Boost High-Side & Low-Side Switches are active. The Buck High-Side Switch
is always turned on, the Buck Low-Side Switch is always turned off. This lets TPS63805 operate as a classical
Boost Converter.
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Device Functional Modes (continued)
IPEAK
VEAmp
IIND
TON
TOFF
Figure 9. Peak Current Boost Operation
8.4.1.3 Buck-Boost Operation
When VI is close to VO, TPS63805 operates in Buck-Boost Mode, where all switches are active and the device
repeats 3-cycles
• TON: Boost Charge Phase where Boost Low-Side and Buck High-Side are closed and inductor current is built
up
• TOFF: Buck Discharge Phase where Boost High-Side and Buck Low-Side are closed and inductor is
discharged
• TCOM: VI connected to VO where all High-Side switches are closed and input is connected to output
IPEAK
VEAmp
IIND
TON
TCOM
TOFF
TCOM
Figure 10. Peak Current Buck-Boost Operation
8.4.1.4 Buck Operation
When VI is greater than VO (and the voltages are not close enough to trigger Buck-Boost operation), TPS63805
operates in Buck Mode where the Buck High-Side & Low-Side Switches are active. The Boost High-Side Switch
is always turned on, the Boost Low-Side Switch is always turned off. This lets TPS63805 operate as a classical
Buck Converter.
14
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Device Functional Modes (continued)
IPEAK
VEAmp
IIND
TON
TOFF
Figure 11. Peak Current Buck Operation
8.4.2 Power Save Mode Operation
Besides Continuos Conduction (PWM) Mode, TPS63805 features Power Safe (PFM) Mode operation to achieve
high efficiency at light load currents. This is implented by pausing the switching operation depending on the load
current.
The Skip Comparator manages the switching or pause operation. It compares the current demand signal from
the Voltage Loop IREF with the skip threshold ISKIP as shown in Figure 3. If the current demand is lower than the
skip value, the comparator pauses switching operation. If the current demand goes higher (due to falling VO) the
comparator activates the current loop and allows switching according to the loop behavior. Whenever the current
loop has risen VO by bringing charge to the output, the Voltage loop output IREF (respectively VEA) decreases.
When IREF falls below ISKIP-Hysteresis, it automatically goes into pause again.
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Device Functional Modes (continued)
ICOIL
VO
ISKIP
VEA
/ IREF
Hysteresis
SKIP
Yes/No
Switching
Pause
t
Figure 12. Power Safe Mode Operation Curves
8.4.2.1 Current Limit Operation
For limiting current and protecting the device and the application, the maximum peak inductor current is limited
internally on the IC. It is measured at the Buck High-Side Switch which turns into an input current detection. To
provide a certain load current across all Operation Modes, the Boost & Buck-Boost peak current limit is higher
than in Buck Mode. It limits the input current and allows no further increase of the delivered current. When using
the device in this Mode, it behaves similar to a current source.
The current limit depends on the operation Mode (Buck, Buck-Boost or Boost Mode) and is listed in the section
Electrical Characteristics
16
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TPS63805 is a high efficiency, high current Buck-Boost converter suitable for application where the input
voltage is higher, lower or equal to the output voltage.
9.1.1 Typical Application
L1
0.47µH
L1
VIN
1.3V t 5.5V
VIN
L2
VOUT = 3.3V
VIN
VOUT
R3
100kQ
C1
10 …F
EN
PG
MODE
FB
R1
511kQ
C2
22 …F
R2
91kQ
GND
AGND
TPS63805
Figure 13. 3.3VOUT Typical Application
9.1.1.1 Design Requirements
The design guideline provides a component selection to operate the device within the recommended operating
conditions.
Table 2 shows the list of components for the Application Characteristic Curves.
Table 2. Components for Application Characteristic Curves (1)
REFERENCE
DESCRIPTION
Part Number
MANUFACTURER
TPS63805 2A Buck-Boost Converter (15-ball
WCSP)
TPS63805YFF
Texas Instruments
L1
0.47µH, 4mmx4mmx1.5mm, 5.4A, 7.6mΩ
XFL4015-471ME
Coilcraft
C1
10µF, 0603, Ceramic Capacitor, ±20%, 6.3V
GRM188R60J106ME84
Murata
C2
22uF, 0603, Ceramic Capacitor, ±20%, 6.3V
GRM188R60J226MEA05
Murata
R1
511kΩ, 0603 Resistor, 1%, 100mW
Standard
Standard
R2
91kΩ, 0603 Resistor, 1%, 100mW
Standard
Standard
R3
100kΩ, 0603 Resistor, 1%, 100mW
Standard
Standard
(1)
See Third-Party Products Discalimer
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9.1.1.2 Detailed Design Procedure
The first step is the selection of the output filter components. To simplify this process outlines possible inductor
and capacitor value combinations.
9.1.1.2.1
Output Capacitor
For the output capacitor, use of a small ceramic capacitors placed as close as possible to the VOUT and PGND
pins of the IC is recommended. The recommended nominal output capacitor value is a single 22µF for all
programmed output voltages ≤ 4 V. Above that voltage 2x22 µFcapacitors are recommended. It is key to make
sure that the effective capacitance is given according the recommended value in Recommended Operating
Conditions. In general, consider DC-bias effects resulting in less effective capacitance. The choice of the output
capacitance is mainly a tradeoff between size and transient behavior as higher capacitance reduces transient
response over/undershoot.
There is no upper limit for the output capacitance value.
9.1.1.2.2
Input Capacitor Selection
A 10 μF input capacitor is recommended to improve line transient behavior of the regulator and EMI behavior of
the total power supply circuit. An X5R or X7R ceramic capacitor placed as close as possible to the VIN and
PGND pins of the IC is recommended. This capacitance can be increased without limit. If the input supply is
located more than a few inches from the TPS63805 converter additional bulk capacitance may be required in
addition to the ceramic bypass capacitors. An electrolytic or tantalum capacitor with a value of 47 μF is a typical
choice.
9.1.1.2.3 Inductor Selection
The inductor selection is affected by several parameter like inductor ripple current, output voltage ripple,
transition point into Power Save Mode, and efficiency. See Table 3 for typical inductors.
Table 3. List of Recommended Inductors (1)
(1)
INDUCTOR VALUE
COMPONENT SUPPLIER
SIZE (LxWxH mm)
Isat/DCR
0.47uH
XFL4015-471ME
4 x 4 x 1.5
5.4A/7.6mΩ
0.47µH
Toko, DFE201612E
2.0 x 1.6 x 1.2
5.5A/26mΩ
See Third-party Products Disclaimer
For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Especially at
high-switching frequencies, the core material has a high impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response. To avoid saturation of the inductor, the peak current for
the inductor in steady state operation is calculated using Equation 2. Only the equation which defines the switch
current in boost mode is shown, because this provides the highest value of current and represents the critical
current value for selecting the right inductor.
Duty Cycle Boost
IPEAK
D=
V
-V
IN
OUT
V
OUT
(1)
Iout
Vin ´ D
=
+
η ´ (1 - D)
2 ´ f ´ L
(2)
Where,
• D =Duty Cycle in Boost mode
• f = Converter switching frequency (typical 2.5 MHz)
• L = Inductor value
• η = Estimated converter efficiency (use the number from the efficiency curves or 0.90 as an assumption)
18
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NOTE
The calculation must be done for the minimum input voltage which is possible to have in
boost mode
Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation
current of the inductor needed. It's recommended to choose an inductor with a saturation current 20% higher
than the value calculated using Equation 2. Possible inductors are listed in Table 3.
9.1.1.2.4 Setting The Output Voltage
The output voltage is set by an external resistor divider. The resistor divider must be connected between VOUT,
FB and GND. The feedback Voltage is 500 mV nominal. The low-side resistor R2 (between FB and GND) should
not exceed 100 kΩ. The high-side resistor (between FB and VOUT) R1 is calculated by Equation 3.
æV
ö
R1 = R2 × ç OUT - 1÷
è VFB
ø
(3)
Table 4. Resistor selection for typ. voltages
VOUT
R1
R2
2.5 V
365 kΩ
91 kΩ
3.3 V
511 kΩ
91 kΩ
3.6 V
562 kΩ
91 kΩ
5V
806 kΩ
91 kΩ
9.1.1.3 Application Curves
100
3.5
95
3
90
85
Efficiency [%]
Max. IO [A]
2.5
2
80
75
70
VI
VI
VI
VI
VI
VI
VI
VI
65
1.5
60
55
1
50
0.0001
0.5
VO = 3.3V
0
1
1.5
2
2.5
3
3.5
VI [V]
VO = 3.3
4
4.5
5
5.5
0.001
0.01
0.05
IO [A]
0.2
=
=
=
=
=
=
=
=
0.5 1
1.3V
1.8V
2.3V
2.9V
3.3V
3.7V
4.3V
5V
2 3
TA = 25°C, MODE
= LOW
Figure 15. Efficiency vs. Output Current
D001
fsw_
iout
TA = 25°C
Figure 14. Typical Output Current Capability vs. Input
Voltage
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100
100
90
95
80
90
70
85
60
80
Efficiency [%]
Efficiency [%]
SLVSDS9A – JULY 2018 – REVISED OCTOBER 2018
50
40
VI
VI
VI
VI
VI
VI
VI
VI
30
20
10
0
0.0001
0.001
0.01
0.05
IO [A]
VO = 3.3V
0.2
=
=
=
=
=
=
=
=
0.5 1
1.3V
1.8V
2.3V
2.9V
3.3V
3.7V
4.3V
5V
2 3
TA = 25°C, MODE
= HIGH
75
70
60
55
50
0.0001
no Load, MODE = HIGH
Figure 18. Switching Waveforms, PWM Boost Operation
VI = 4.3V, VO = 3.3V
no Load, MODE = HIGH
Figure 20. Switching Waveforms, PWM Buck Operation
20
0.001
VO = 1.8V
Figure 16. Efficiency vs. Output Current
VI = 2.3V, VO = 3.3V
VI
VI
VI
VI
VI
VI
VI
VI
65
0.01
0.05
IO [A]
0.2
=
=
=
=
=
=
=
=
0.5 1
1.3V
1.8V
2.3V
2.9V
3.3V
3.7V
4.3V
5V
2 3
TA = 25°C, MODE
= LOW
Figure 17. Efficiency vs. Output Current
VI = 3.3V, VO = 3.3V
no Load, MODE = HIGH
Figure 19. Switching Waveforms, PWM Buck-Boost
Operation
VI = 4.3V, VO = 3.3V
no Load, MODE = LOW
Figure 21. Switching Waveforms, PFM Boost Operation
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VI = 4.3V, VO = 3.3V
no Load, MODE = LOW
Figure 22. Switching Waveforms, PFM Buck-Boost
Operation
VI = 3.8V, VO = 3.3V
10mA load, MODE = LOW
Figure 24. Start-up Behavior from rising Enable
VI = 3.8V, VO = 3.3V
1A load, MODE = LOW
Figure 26. Softstart Waveforms in PFM Mode
VI = 4.3V, VO = 3.3V
no Load, MODE = LOW
Figure 23. Switching Waveforms, PFM Buck Operation
VI = 3.8V, VO = 3.3V
10mA load, MODE = LOW
Figure 25. Softstart Waveforms in PFM Mode
VI = 3.8V, VO = 3.3V
10mA load, MODE = HIGH
Figure 27. Softstart Waveforms in forced PWM Mode
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VO = 3.3V
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0mA load, MODE = HIGH
VO = 3.3V
Figure 29. Linesweep Waveforms
Figure 28. Linesweep Waveforms
VO = 3.3V
0mA load, MODE = HIGH
VO = 3.3V
Figure 30. Linestep Waveforms
VI = 4.3V, VO = 3.3V
VO = 200mV/div
1A load, MODE = HIGH
Figure 31. Linestep Waveforms
VI = 3.0V, VO = 3.3V
Figure 32. 1A-Loadstep Waveforms
22
1A load, MODE = HIGH
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VO = 200mV/div
Figure 33. 1A-Loadstep Waveforms
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VI = 4.3V, VO = 3.3V
VO = 500mV/div
VI = 3.0V, VO = 3.3V
Figure 34. 2A-Loadstep Waveforms
VO = 500mV/div
Figure 35. 2A-Loadstep Waveforms
3.5
VI falling
VI rising
3.25
Inductor Switching Frequency [MHz]
3
2.75
2.5
2.25
2
1.75
1.5
1.25
1
0.75
0.5
1
VO = 3.3V
1.5
2
2.5
3
3.5
VI [V]
4
4.5
5
5.5
6
D001
fsw_
no Load
TA = 25°C, MODE = HIGH
Figure 36. Typical Inductor Switching Frequency vs. Input Voltage
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10 Power Supply Recommendations
The TPS63805 device family has no special requirements for its input power supply. The input power supply
output current needs to be rated according to the supply voltage, output voltage and output current of the
TPS63805.
11 Layout
11.1 Layout Requirements
The PCB layout is an important step to maintain the high performance of the TPS63805 devices.
• Place input and output capacitors as close as possible to the IC. Traces need to be kept short. Routing wide
and direct traces to the input and output capacitor results in low trace resistance and low parasitic inductance.
• Separate AGND and PGND: Do not connect AGND and PGND directly at the IC! See Figure 37 as an
example.
• Use a common-power GND but connect AGND & PGND through a via at a different layer.
• Use separate traces for the supply voltage of the power stage; and, the supply voltage of the analog stage.
• The sense trace connected to FB is signal trace. Keep these traces away from L1 and L2 nodes.
11.2 Layout Example
Figure 37. TPS63805 Example Layout
24
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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20-Oct-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS63805YFFR
ACTIVE
DSBGA
YFF
15
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
TPS63805
TPS63805YFFT
ACTIVE
DSBGA
YFF
15
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 125
TPS63805
XPS63805YFFT
ACTIVE
DSBGA
YFF
15
250
TBD
Call TI
Call TI
-40 to 125
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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